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authorJieqiang Wang <jieqiang.wang@arm.com>2023-03-20 16:58:14 +0800
committerBeno�t Ganne <bganne@cisco.com>2023-04-11 08:37:28 +0000
commit00f5d96f04337dce0a24fdf0da06f5991c981e46 (patch)
treeb176cabb4beedfa6672e6f34682fc3def7600b5b /src
parentb7756b26a9cc6e04a969dec3914ad7e148086e91 (diff)
rdma: disable compressed CQE mode for txq CQ
Previously we encountered the issue of failing to create completion queues on some Arm platforms because DPDK may set MLX5_CQE_SIZE to 128 if DPDK MLX PMDs are built and DPDK plugin is loaded, which does not satisfy the requirement of 64B size CQE by RDMA plugin. We fixed this issue in 844a0e8b0("always use 64 byte CQEs for MLX5"), but some of CSIT test cases failed due to this code change. It turns out that we don't need to specify compressed CQE mode for txq CQ because RDMA tx doesn't have the code logic to handle compressed CQEs, which might cause unexpected behavior if it is enabled. Type: fix Fixes: 844a0e8b0 ("always use 64 byte CQEs for MLX5") Signed-off-by: Jieqiang Wang <jieqiang.wang@arm.com> Change-Id: I7909a6d44b15bcf39c15dfac9377b65520a0cbfb
Diffstat (limited to 'src')
-rw-r--r--src/plugins/rdma/device.c4
1 files changed, 1 insertions, 3 deletions
diff --git a/src/plugins/rdma/device.c b/src/plugins/rdma/device.c
index 554304c1daf..44ca516d225 100644
--- a/src/plugins/rdma/device.c
+++ b/src/plugins/rdma/device.c
@@ -730,9 +730,7 @@ rdma_txq_init (vlib_main_t * vm, rdma_device_t * rd, u16 qid, u32 n_desc)
struct ibv_cq_init_attr_ex cqa = {};
struct ibv_cq_ex *cqex;
struct mlx5dv_cq_init_attr dvcq = {};
- dvcq.comp_mask = MLX5DV_CQ_INIT_ATTR_MASK_COMPRESSED_CQE |
- MLX5DV_CQ_INIT_ATTR_MASK_CQE_SIZE;
- dvcq.cqe_comp_res_format = MLX5DV_CQE_RES_FORMAT_HASH;
+ dvcq.comp_mask = MLX5DV_CQ_INIT_ATTR_MASK_CQE_SIZE;
dvcq.cqe_size = 64;
cqa.cqe = n_desc;
if ((cqex = mlx5dv_create_cq (rd->ctx, &cqa, &dvcq)) == 0)