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authorGabriel Ganne <gabriel.ganne@enea.com>2017-12-14 16:20:37 +0100
committerDamjan Marion <dmarion.lists@gmail.com>2017-12-16 19:32:25 +0000
commit8e66b9bf4ba90279631e6a0e8ccc2eab5f9156c2 (patch)
treee76209cf954906eda9c0f50b029f87637bdb9099 /test/test_lb.py
parentf9dc9c4629bb9756013f7c727d67e0d3990cff3c (diff)
Use crc32 wrapper (VPP-1086)
This allows arm platforms to also take advantage of crc32 hardware acceleration. * add a wrapper for crc32_u64. It's the only one really used. Using it instead of a call to clib_crc32c() eases building symmetrical hash functions. * replace #ifdef on SSE4 by a test on clib_crc32c_uses_intrinsics. Note: keep the test on i386 * fix typo in lb test log Change-Id: I03a0897b70f6c1717e6901d93cf0fe024d5facb5 Signed-off-by: Gabriel Ganne <gabriel.ganne@enea.com>
Diffstat (limited to 'test/test_lb.py')
-rw-r--r--test/test_lb.py2
1 files changed, 1 insertions, 1 deletions
diff --git a/test/test_lb.py b/test/test_lb.py
index ab9a209638a..e653b60b0ab 100644
--- a/test/test_lb.py
+++ b/test/test_lb.py
@@ -142,7 +142,7 @@ class TestLB(VppTestCase):
# is not completly biased.
for asid in self.ass:
if load[asid] < len(self.packets) / (len(self.ass) * 2):
- self.log(
+ self.logger.error(
"ASS is not balanced: load[%d] = %d" % (asid, load[asid]))
raise Exception("Load Balancer algorithm is biased")