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authorRay Kinsella <mdr@ashroe.eu>2021-11-02 13:26:49 +0000
committerDamjan Marion <dmarion@me.com>2021-11-02 22:25:40 +0000
commit6efe025ce58c092e513e1f7f10556a3fa394438d (patch)
tree847947e14960a036b958417433d2f1417190aae6 /test/test_pg.py
parent4b1e76b8e6f8d9ae7a3455402e4cb179b693a925 (diff)
vlib: add format pci link port
Added a function to nicely format pci link ports. Similar to the existing link_speed etc format functions. Type: improvement Signed-off-by: Ray Kinsella <mdr@ashroe.eu> Change-Id: Ic1f104e0cb34dad274f6c959e776a32c0bab697d
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