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| author |   Dave Barach <dave@barachs.net> | 2019-04-03 11:20:06 -0400 |
|---|---|---|
| committer |   Florin Coras <florin.coras@gmail.com> | 2019-04-11 01:19:56 +0000 |
| commit | 7c91007e1e13b56a29236bd076891709eaa21754 (patch) | |
| tree | e6d78635a3b53f6db4b0bfa563d98254c464da6f /test/test_reassembly.py | |
| parent | 10dc2eabd6e8a266405aef270a819794a3ddd333 (diff) | |
Make the loss / delay sim available as an output feature
Add binary api and debug cli support.
Rewrite for speed: enqueue vlib_buffer_t's to the wheel, instead of
memcpy'ing data. Quad-loop the output feature / x-connect (interior)
node. Prefetch wheel entries in the input node.
Save packet-generator-based unit-test setup in extras/nsim.
Simple config example:
set nsim delay 20 ms bandwidth 1 gbit packet-size 1024
nsim output-feature enable-disable GigabitEthernet3/0/0
Change-Id: I852a32d4eb596e7e2aa1d9b30bf3b53525e39fd1
Signed-off-by: Dave Barach <dave@barachs.net>c
Diffstat (limited to 'test/test_reassembly.py')
0 files changed, 0 insertions, 0 deletions