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authorZachary Leaf <zachary.leaf@arm.com>2022-05-23 06:23:40 -0500
committerDamjan Marion <dmarion@0xa5.net>2022-07-12 15:29:23 +0000
commitaf82211d33c9e68c95097f74f04169ec40bd960c (patch)
tree9a93765d5fd583de43bb27557d0ac52358e09469 /test/test_wireguard.py
parent268d7be66b8b48a230e06de645e3a8b7de29d93c (diff)
perfmon: add Arm event bundles
Included statistic bundles (all NODE type): - Instructions and CPU cycles, including IPC - Data cache access/refills/% - Data TLB cache access/refills/% - Instruction cache access/refills/% - Instruction TLB cache access/refills/% - Memory/Bus accesses, memory errors - Branch (mis)predictions, architecturally & speculatively executed - Processor frontend/backend stalls (stalled cycles) Type: feature Signed-off-by: Zachary Leaf <zachary.leaf@arm.com> Tested-by: Jieqiang Wang <jieqiang.wang@arm.com> Change-Id: I7ea4a27c8df8fc7222b743a98bdceaff727e4112
Diffstat (limited to 'test/test_wireguard.py')
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