summaryrefslogtreecommitdiffstats
path: root/test/vpp_acl.py
diff options
context:
space:
mode:
authorBenoît Ganne <bganne@cisco.com>2024-01-19 17:43:44 +0100
committerDamjan Marion <dmarion@0xa5.net>2024-01-19 19:02:27 +0000
commit9705d848a2bf0a14fb832fb9e2bc0c4a71ff8952 (patch)
tree24a33dfc7612cad6a7d1ebb14db4f6b85de99015 /test/vpp_acl.py
parent9418143bd4c8f3bb46c32800c1ae85b20bbe8815 (diff)
build: fix default platform
When unsetting VPP_PLATFORM in cmake, it unmasks the cached value instead, misleading the platform selection logic in src/cmake/cpu.cmake Type: fix Fixes: 01fe7ab88e Change-Id: I676cd0af9ba28150f8ac07724c03df8ef24b640f Signed-off-by: Benoît Ganne <bganne@cisco.com>
Diffstat (limited to 'test/vpp_acl.py')
0 files changed, 0 insertions, 0 deletions
ption> Integration testsGrokmirror user
aboutsummaryrefslogtreecommitdiffstats
path: root/tests/vpp/perf/container_memif/40ge2p1xl710-eth-l2xcbase-eth-2memif-1lxc-mrr.robot
blob: 514443cd3f62744352462503306ef0a377ba0854 (plain) 
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139

# Copyright (c) 2018 Cisco and/or its affiliates.
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
# You may obtain a copy of the License at:
#
#     http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS,
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
# See the License for the specific language governing permissions and
# limitations under the License.

*** Settings ***
| Resource | resources/libraries/robot/performance/performance_setup.robot
| ...
| Force Tags | 3_NODE_SINGLE_LINK_TOPO | PERFTEST | HW_ENV | MRR
| ... | NIC_Intel-XL710 | ETH | L2XCFWD | BASE | MEMIF | LXC
| ...
| Suite Setup | Run Keywords
| ... | Set up 3-node performance topology with DUT's NIC model | L2
| ... | Intel-XL710
| ... | AND | Set up performance test suite with MEMIF
| ... | AND | Set up performance topology with containers | chains=${1}
| ... | nodeness=${1}
| ...
| Suite Teardown | Tear down 3-node performance topology with container
| ...
| Test Setup | Run Keywords
| ... | Set up performance test
| ... | AND | Restart VPP in all 'CNF' containers
| ...
| Test Teardown | Tear down performance mrr test
| ...
| Test Template | Local Template
| ...
| Documentation |  *Raw results L2XC test cases*
| ...
| ... | *[Top] Network Topologies:* TG-DUT1-DUT2-TG 3-node circular topology
| ... | with single links between nodes.
| ... | *[Enc] Packet Encapsulations:* Eth-IPv4 for L2 cross connect.
| ... | *[Cfg] DUT configuration:* DUT1 and DUT2 are configured with L2 cross-
| ... | connect. DUT1 and DUT2 tested with 2p40GE NIC XL710 by Intel.
| ... | LXC is connected to VPP via Memif interface. LXC is running same VPP
| ... | version as running on DUT. LXC is limited via cgroup to use 3 cores
| ... | allocated from pool of isolated CPUs. There are no memory contraints.
| ... | *[Ver] TG verification:* In MaxReceivedRate test TG sends traffic
| ... | at line rate and reports total received/sent packets over trial period.
| ... | Test packets are generated by TG on links to DUTs. TG traffic profile
| ... | contains two L3 flow-groups (flow-group per direction, 254 flows per
| ... | flow-group) with all packets containing Ethernet header, IPv4 header
| ... | with IP protocol=61 and static payload. MAC addresses are matching MAC
| ... | addresses of the TG node interfaces.

*** Variables ***
# XL710-DA2 bandwidth limit ~49Gbps/2=24.5Gbps
| ${s_24.5G}= | ${24500000000}
# XL710-DA2 Mpps limit 37.5Mpps/2=18.75Mpps
| ${s_18.75Mpps}= | ${18750000}
# Traffic profile:
| ${traffic_profile}= | trex-sl-3n-ethip4-ip4src254
# Container
| ${cpu_count_int}= | ${4}
| ${container_engine}= | LXC
| ${container_chain_topology}= | chain

*** Keywords ***
| Local Template
| | [Documentation]
| | ... | [Cfg] DUT runs L2XC switching config.
| | ... | Each DUT uses ${phy_cores} physical core(s) for worker threads.
| | ... | [Ver] Measure MaxReceivedRate for ${framesize}B frames using single\
| | ... | trial throughput test.
| | ...
| | ... | *Arguments:*
| | ... | - framesize - Framesize in Bytes in integer or string (IMIX_v4_1).
| | ... | Type: integer, string
| | ... | - phy_cores - Number of physical cores. Type: integer
| | ... | - rxq - Number of RX queues, default value: ${None}. Type: integer
| | ...
| | [Arguments] | ${framesize} | ${phy_cores} | ${rxq}=${None}
| | ...
| | Given Add worker threads and rxqueues to all DUTs | ${phy_cores} | ${rxq}
| | And Add PCI devices to all DUTs
| | ${max_rate} | ${jumbo} = | Get Max Rate And Jumbo And Handle Multi Seg
| | ... | ${s_24.5G} | ${framesize} | pps_limit=${s_18.75Mpps}
| | And Apply startup configuration on all VPP DUTs
| | And Initialize L2 xconnect with memif pairs
| | Then Traffic should pass with maximum rate
| | ... | ${max_rate}pps | ${framesize} | ${traffic_profile}

*** Test Cases ***
| tc01-64B-1c-eth-l2xcbase-eth-2memif-1lxc-mrr
| | [Tags] | 64B | 1C
| | framesize=${64} | phy_cores=${1}

| tc02-64B-2c-eth-l2xcbase-eth-2memif-1lxc-mrr
| | [Tags] | 64B | 2C
| | framesize=${64} | phy_cores=${2}

| tc03-64B-4c-eth-l2xcbase-eth-2memif-1lxc-mrr
| | [Tags] | 64B | 4C
| | framesize=${64} | phy_cores=${4}

| tc04-1518B-1c-eth-l2xcbase-eth-2memif-1lxc-mrr
| | [Tags] | 1518B | 1C
| | framesize=${1518} | phy_cores=${1}

| tc05-1518B-2c-eth-l2xcbase-eth-2memif-1lxc-mrr
| | [Tags] | 1518B | 2C
| | framesize=${1518} | phy_cores=${2}

| tc06-1518B-4c-eth-l2xcbase-eth-2memif-1lxc-mrr
| | [Tags] | 1518B | 4C
| | framesize=${1518} | phy_cores=${4}

| tc07-9000B-1c-eth-l2xcbase-eth-2memif-1lxc-mrr
| | [Tags] | 9000B | 1C
| | framesize=${9000} | phy_cores=${1}

| tc08-9000B-2c-eth-l2xcbase-eth-2memif-1lxc-mrr
| | [Tags] | 9000B | 2C
| | framesize=${9000} | phy_cores=${2}

| tc09-9000B-4c-eth-l2xcbase-eth-2memif-1lxc-mrr
| | [Tags] | 9000B | 4C
| | framesize=${9000} | phy_cores=${4}

| tc10-IMIX-1c-eth-l2xcbase-eth-2memif-1lxc-mrr
| | [Tags] | IMIX | 1C
| | framesize=IMIX_v4_1 | phy_cores=${1}

| tc11-IMIX-2c-eth-l2xcbase-eth-2memif-1lxc-mrr
| | [Tags] | IMIX | 2C
| | framesize=IMIX_v4_1 | phy_cores=${2}

| tc12-IMIX-4c-eth-l2xcbase-eth-2memif-1lxc-mrr
| | [Tags] | IMIX | 4C
| | framesize=IMIX_v4_1 | phy_cores=${4}