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| author |   Neale Ranns <nranns@cisco.com> | 2017-12-14 08:51:32 -0800 |
|---|---|---|
| committer |   Damjan Marion <dmarion.lists@gmail.com> | 2017-12-16 19:39:26 +0000 |
| commit | 33ce60d6759bbbfebb7d489aa591b696e140d870 (patch) | |
| tree | eda75c292952f754813648b5a49d0ca5f17a69f3 /test/vpp_mpls_tunnel_interface.py | |
| parent | 8e66b9bf4ba90279631e6a0e8ccc2eab5f9156c2 (diff) | |
GRE tunnel key includes the FIB table
- GRE tunnels with the same src,dst addresses are not the same tunnel
- Two data-plane improvements:
- the cached key was never updated and so useless
- no need to dereference the tunnel's HW interface to get the sw_if_index
Change-Id: I2f2ea6e08c759a810b753cec22c497e921a2ca01
Signed-off-by: Neale Ranns <nranns@cisco.com>
Diffstat (limited to 'test/vpp_mpls_tunnel_interface.py')
0 files changed, 0 insertions, 0 deletions