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author | 2016-05-11 23:07:18 +0200 | |
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committer | 2016-05-19 18:14:38 +0200 | |
commit | 1c80e831b728ab378949714d5059a0b5b1822a0a (patch) | |
tree | e4f3ecfee143f7dee0e9905570d41ca3ee345c83 /vnet/test | |
parent | 82e29c455833b5b12e04c89d2dec1106b499e6b0 (diff) |
Add support for multiple microarchitectures in single binary
* compiler -march= parameter is changed from native to corei7
so code is always genereted with instructions which are available
on the Nehalem microarchitecture (up to SSE4.2)
* compiler -mtune= parameter is added so code is optimized for
corei7-avx which equals to Sandy Bridge microarchitecture
* set of macros is added which allows run-time detection of available
cpu instructions (e.g. clib_cpu_supports_avx())
* set of macros is added which allows us to clone graph node funcitons
where cloned function is optmized for different microarchitecture
Those macros are using following attributes:
__attribute__((flatten))
__attribute__((target("arch=core-avx2)))
I.e. If applied to foo_node_fn() macro will generate cloned
functions foo_node_fn_avx2() and foo_node_fn_avx512() (future)
It will also generate function void * foo_node_fn_multiarch_select()
which detects available instruction set and returns pointer to the
best matching function clone.
Change-Id: I2dce0ac92a5ede95fcb56f47f3d1f3c4c040bac0
Signed-off-by: Damjan Marion <damarion@cisco.com>
Diffstat (limited to 'vnet/test')
0 files changed, 0 insertions, 0 deletions