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-rw-r--r--src/vppinfra/cpu.h17
-rw-r--r--src/vppinfra/string.h2
-rw-r--r--src/vppinfra/vector.h7
3 files changed, 20 insertions, 6 deletions
diff --git a/src/vppinfra/cpu.h b/src/vppinfra/cpu.h
index 7bd5dfe9722..dc73c90ca34 100644
--- a/src/vppinfra/cpu.h
+++ b/src/vppinfra/cpu.h
@@ -132,6 +132,9 @@ _ (x86_aes, 1, ecx, 25) \
_ (sha, 7, ebx, 29) \
_ (vaes, 7, ecx, 9) \
_ (vpclmulqdq, 7, ecx, 10) \
+_ (avx512_vnni, 7, ecx, 11) \
+_ (avx512_bitalg, 7, ecx, 12) \
+_ (avx512_vpopcntdq, 7, ecx, 14) \
_ (invariant_tsc, 0x80000007, edx, 8)
@@ -245,15 +248,23 @@ clib_cpu_supports_aes ()
}
static inline int
-clib_cpu_march_priority_avx512 ()
+clib_cpu_march_priority_icl ()
+{
+ if (clib_cpu_supports_avx512_bitalg ())
+ return 200;
+ return -1;
+}
+
+static inline int
+clib_cpu_march_priority_skx ()
{
if (clib_cpu_supports_avx512f ())
- return 20;
+ return 100;
return -1;
}
static inline int
-clib_cpu_march_priority_avx2 ()
+clib_cpu_march_priority_hsw ()
{
if (clib_cpu_supports_avx2 ())
return 50;
diff --git a/src/vppinfra/string.h b/src/vppinfra/string.h
index a3db9264cac..3dafe899a8f 100644
--- a/src/vppinfra/string.h
+++ b/src/vppinfra/string.h
@@ -71,7 +71,7 @@ void clib_memswap (void *_a, void *_b, uword bytes);
* so don't let it anywhere near them.
*/
#ifndef __COVERITY__
-#if __AVX512F__
+#if __AVX512BITALG__
#include <vppinfra/memcpy_avx512.h>
#elif __AVX2__
#include <vppinfra/memcpy_avx2.h>
diff --git a/src/vppinfra/vector.h b/src/vppinfra/vector.h
index 906d8d8fbfd..8b08db22124 100644
--- a/src/vppinfra/vector.h
+++ b/src/vppinfra/vector.h
@@ -66,7 +66,7 @@
#endif
#endif
-#if defined (__AVX512F__)
+#if defined (__AVX512BITALG__)
#define CLIB_HAVE_VEC512
#endif
@@ -168,7 +168,10 @@ typedef u64 u64x _vector_size (8);
#include <vppinfra/vector_avx2.h>
#endif
-#if defined (__AVX512F__)
+#if defined (__AVX512BITALG__)
+/* Due to power level transition issues, we don't preffer AVX-512 on
+ Skylake X and CascadeLake CPUs, AVX512BITALG is introduced on
+ icelake CPUs */
#include <vppinfra/vector_avx512.h>
#endif