aboutsummaryrefslogtreecommitdiffstats
path: root/src/cmake/cpu.cmake
AgeCommit message (Collapse)AuthorFilesLines
2023-03-14build: add support for intel alderlake and sapphirerapidsDamjan Marion1-0/+10
Disabled by default.. Type: improvement Change-Id: I36176c009e0873c048874ae38a7ea0a91449235c Signed-off-by: Damjan Marion <damarion@cisco.com>
2022-04-25build: add option to build only for native CPUDamjan Marion1-1/+15
Significantly reduces compilation time for uses who are interested to run binaries only on the build machine. Type: make Change-Id: I431f6f7374b6dfa8b3f7c72dc69f3d5cafd1f6bb Signed-off-by: Damjan Marion <damarion@cisco.com>
2021-07-27vppinfra: introduce CLIB_CACHE_PREFETCH_BYTESDamjan Marion1-37/+27
Type: improvement Change-Id: Ic07010f11ef303f5213a33b0faf24aaedb62f110 Signed-off-by: Damjan Marion <damarion@cisco.com>
2021-05-11build: compiler flags handling cleanupDamjan Marion1-3/+3
Type: make Change-Id: I51f30edb91e09525ba116fe3941f2e43f9718da7 Signed-off-by: Damjan Marion <damarion@cisco.com>
2021-05-06build: add FORCE_ON option for multiarch variantsDamjan Marion1-2/+18
Type: make Change-Id: I37fb925a9cc2dfc21dd7874f4b20a6943b28efc8 Signed-off-by: Damjan Marion <damarion@cisco.com>
2021-05-01build: add option to turn off some march variantsDamjan Marion1-41/+81
Type: make Change-Id: I53f7995c7e7a7ff829c662d71f37d88780bdd140 Signed-off-by: Damjan Marion <damarion@cisco.com>
2021-02-08misc: support api generated dependency for multiarch sourceOle Troan1-4/+11
Fix dependency issues where multi-arch file is using API generated file. Type: improvement Change-Id: I5d4af7a630529bc138c35841723e38938f36d963 Signed-off-by: Ole Troan <ot@cisco.com>
2021-01-21avf: use write combining store for queues tail updateRadu Nicolau1-0/+4
Performance improvement: on supported platforms, currently only Intel Tremont, use a write combining store to update the tail pointers. Also, Tremont node variant is added for all. Type: improvement Signed-off-by: Radu Nicolau <radu.nicolau@intel.com> Change-Id: Ie9606e403b7d9655184f778e3ffee3027c8c9edd
2020-10-15build: forward dependencies to arch-specific libsAloys Augustin1-1/+4
Without this, if a multiarch source depends on a generated api header for instance, the build would be racy between the api header generation and the multiarch object compilation. Type: improvement Signed-off-by: Aloys Augustin <aloaugus@cisco.com> Change-Id: I08fcd0e5a1c51398ac1a8f37cf6562064b400d4a
2020-08-27vppinfra: Multiarch support for OCTEONTX2 SoCNitin Saxena1-0/+4
Type: feature - Added multiarch support for Marvell OCTEONTX2 - Corrected Marvell THUNDERX2 spelling Signed-off-by: Nitin Saxena <nsaxena@marvell.com> Change-Id: I42d3654aeda89759a2db9d695592ee3227b26c2b
2020-04-30build: rework x86 CPU variantsDamjan Marion1-5/+9
Type: improvement Change-Id: Ief243f88e654e578ef9b8060fcf535b364aececb Signed-off-by: Damjan Marion <damarion@cisco.com>
2020-04-30build: support arch-specific compiling for Neoverse N1Lijian.Zhang1-0/+4
Enable arch-specific compiling and dynamic optimal function selection for Arm Neoverse-N1. Support for -march=armv8.2-a+crc+crypto -mtune=neoverse-n1 for Neoverse-N1 is added starting from gcc-9.2.0 without change with change improvement [L2 - 1x flows] 11.00 Mpps 11.46 Mpps 4% [L2 - 10Kx flows] 6.83 Mpps 7.17 Mpps 5% [L3 - 1x flows] 10.39 Mpps 10.78 Mpps 3.7% [L3 - 10Kx flows] 6.67 Mpps 7.19 Mpps 7.8% Type: feature Change-Id: I5d24d17820b3dd6909b913202e8c31fc7d48650f Signed-off-by: Lijian Zhang <Lijian.Zhang@arm.com> Reviewed-by: Jieqiang Wang <Jieqiang.Wang@arm.com> Reviewed-by: Govindarajan Mohandoss <Govindarajan.Mohandoss@arm.com>
2020-04-29build: detect GNU Assembler AVX-512 bug and disable AVX-512 variants if neededDamjan Marion1-4/+24
Type: fix Change-Id: I098f6c79be3c2e4db001edc0cf0a229bf6e0b13d Signed-off-by: Damjan Marion <damarion@cisco.com>
2020-01-27crypto-ia32: add VAES support for AES-CBCDamjan Marion1-0/+1
Type: feature Change-Id: Ic8aa6c48913677537301971469f9627b70c1cec8 Signed-off-by: Damjan Marion <damarion@cisco.com>
2019-09-05build: fix unsupported CMake comparison operationjialv011-1/+1
VERSION_GREATER_EQUAL is not supported before CMake version 3.7. Type: fix Signed-off-by: Jianlin Lv <Jianlin.Lv@arm.com> Change-Id: Id690b7b7c26121f9d289ebd0aaea0860be63795f
2019-08-19build: fix vpp compilation failure on ThunderX2 and AmpJianlin Lv1-1/+1
fix compile issue that caused by enabling "-mtune=thunderx2t99" flag during compilation, such as "/opt/vpp-agent/dev/vpp/src/vnet/interface_stats.c:164:1: internal compiler error: Segmentation fault" Type: fix Change-Id: Iaf9f80a6c203a7e5b6a40523f14a62bb37091c92 Signed-off-by: Jianlin Lv <Jianlin.Lv@arm.com>
2019-06-07build: add -Wall and -fno-common, fix reported issuesBenoît Ganne1-1/+1
Type: refactor Change-Id: I8489ccd54411c2aa9355439c5641dc31012c64a2 Signed-off-by: Benoît Ganne <bganne@cisco.com> Signed-off-by: Damjan Marion <damarion@cisco.com>
2019-05-14Build packages for generic Arm architectureLijian.Zhang1-0/+2
The current aarch64 version of VPP package distro in cloud repository (https://packagecloud.io/fdio/master/ubuntu), is built on a ThunderX server, using some arch-specific options, for example, 128Byte cache line size, T=arm64-thunderx-linuxapp-gcc, RTE_MACHINE=thunderx The patch is trying to build package distro with aarch64 generic features, for both binary type targets, e.g., build/build-release, and package type targets, e.g., pkg-deb/pkg-rpm, with the generic options, e.g., 128Byte cache line size, T=arm64-armv8a-linuxapp-gcc, RTE_MACHINE=armv8a If end users want to build arch specific optimized image, TARGET_PLATFORM variable could be used, as below example, $ make build-release/pkg-deb TARGET_PLATFORM=thunderx Change-Id: If78bca8709fe83db6a95e8c26346f206bf5ea71d Signed-off-by: Lijian Zhang <Lijian.Zhang@arm.com> Reviewed-by: Sirshak Das <Sirshak.Das@arm.com> Reviewed-by: Honnappa Nagarahalli <Honnappa.Nagarahalli@arm.com>
2019-02-14Add -fno-common compile optionBenoît Ganne1-1/+1
-fno-common makes sure we do not have multiple declarations of the same global symbol across compilation units. It helps debug nasty linkage bugs by guaranteeing that all reference to a global symbol use the same underlying object. It also helps avoiding benign mistakes such as declaring enum as global objects instead of types in headers (hence the minor fixes scattered across the source). Change-Id: I55c16406dc54ff8a6860238b90ca990fa6b179f1 Signed-off-by: Benoît Ganne <bganne@cisco.com>
2019-01-17cmake: initial cross-compilation supportDamjan Marion1-1/+4
Change-Id: Ib9c2aba1eda08a22465441e33553b9b744c79d56 Signed-off-by: Damjan Marion <damarion@cisco.com>
2018-10-01Support dynamic dual/quad loop selection on aarch64Lijian Zhang1-0/+16
Currently, there are three variants available on aarch64, qdf24xx, thunderx2t99, and cortex-a72. -DCLIB_N_PREFETCHES is passed to source code to select dual/quad implementation. Besides, different compiler options are applied on these critical functions. gcc-7.3.0 reports ICE(internal compiler error) with -mtune=thunderx2t99, so -mtune=thunderx2t99 is enabled only when gcc version is greater than 7.3.0 Cavium ThunderX2, Impermenter 0x43, Part 0x0af -march=armv8-a+crc+crypto -mtune=thunderx2t99 Qualcomm Centriq 2400, Impermenter 0x51, Part 0xc00 -march=armv8.1-a+crc+crypto -mtune=qdf24xx Cortex-A72, Impermenter 0x41, Part 0xd08 -march=armv8-a+crc+crypto -mtune=cortex-a72 Change-Id: Id5649c6325c1e642d0fd42535e3908793b13e02a Signed-off-by: Lijian Zhang <Lijian.Zhang@arm.com> Reviewed-by: Sirshak Das <sirshak.das@arm.com> Reviewed-by: Honnappa Nagarahalli <Honnappa.Nagarahalli@arm.com>
2018-09-12Always use 'lib' instead of 'lib64'Damjan Marion1-4/+0
It is packaging responsibility to put libs in the right place. Use of lib64 resulted in huge amount of files with hardcoded lib64. This patch simplifies things... Change-Id: Iab0dea0583e480907732c5d2379eb951a00fa9e6 Signed-off-by: Damjan Marion <damarion@cisco.com>
2018-09-07Cavium OcteonTX: cache line fixMarco Varlese1-5/+9
According to Nitin Saxena ThunderX2 machine has 64B cache line whilst all others are 128B. According to Damjan, Nitin's previous patch broke compilation for all non-Cavium machines. This patch should make everything happy again. Change-Id: I8c5c2661f9f2f9c3e9b0965a277712f9a1eefa5f Signed-off-by: Marco Varlese <marco.varlese@suse.com>
2018-09-07cmake: Fix compilation for OCTEONTxNitin Saxena1-5/+5
Change-Id: I7b7183b4603076e5afac096545d820091ee7c495 Signed-off-by: Nitin Saxena <nitin.saxena@cavium.com>
2018-09-02cmake: cache line size detectionDamjan Marion1-0/+35
Change-Id: I9a0df8d15deefdf31cfead56c96433cd7220b802 Signed-off-by: Damjan Marion <damarion@cisco.com>
2018-08-27cmake: fix clang build and few minor fixesDamjan Marion1-4/+4
Change-Id: If5b850c939f7a5383f9a7eff8ac41708c3428a90 Signed-off-by: Damjan Marion <damarion@cisco.com>
2018-08-27cmake: use lib64 for lib dirDamjan Marion1-0/+4
While not sure if this is right or not, this is what autotools do Change-Id: I01f22281302b1383b0e69c3f03e5c8f8a8961358 Signed-off-by: Damjan Marion <damarion@cisco.com>
2018-08-26cmake: move functions to src/cmakeDamjan Marion1-0/+44
Change-Id: Ibcb7105fa7e3c09efdce01bccd4de235fe33ea99 Signed-off-by: Damjan Marion <damarion@cisco.com>