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2018-02-02Add L3DSR feature in LB pluginHongjun Ni1-42/+76
L3DSR is used to overcome Layer 2 limitations of Direct Server Return Load Balancing. It maps VIP to DSCP bits, and reuse TOS bits to transfer it to server, and then server will get VIP from DSCP-to-VIP mapping. Please refer to https://www.nanog.org/meetings/nanog51/presentations/Monday/NANOG51.Talk45.nanog51-Schaumann.pdf Change-Id: I403ffeadfb04ed0265086eb2dc41f2e17f8f34cb Signed-off-by: Hongjun Ni <hongjun.ni@intel.com>
2017-08-11Fix IP fragment-id and offset issue in LB-GRE4Hongjun Ni1-0/+2
Change-Id: Ic1c440b2594c3ec4cdc75730069f16432cdb9587 Signed-off-by: Hongjun Ni <hongjun.ni@intel.com>
2017-04-06Use thread local storage for thread indexDamjan Marion1-11/+11
This patch deprecates stack-based thread identification, Also removes requirement that thread stacks are adjacent. Finally, possibly annoying for some folks, it renames all occurences of cpu_index and cpu_number with thread index. Using word "cpu" is misleading here as thread can be migrated ti different CPU, and also it is not related to linux cpu index. Change-Id: I68cdaf661e701d2336fc953dcb9978d10a70f7c1 Signed-off-by: Damjan Marion <damarion@cisco.com>
2017-01-01Move java,lua api and remaining plugins to src/Damjan Marion1-0/+419
Change-Id: I1c3b87e886603678368428ae56a6bd3327cbc90d Signed-off-by: Damjan Marion <damarion@cisco.com>