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- Relocate plugin tests for 'make test' into
src/plugins/*/test so that plugin test cases
are co-located with the plugin source code.
Type: refactor
Signed-off-by: Dave Wallace <dwallacelf@gmail.com>
Change-Id: I503e6a43528e14981799b735fa65674155713f67
Signed-off-by: Dave Wallace <dwallacelf@gmail.com>
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vppapigen has remapped legacy to typedefs behind the scenes
for some time now.
- update .api files to use new style typedefs.
- issue error on 'typeonly define' in .api files
- remove unneeded macros redefining vl_noop_handler
Type: refactor
Change-Id: I7a8c4a6dafacee6a131f95cd0e9b03a8c60dea8b
Signed-off-by: Paul Vinciguerra <pvinci@vinciconsulting.com>
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Type: fix
Change-Id: I9f8a8da31624637c060a9757256589c8f372f192
Signed-off-by: Florin Coras <fcoras@cisco.com>
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- lb_vip_dump/lb_vip_details - get all vip.
- lb_as_dump/lb_as_details - get all as list per vip.
- adds api unit test.
- adds vpp_lb to test framework.
Ticket:
Type: feature
Change-Id: I24be50d62c5234f3535cc840603ddd9df7eb3f07
Signed-off-by: Hongjun Ni <hongjun.ni@intel.com>
Signed-off-by: Paul Vinciguerra <pvinci@vinciconsulting.com>
Signed-off-by: Hongjun Ni <hongjun.ni@intel.com>
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Spinlock performance improved when implemented with compare_and_exchange
instead of test_and_set. All instances of test_and_set locks were refactored
to use clib_spinlock_t when possible. Some locks e.g. ssvm synchronize
between processes rather than threads, so they cannot directly use
clib_spinlock_t.
Type: refactor
Change-Id: Ia16b5d4cd49209b2b57b8df6c94615c28b11bb60
Signed-off-by: Jason Zhang <jason.zhang2@arm.com>
Reviewed-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
Reviewed-by: Lijian Zhang <Lijian.Zhang@arm.com>
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Type: refactor
Change-Id: I01329385684f4a4f477cb046079b554ae3024ded
Signed-off-by: Paul Vinciguerra <pvinci@vinciconsulting.com>
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If the corresponding vpp plugin is absent, return a non-zero
clib_error_t * from vat_plugin_register ("xxx plugin not loaded"). The
vat plugin calls dlclose on the vat plugin, and it disappears.
Depending on the plugin configuration, this can reduce the vpp virtual
size by several gigabytes.
Added a VAT_PLUGIN(<plugin-name>) macro to vat_helper_macros, clean up
boilerplate vat_plugin_register() implementations. Fixed a number of
non-standard vat_plugin_register methods.
Type: refactor
Change-Id: Iac908e5af7d5497c78d6aa9c3c51cdae08374045
Signed-off-by: Dave Barach <dave@barachs.net>
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Type: refactor
Change-Id: I8489ccd54411c2aa9355439c5641dc31012c64a2
Signed-off-by: Benoît Ganne <bganne@cisco.com>
Signed-off-by: Damjan Marion <damarion@cisco.com>
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- When deleting VIP member with flush, VPP will crash.
- When deleting VIP member without flush, vpp won't crash.
- This crash is almost 100% reproductive.
Ticket: VPP-1680
Type: fix
Change-Id: Ia4e8f9e0f987176c7f6ec52c92e66563f313b0c3
Signed-off-by: Hongjun Ni <hongjun.ni@intel.com>
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- Make plugin descriptions more consistent
so the output of "show plugin" can be
used in the wiki.
Change-Id: I4c6feb11e7dcc5a4cf0848eed37f1d3b035c7dda
Signed-off-by: Dave Wallace <dwallacelf@gmail.com>
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Change-Id: I96a1d4b2b3ae22cf164c0acd6db9b323cd70f51a
Signed-off-by: Paul Vinciguerra <pvinci@vinciconsulting.com>
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Change-Id: I61d8c35f48a059968909fc8523bd313fc4799389
Signed-off-by: Hongjun Ni <hongjun.ni@intel.com>
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Change-Id: Icd21f456089c72c91a8328f963bf47a8c7725195
Signed-off-by: Hongjun Ni <hongjun.ni@intel.com>
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* u32/u64/uword mismatches
* pointer-to-int fixes
* printf formatting issues
* issues with incorrect "ULL" and related suffixes
* structure alignment and padding issues
Change-Id: I70b989007758755fe8211c074f651150680f60b4
Signed-off-by: David Johnson <davijoh3@cisco.com>
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Change-Id: Ied34720ca5a6e6e717eea4e86003e854031b6eab
Signed-off-by: Dave Barach <dave@barachs.net>
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This is first part of addition of atomic macros with only macros for
__sync builtins.
- Based on earlier patch by Damjan (https://gerrit.fd.io/r/#/c/10729/)
Additionally
- clib_atomic_release macro added and used in the absence
of any memory barrier.
- clib_atomic_bool_cmp_and_swap added
Change-Id: Ie4e48c1e184a652018d1d0d87c4be80ddd180a3b
Original-patch-by: Damjan Marion <damarion@cisco.com>
Signed-off-by: Sirshak Das <sirshak.das@arm.com>
Reviewed-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
Reviewed-by: Ola Liljedahl <ola.liljedahl@arm.com>
Reviewed-by: Steve Capper <steve.capper@arm.com>
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Change-Id: Ic6823fb617ecae547a5f0e28b1e037848e40f682
Signed-off-by: Dave Barach <dave@barachs.net>
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Change-Id: Ib0a06ab71aed42eb5bb2ab2edf4844b2167e0610
Signed-off-by: Hongjun Ni <hongjun.ni@intel.com>
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Vector sort_arr was actually never freed.
This change also removes some nearby code which
happens to be totally useless.
Change-Id: I2f265c1b4770cbcd75a2fb69ea54e46e1b54245a
Signed-off-by: Pierre Pfister <ppfister@cisco.com>
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This patch depends on https://gerrit.fd.io/r/#/c/13260
Change-Id: If94968342935ebd24cf4ebed238e6a27d94959b7
Signed-off-by: Hongjun Ni <hongjun.ni@intel.com>
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Some counters (bytes, pkts) are formatted as signed instead of unsigned
in "show hardware-interfaces" and "show lb".
These stats counters are declared as u64.
Change-Id: Id1b588188bff4e36402beb8d07f779e9a5193956
Signed-off-by: Naoyuki Mori <naoyuki.mori@intel.com>
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Previously, a service is specified by vip.
This patch extend that a service is specified
by both vip and per-port-vip cases.
Change-Id: Icbfd1f972c6bafde7d85c6abb498576bd9ba250d
Signed-off-by: Hongjun Ni <hongjun.ni@intel.com>
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Change-Id: I90600d000afb02e8969f3c01bcf9e4b5c10a7d39
Signed-off-by: Mohsin Kazmi <sykazmi@cisco.com>
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Change-Id: I76a1711af0a920cce66e6dfb07d019ba505d55b7
Signed-off-by: Damjan Marion <damarion@cisco.com>
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Change-Id: Iffd5c45ab242a919592a1f686f7f880936b68a1a
Signed-off-by: Damjan Marion <damarion@cisco.com>
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Change-Id: Ibc59323e849810531dd0963e85493efad3b86857
Signed-off-by: Damjan Marion <damarion@cisco.com>
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Change-Id: I23be9c29227e7dd1bb11b5b7fa910bb61c2be6c9
Signed-off-by: Hongjun Ni <hongjun.ni@intel.com>
(cherry picked from commit b4b2488202ff4282cc4a7bd779cc33934286c5cd)
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It is cheaper to get thread index from vlib_main_t if available...
Change-Id: I4582e160d06d9d7fccdc54271912f0635da79b50
Signed-off-by: Damjan Marion <damarion@cisco.com>
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Change-Id: Iedebbac71d3e694b915d6a126c80ecc3b5473a4a
Signed-off-by: Hongjun Ni <hongjun.ni@intel.com>
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Fixes clang error: equality comparison with extraneous parentheses
Changing all the #defines to inlines.
Change-Id: I30a931679ac3325b23b249b1ae28c7c8cf54b012
Signed-off-by: Sirshak Das<sirshak.das@arm.com>
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Change-Id: Iea2c661cb3e0728bb2d10b06791ed84fed00f6a7
Signed-off-by: Hongjun Ni <hongjun.ni@intel.com>
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Change-Id: I3ac348a8cb1a515dfe1839eaa084c87719d282e1
Signed-off-by: Andrey "Zed" Zaikin <zed.0xff@gmail.com>
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Change-Id: I9343672c5765a5a4cb56c99fa5de176ddcac62c7
Signed-off-by: Andrey "Zed" Zaikin <zed.0xff@gmail.com>
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- hash is great. But it is a bit too slow for the DP. Use direct array indexing
to quickly retrieve the slave interface.
- the algorithm used by flow hash is great. But it is a bit too slow for the DP.
Use l2_hash_hash() extracted from lb_hash.h which ECMP is using. It makes use
of intrinsic crc32 instruction set.
- shortcut modulo arithmetic when the operand is 2**x (where x up to 4) to
avoid division instruction.
- special case for link count == 1 in bond_tx_fn()
- use clib_mem_unaligned to access data for the packet to avoid alignment error
- Fix some typos for packet tracing.
Change-Id: I8eae3ad497061c5473aa675ba894ee0211120d25
Signed-off-by: Steven <sluong@cisco.com>
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Add support of NAT66
Change-Id: Ie6aa79078a3835f989829b9a597c448dfd2f9ea3
Signed-off-by: Hongjun Ni <hongjun.ni@intel.com>
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Change-Id: I994649761fe2e66e12ae0e49a84fb1d0a966ddfb
Signed-off-by: Neale Ranns <nranns@cisco.com>
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Though dst-IP address would be change in LB plugin with L3DSR method,
layer-4 checksum would not be recomputed after this change.
Related changes:
- L3DSR: https://gerrit.fd.io/r/#/c/10203/
Change-Id: I98de7b8d80186ac77608a68050208c08d90b7c3b
Signed-off-by: Yusuke Tatsumi <ytatsumi@yahoo-corp.jp>
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L3DSR is used to overcome Layer 2 limitations
of Direct Server Return Load Balancing.
It maps VIP to DSCP bits, and reuse TOS bits to transfer it
to server, and then server will get VIP from DSCP-to-VIP mapping.
Please refer to https://www.nanog.org/meetings/nanog51/presentations/Monday/NANOG51.Talk45.nanog51-Schaumann.pdf
Change-Id: I403ffeadfb04ed0265086eb2dc41f2e17f8f34cb
Signed-off-by: Hongjun Ni <hongjun.ni@intel.com>
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This is a version of the VPP API generator in Python PLY. It supports
the existing language, and has a plugin architecture for generators.
Currently C and JSON are supported.
Changes:
- vl_api_version to option version = "major.minor.patch"
- enum support
- Added error checking and reporting
- import support (removed the C pre-processor)
- services (tying request/reply together)
Version:
option version = "1.0.0";
Enum:
enum colours {
RED,
BLUE = 50,
};
define foo {
vl_api_colours_t colours;
};
Services:
service {
rpc foo returns foo_reply;
rpc foo_dump returns stream foo_details;
rpc want_stats returns want_stats_reply
events ip4_counters, ip6_counters;
};
Future planned features:
- unions
- bool, text
- array support (including length)
- proto3 output plugin
- Refactor C/C++ generator as a plugin
- Refactor Java generator as a plugin
Change-Id: Ifa289966c790e1b1a8e2938a91e69331e3a58bdf
Signed-off-by: Ole Troan <ot@cisco.com>
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This allows arm platforms to also take advantage of crc32 hardware
acceleration.
* add a wrapper for crc32_u64. It's the only one really used. Using it
instead of a call to clib_crc32c() eases building symmetrical hash
functions.
* replace #ifdef on SSE4 by a test on clib_crc32c_uses_intrinsics.
Note: keep the test on i386
* fix typo in lb test log
Change-Id: I03a0897b70f6c1717e6901d93cf0fe024d5facb5
Signed-off-by: Gabriel Ganne <gabriel.ganne@enea.com>
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Change-Id: Ic8b193e93ce18ca82b294816aa7ee0ef31d64bc2
Signed-off-by: Pierre Pfister <ppfister@cisco.com>
Signed-off-by: Hongjun Ni <hongjun.ni@intel.com>
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Add new cli api: "test lb flowtable flush" which flushes everything.
Call this new cli function after the end of each lb unit test.
Change-Id: I71d04a7bfba398f7d4dd9cc3ed24bba786943663
Signed-off-by: Gabriel Ganne <gabriel.ganne@enea.com>
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* (vip - lbm->vips) is u64; change format from [%u] to [%lu]
* vip->plen is u8, but format looks for u32; add exlicit cast
(this cast was done implicitely)
On ARM platforms, these prevent a loop in the second call to
format_white_space() which would get an invalid (huge) indent value;
the result *looked like* an infinite loop.
Change-Id: I675ef2f98e4ba3d9e8aef12022d38b1d22981da8
Signed-off-by: Gabriel Ganne <gabriel.ganne@enea.com>
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Add one of these statements to foo.api:
vl_api_version 1.2.3
to generate a version tuple stanza in foo.api.h:
/****** Version tuple *****/
vl_api_version_tuple(foo, 1, 2, 3)
Change-Id: Ic514439e4677999daa8463a94f948f76b132ff15
Signed-off-by: Dave Barach <dave@barachs.net>
Signed-off-by: Ole Troan <ot@cisco.com>
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- always use 'va_args' as pointer in all format_* functions
- u32 for all 'indent' params as it's declaration was inconsistent
Change-Id: Ic5799309a6b104c9b50fec309cba789c8da99e79
Signed-off-by: Christophe Fontaine <christophe.fontaine@enea.com>
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- Teach vpp_api_test to send/receive API messages over sockets
- Add memfd-based shared memory
- Add api messages to create memfd-based shared memory segments
- vpp_api_test supports both socket and shared memory segment connections
- vpp_api_test pivot from socket to shared memory API messaging
- add socket client support to libvlibclient.so
- dead client reaper sends ping messages, container-friendly
- dead client reaper falls back to kill (<pid>, 0) live checking
if e.g. a python app goes silent for tens of seconds
- handle ping messages in python client support code
- teach show api ring about pairwise shared-memory segments
- fix ip probing of already resolved destinations (VPP-998)
We'll need this work to implement proper host-stack client isolation
Change-Id: Ic23b65f75c854d0393d9a2e9d6b122a9551be769
Signed-off-by: Dave Barach <dave@barachs.net>
Signed-off-by: Dave Wallace <dwallacelf@gmail.com>
Signed-off-by: Florin Coras <fcoras@cisco.com>
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Change-Id: I92de5b9ed42cda6c0438b8dc71892d322b642a70
Signed-off-by: flyingeagle23 <wang.hui56@zte.com.cn>
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Change-Id: Ic1c440b2594c3ec4cdc75730069f16432cdb9587
Signed-off-by: Hongjun Ni <hongjun.ni@intel.com>
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32-bit code still can use crc32c instructions, but it operates
on 32 registers
Change-Id: I9bb6b0b59635d6ea6a753584676ebcf59c8f6584
Signed-off-by: Damjan Marion <damarion@cisco.com>
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Change-Id: I72298aaae7d172082ece3a8edea4217c11b28d79
Signed-off-by: Dave Barach <dave@barachs.net>
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