summaryrefslogtreecommitdiffstats
path: root/src/plugins/map/map.h
AgeCommit message (Collapse)AuthorFilesLines
2020-02-20map: honor pre-resolve param in map-tAlexander Chernavin1-0/+28
With this commit, forward the translated packet directly to the specified next-hop if pre-resolve param is enabled in MAP-T. Type: fix Change-Id: Ie26080c7820318c7982599577a4af6e4d01a0574 Signed-off-by: Alexander Chernavin <achernavin@netgate.com>
2020-01-30map: handle ip4 ttl=1 packets in map-tAlexander Chernavin1-1/+2
With this commit, ICMP Time Exceeded is sent to sender when TTL expires at MAP BR. Type: fix Change-Id: I8effe163beab32596883127b819308cc355512c3 Signed-off-by: Alexander Chernavin <achernavin@netgate.com>
2019-10-09map: use ip6-full-reassembly instead of own codeKlement Sekera1-99/+0
Remove map's implementation of reassembly and use common ip6-full-reassembly functionality. This makes it easier to maintain by removing duplicate code/functionality. Type: refactor Change-Id: I430e888b704e28c100a9ce075d1460cb529e4676 Signed-off-by: Klement Sekera <ksekera@cisco.com>
2019-10-03map: fix indent-offKlement Sekera1-121/+133
Replace erroneous INDENT-OFF with INDENT-ON and reformat code which is non-conforming wrt to code style. Type: style Change-Id: Ia3310371e96b248e5da143fad8fdca3b2fb6650b Signed-off-by: Klement Sekera <ksekera@cisco.com>
2019-10-01map: use SVR for MAP-TKlement Sekera1-108/+13
This change is part of an effort to unify reassembly code. By removing shallow virtual reassembly functionality in MAP and using the common vnet provided shallow virtual reassembly, code size and complexity is reduced. Type: refactor Change-Id: Iec8edd039f7b967b53e17bb9bca228a8b452ac0c Signed-off-by: Klement Sekera <ksekera@cisco.com>
2019-09-26map: use SVR for MAP-EKlement Sekera1-0/+2
This change is part of an effort to unify reassembly code. By removing shallow virtual reassembly functionality in MAP and using the common vnet provided shallow virtual reassembly, code size and complexity is reduced. Type: refactor Change-Id: I431f47d4db97154fecaeaecd6719cfc3b83cfc4a Signed-off-by: Klement Sekera <ksekera@cisco.com>
2019-07-31vppinfra: refactor test_and_set spinlocks to use clib_spinlock_tjaszha031-6/+7
Spinlock performance improved when implemented with compare_and_exchange instead of test_and_set. All instances of test_and_set locks were refactored to use clib_spinlock_t when possible. Some locks e.g. ssvm synchronize between processes rather than threads, so they cannot directly use clib_spinlock_t. Type: refactor Change-Id: Ia16b5d4cd49209b2b57b8df6c94615c28b11bb60 Signed-off-by: Jason Zhang <jason.zhang2@arm.com> Reviewed-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com> Reviewed-by: Lijian Zhang <Lijian.Zhang@arm.com>
2019-07-30vppinfra: refactor use of CLIB_MEMORY_BARRIER ()jaszha031-2/+2
All instances of test_and_set locks used the following sequence to release the locks: CLIB_MEMORY_BARRIER (); p->lock = 0; // p is a generic struct with a TAS lock Use clib_atomic_release to generate more efficient assembly code. Type: refactor Change-Id: Idca3a38b1cf43578108bdd1afe83b6ebc17a4c68 Signed-off-by: Jason Zhang <jason.zhang2@arm.com> Reviewed-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com> Reviewed-by: Lijian Zhang <Lijian.Zhang@arm.com>
2019-07-30vppinfra: conformed spinlocks to use CLIB_PAUSEjaszha031-2/+3
Modified test-and-set spin locks to call CLIB_PAUSE () when spinning for code consistency. Decreases the memory bandwidth consumed. Type: fix Change-Id: I1cca4f87f44f23f257c7a35466cd2e7767072f51 Signed-off-by: Jason Zhang <jason.zhang2@arm.com> Reviewed-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com> Reviewed-by: Lijian Zhang <Lijian.Zhang@arm.com>
2019-06-18api: string type to convert to vectorOle Troan1-2/+2
Previous use of strndup() required user to remember to call free(). Now return a vector pointing directly to the API message string. Of course user must remember to copy the string out if lifetime is longer than API message lifetime. Change-Id: Ib5e2b3d52d258e1a42ea9ea9a9e04abbe360e2bf Type: fix Signed-off-by: Ole Troan <ot@cisco.com>
2019-03-19MAP: Add optional user-supplied 'tag' field in MAPs.Jon Loeliger1-2/+14
Like other entities, allow an arbitrray user-supplied 'tag' field to be place on created MAP domains. It is also later returned with the MAP details. You might be thinking "User assigned MAP name" here. As the MAP domain structure was at the limit of a cacheline size, introduce a parallel "extra data" vector with non-essential domain information in it. Change-Id: Icc12b64cc4cb3e040c9a475908b19f6abaf4c293 Signed-off-by: Jon Loeliger <jdl@netgate.com>
2019-01-07MAP: Prevent duplicate MAP-E/T graph nodes.Jon Loeliger1-0/+4
Change-Id: I6031f3f9cfa048a901a8424d33d47679115c2eb3 Signed-off-by: Jon Loeliger <jdl@netgate.com>
2018-12-21MAP: Convert from DPO to input feature.Jon Loeliger1-37/+79
Change-Id: I25c86aea23dff19656449b23133db27b1f062ac0 Signed-off-by: Jon Loeliger <jdl@netgate.com> Signed-off-by: Ole Troan <ot@cisco.com>
2018-12-19MAP: Add API support for MAP input feature.Jon Loeliger1-0/+5
Change-Id: I336919a1d3a9d1b404e375a30575cce5e5335137 Signed-off-by: Jon Loeliger <jdl@netgate.com>
2018-12-11MAP: Add API support for setting parameters.Jon Loeliger1-0/+18
Change-Id: Ic67073e1f2ebe54bee5cb96a951eb92a28b1de06 Signed-off-by: Jon Loeliger <jdl@netgate.com>
2018-11-22Revert "Add support for MAP-T CE (VPP-1058)"Ole Troan1-2/+0
This reverts commit 0ae15ed43aaa600a75ca4c154bc62478820c00b4. Re-add MAP CE support later. This patch polluted the code with too many if (ce) ... Change-Id: Ia0ffd6fdb452aa5d30abec57772c17fc16fb0dbd Signed-off-by: Ole Troan <ot@cisco.com>
2018-11-14Remove c-11 memcpy checks from perf-critical codeDave Barach1-1/+1
Change-Id: Id4f37f5d4a03160572954a416efa1ef9b3d79ad1 Signed-off-by: Dave Barach <dave@barachs.net>
2018-10-19vppinfra: add atomic macros for __sync builtinsSirshak Das1-4/+4
This is first part of addition of atomic macros with only macros for __sync builtins. - Based on earlier patch by Damjan (https://gerrit.fd.io/r/#/c/10729/) Additionally - clib_atomic_release macro added and used in the absence of any memory barrier. - clib_atomic_bool_cmp_and_swap added Change-Id: Ie4e48c1e184a652018d1d0d87c4be80ddd180a3b Original-patch-by: Damjan Marion <damarion@cisco.com> Signed-off-by: Sirshak Das <sirshak.das@arm.com> Reviewed-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com> Reviewed-by: Ola Liljedahl <ola.liljedahl@arm.com> Reviewed-by: Steve Capper <steve.capper@arm.com>
2018-09-27MAP: 64-bit DMROle Troan1-6/+10
Change-Id: I261e11f1006039e4a4019fec2fd3271763ae476a Signed-off-by: Ole Troan <ot@cisco.com>
2018-06-25MAP: Move MAP-E/T to a plugin.Ole Troan1-0/+597
Only remaining traces of MAP in the src/vnet is now in buffer.h. Awaiting a new buffer opaque API (hint, hint). Change-Id: Ie165561484731f1d7ed6e0f604b43624e06db3f0 Signed-off-by: Ole Troan <ot@cisco.com>