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Change-Id: I0ba5175be077c40556f2a3ce629c5bbcd71e0a81
Signed-off-by: Damjan Marion <damarion@cisco.com>
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Change-Id: Ifb841312d4a382547153b24903230b407f649e73
Signed-off-by: Damjan Marion <damarion@cisco.com>
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Change-Id: Ied34720ca5a6e6e717eea4e86003e854031b6eab
Signed-off-by: Dave Barach <dave@barachs.net>
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Reduce default queue size to twice the vlib frame size. This throttles
the PP from transferring more packets than are necessary for the next
round of graph execution on a core. When combined with DMA'ing into L3
cache, Mpps for 64B packets increases 35%.
Change-Id: I0afe426d23560f262fdc56accb6302b099bd0076
Signed-off-by: Brian Brooks <brian.brooks@arm.com>
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Change-Id: I5e5b2dd4f4bc3e257824015c723228ac5128d6a0
Signed-off-by: Brian Brooks <brian.brooks@arm.com>
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Depends in musdk 17.10 [1], tested on MACCHIATObin [2] board.
currently only coves PP2.
musdk must be compiled with:
./configure --enable-bpool-dma=64
[1] https://github.com/MarvellEmbeddedProcessors/musdk-marvell
[2] http://macchiatobin.net
Change-Id: I0247a6b860b0a067c54190eae0bd3fe08de234ad
Signed-off-by: Damjan Marion <damarion@cisco.com>
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