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Add the ability to configure the pp2 rx and tx queue sizes in the CLI.
Type: improvement
Signed-off-by: Christian E. Hopps <chopps@chopps.org>
Change-Id: I6a824f92e22fa47fec3d84525cc2d82524ddf639
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Type: fix
Signed-off-by: Ole Troan <ot@cisco.com>
Change-Id: I1af842f38f90d3ede971da74cd28179b61f613cf
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Support create/delete interface with PP2 api
Type: feature
Signed-off-by: Jianlin Lv <Jianlin.Lv@arm.com>
Change-Id: Ia9c0ac0f237fd9f71f5480d736d6bcabee763fff
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Type: feature
Change-Id: I913f08383ee1c24d610c3d2aac07cef402570e2c
Signed-off-by: Damjan Marion <damarion@cisco.com>
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Multiple API message handlers call vnet_get_sup_hw_interface(...)
without checking the inbound sw_if_index. This can cause a
pool_elt_at_index ASSERT in a debug image, and major disorder in a
production image.
Given that a number of places are coded as follows, add an
"api_visible_or_null" variant of vnet_get_sup_hw_interface, which
returns NULL given an invalid sw_if_index, or a hidden sw interface:
- hw = vnet_get_sup_hw_interface (vnm, sw_if_index);
+ hw = vnet_get_sup_hw_interface_api_visible_or_null (vnm, sw_if_index);
if (hw == NULL || memif_device_class.index != hw->dev_class_index)
return clib_error_return (0, "not a memif interface");
Rename two existing xxx_safe functions -> xxx_or_null to make it
obvious what they return.
Type: fix
Change-Id: I29996e8d0768fd9e0c5495bd91ff8bedcf2c5697
Signed-off-by: Dave Barach <dave@barachs.net>
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fix compile issue
"src/plugins/marvell/pp2/pp2.c:247:62: error: 'vm' undeclared (first use in this function)"
Change-Id: Ia23e21b07c29faefa6e363816a220e312adba81c
Signed-off-by: Jianlin Lv <Jianlin.Lv@arm.com>
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- Make plugin descriptions more consistent
so the output of "show plugin" can be
used in the wiki.
Change-Id: I4c6feb11e7dcc5a4cf0848eed37f1d3b035c7dda
Signed-off-by: Dave Wallace <dwallacelf@gmail.com>
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Change-Id: I4e836244409c98739a13092ee252542a2c5fe259
Signed-off-by: Damjan Marion <damarion@cisco.com>
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Example:
buffers {
default data-size 1536
}
Change-Id: I5b4436850ca18025c9fdcfc7ed648c2c2732d660
Signed-off-by: Damjan Marion <damarion@cisco.com>
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Change-Id: I0ba5175be077c40556f2a3ce629c5bbcd71e0a81
Signed-off-by: Damjan Marion <damarion@cisco.com>
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This reverts commit 1e59f9ddbdda14591967e1d66eab8623f9ba58e4.
Change-Id: Iae1d372b887e170d28cac2fe4c61325ee5a5894a
Signed-off-by: Damjan Marion <damarion@cisco.com>
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Change-Id: Id4f37f5d4a03160572954a416efa1ef9b3d79ad1
Signed-off-by: Dave Barach <dave@barachs.net>
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Typically we have scalar_size == 0, so it doesn't matter
but vlib_frame_args was providing pointer to scalar frame
data, not vector data. To avoid future confusion function
is renamed to vlib_frame_scalar_args(...)
Change-Id: I48b75523b46d487feea24f3f3cb10c528dde516f
Signed-off-by: Damjan Marion <damarion@cisco.com>
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Change-Id: Ifb841312d4a382547153b24903230b407f649e73
Signed-off-by: Damjan Marion <damarion@cisco.com>
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Change-Id: Ied34720ca5a6e6e717eea4e86003e854031b6eab
Signed-off-by: Dave Barach <dave@barachs.net>
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Change-Id: I0b42ac6b05bc9910904a97924ea4bebc84507d4d
Signed-off-by: Damjan Marion <damarion@cisco.com>
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Change-Id: I4ff1a6ed4e42381ed68a62362ba05e940b615da2
Signed-off-by: Brian Brooks <brian.brooks@arm.com>
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Change-Id: Iffd5c45ab242a919592a1f686f7f880936b68a1a
Signed-off-by: Damjan Marion <damarion@cisco.com>
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Change-Id: Id4b73368382b5e78c138987fe092429af5cb0afd
Signed-off-by: Damjan Marion <damarion@cisco.com>
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Change-Id: Ibc59323e849810531dd0963e85493efad3b86857
Signed-off-by: Damjan Marion <damarion@cisco.com>
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Reduce default queue size to twice the vlib frame size. This throttles
the PP from transferring more packets than are necessary for the next
round of graph execution on a core. When combined with DMA'ing into L3
cache, Mpps for 64B packets increases 35%.
Change-Id: I0afe426d23560f262fdc56accb6302b099bd0076
Signed-off-by: Brian Brooks <brian.brooks@arm.com>
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It is cheaper to get thread index from vlib_main_t if available...
Change-Id: I4582e160d06d9d7fccdc54271912f0635da79b50
Signed-off-by: Damjan Marion <damarion@cisco.com>
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Increase batch size when recycling buffers. This increases Mpps by 7%.
Change-Id: I2a460611d9c36e9bf087b076fc4e187acf61108f
Signed-off-by: Brian Brooks <brian.brooks@arm.com>
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Change-Id: I5e5b2dd4f4bc3e257824015c723228ac5128d6a0
Signed-off-by: Brian Brooks <brian.brooks@arm.com>
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Change-Id: Ibcffee7d20dbb79720199bcd82d2353f39d5544f
Signed-off-by: Chris Luke <chrisy@flirble.org>
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Depends in musdk 17.10 [1], tested on MACCHIATObin [2] board.
currently only coves PP2.
musdk must be compiled with:
./configure --enable-bpool-dma=64
[1] https://github.com/MarvellEmbeddedProcessors/musdk-marvell
[2] http://macchiatobin.net
Change-Id: I0247a6b860b0a067c54190eae0bd3fe08de234ad
Signed-off-by: Damjan Marion <damarion@cisco.com>
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