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Fix ordering in CMakeLists.txt
Type: refactor
Signed-off-by: Ray Kinsella <mdr@ashroe.eu>
Change-Id: I8e71e4fbc048a80c4b250c2a66cfd8a522bde5f4
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Breakdown the distribution of uops delivered to the frontend.
Collerates directly with the source of the uops.
Type: improvement
Signed-off-by: Ray Kinsella <mdr@ashroe.eu>
Change-Id: I93a57dbe56dfa0f378527844aa4e63f45a548e55
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Topdown level 1 and 2 for Intel Ice Lake (ICX). Limiting topdown support
to THREAD for the moment on Ice Lake, as NODE support is still
unreliable. Also removing Topdown Level 1 from Sapphire Rapids onwards,
as Topdown LeveL 2 also shows Level 1 on Sapphire, and it reduces the
overall number of bundles.
Type: improvement
Signed-off-by: Ray Kinsella <mdr@ashroe.eu>
Change-Id: Iaa68b711dc8b6fb1090880b411debadb3c37f8bc
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Add a bundle to measure topdown backend bound core cycles, will indicate if any
given execution port has contention.
Type: improvement
Signed-off-by: Ray Kinsella <mdr@ashroe.eu>
Change-Id: I37d1b38c101ac42d51c10fa4452b822d34b729c9
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Renamed memory stalls to topdown backend-bound-mem, added topdown
frontend-bound-latency and frontend-bound-bandwidth.
Type: improvement
Signed-off-by: Ray Kinsella <mdr@ashroe.eu>
Change-Id: I70f42b6b63fe2502635cad4aed4271e2bbdda5f1
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Rename the memory bandwidth bundle to memory stalls, to differentiate it
from the bundle that measures memory controller bandwidth boundedness.
Type: refactor
Signed-off-by: Ray Kinsella <mdr@ashroe.eu>
Change-Id: I828c73b6f769046e1ab592712bdf81ceefcd7911
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Added an Intel Ice Lake specific bundles to measure pci bandwidth through the
Intel IO PMU. The "PCI" bundle measures read/writes from pci devices. The "CPU"
bundle measure read/writes from cpus to pci devices.
Type: improvement
Signed-off-by: Ray Kinsella <mdr@ashroe.eu>
Change-Id: Id48cef5988113e8dc4690b97d22243311bfa7961
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Enable Topdown Level 1 support on Snowridge,
enabled with standard CPU events on small core.
Type: improvement
Signed-off-by: Ray Kinsella <mdr@ashroe.eu>
Change-Id: I58ad09383de7464265ac1b69e683f253591e3b5e
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This code seems really usefull for reuse in
other plugins, for pretty table formatting
Type: feature
Change-Id: Ib5784a0dfc81b7d5a5d1f5ccdd02072e460a50fb
Signed-off-by: Nathan Skrzypczak <nathan.skrzypczak@gmail.com>
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Type: make
Change-Id: I2958e9eddadee6434766ecd3cdb3b9cea742ed64
Signed-off-by: Damjan Marion <damarion@cisco.com>
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Added memory bandwidth boundedness bundle, closely related to cache-hierarchy.
This bundle works on ICX only, due to an ICX specific counter.
Type: improvement
Signed-off-by: Ray Kinsella <mdr@ashroe.eu>
Change-Id: Id385bd5f4e645ac020774e311c623afb64b79b1e
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Adding perfmon node TMAM support on ICX.
Type: improvement
Signed-off-by: Ray Kinsella <mdr@ashroe.eu>
Change-Id: I48a9a9ff6a72efc28eaf0cb11ef39fb62cebb126
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Show % time spent per graph node in power level 0, 1 and 2.
Type: improvement
Signed-off-by: Ray Kinsella <mdr@ashroe.eu>
Change-Id: I678ee812fa993af39568e9f9dfbf2396fc13ad42
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Add branches, branches taken (a meteric for branchy code), and branch
misses.
Type: improvement
Signed-off-by: Ray Kinsella <mdr@ashroe.eu>
Change-Id: If92d4aaf9d0a6e3b99b8c19e6311cc08ca470590
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Added basic support for counting cache hits and misses per node.
Type: improvement
Signed-off-by: Ray Kinsella <mdr@ashroe.eu>
Change-Id: Ic566611fd3d4246ccaa2117d8f74a569a6862e80
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Type: feature
Change-Id: I2c14f82393d11fc05c6d229f5c58603ab5c0f14d
Signed-off-by: Damjan Marion <damarion@cisco.com>
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Type: refactor
Change-Id: I1303219f9f2a25d821737665903b0264edd3de32
Signed-off-by: Damjan Marion <damarion@cisco.com>
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Callbacks for monitoring and performance measurement:
- Add new callback list type, with context
- Add callbacks for API, CLI, and barrier sync
- Modify node dispatch callback to pass plugin-specific context
- Modify perfmon plugin to keep PMC samples local to the plugin
- Include process nodes in dispatch callback
- Pass dispatch function return value to callback
Type: refactor
Signed-off-by: Tom Seidenberg <tseidenb@cisco.com>
Change-Id: I28b06c58490611e08d76ff5b01b2347ba2109b22
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EXAMPLE:
src/plugins/perfmon/intel_json_to_c.py \
-i skylakex_core_v1.12.json \
-o src/plugins/perfmon/perfmon_intel_skx.c \
-m 0x55,0 \
-m 0x55,1 \
-m 0x55,2 \
-m 0x55,3
Change-Id: I16ce059e231d340ecfcb6f6638e29c5b46304683
Signed-off-by: Damjan Marion <damarion@cisco.com>
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Built a tool to chew up https://download.01.org/perfmon/mapfile.csv,
and output a table in this format:
typedef struct {
u8 model;
u8 stepping;
u8 has_stepping;
char *filename;
} file_by_model_and_stepping_t;
static const file_by_model_and_stepping_t fms_table [] =
{
/* model, stepping, stepping valid, file */
{ 0x2E, 0x0, 0, "NehalemEX_core_V2.json" },
{ 0x1E, 0x0, 0, "NehalemEP_core_V2.json" },
<snip>
{ 0x55, 0x5, 1, "cascadelakex_core_v1.00.json" },
{ 0x55, 0x6, 1, "cascadelakex_core_v1.00.json" },
{ 0x55, 0x7, 1, "cascadelakex_core_v1.00.json" },
<snip>
Change-Id: Ie0e8a7e851799e9d060b966047745039c066ec7b
Signed-off-by: Dave Barach <dave@barachs.net>
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The license issue is resolved, so we can package the .json
files. Added to the vpp-dev package in .tar.xz form, which saves a lot
of space.
Updated the perfmon error log entry: tell folks where to find the
compressed tarball, and how to extract it.
Change-Id: I3ed351fbf154cc3ba22d5f9c666acff77a2a14cf
Signed-off-by: Dave Barach <dave@barachs.net>
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Change-Id: Ie5a00c15ee9536cc61afab57f6cadc1aa1972f3c
Signed-off-by: Dave Barach <dave@barachs.net>
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