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2019-05-16init / exit function orderingDave Barach1-7/+6
The vlib init function subsystem now supports a mix of procedural and formally-specified ordering constraints. We should eliminate procedural knowledge wherever possible. The following schemes are *roughly* equivalent: static clib_error_t *init_runs_first (vlib_main_t *vm) { clib_error_t *error; ... do some stuff... if ((error = vlib_call_init_function (init_runs_next))) return error; ... } VLIB_INIT_FUNCTION (init_runs_first); and static clib_error_t *init_runs_first (vlib_main_t *vm) { ... do some stuff... } VLIB_INIT_FUNCTION (init_runs_first) = { .runs_before = VLIB_INITS("init_runs_next"), }; The first form will [most likely] call "init_runs_next" on the spot. The second form means that "init_runs_first" runs before "init_runs_next," possibly much earlier in the sequence. Please DO NOT construct sets of init functions where A before B actually means A *right before* B. It's not necessary - simply combine A and B - and it leads to hugely annoying debugging exercises when trying to switch from ad-hoc procedural ordering constraints to formal ordering constraints. Change-Id: I5e4353503bf43b4acb11a45fb33c79a5ade8426c Signed-off-by: Dave Barach <dave@barachs.net>
2019-05-08session: send tx events when data is dequeuedFlorin Coras1-0/+3
Change-Id: Ib8cb19361c42e38e3f68d7147358378fff161eb1 Signed-off-by: Florin Coras <fcoras@cisco.com>
2019-05-03plugins: clean up plugin descriptionsDave Wallace1-1/+1
- Make plugin descriptions more consistent so the output of "show plugin" can be used in the wiki. Change-Id: I4c6feb11e7dcc5a4cf0848eed37f1d3b035c7dda Signed-off-by: Dave Wallace <dwallacelf@gmail.com>
2019-04-18tls: allow engines to customize closeFlorin Coras1-0/+24
Change-Id: I11ac3e4f59206902e5dfc326f815c877c5dd6643 Signed-off-by: Florin Coras <fcoras@cisco.com>
2019-04-16svm_fifo rework to avoid contention on cursizeSirshak Das1-7/+7
Problems Addressed: - Contention of cursize by producer and consumer. - Reduce the no of modulo operations. Changes: - Synchronization between producer and consumer changed from cursize to head and tail indexes Implications: reduces the usable size of fifo by 1. - Using weaker memory ordering C++11 atomics to access head and tail based on producer and consumer role. - Head and tail indexes are unsigned 32 bit integers. Additions and subtraction on them are implicit 32 bit Modulo operation. - Adding weaker memory ordering variants of max_enq, max_deq, is_empty and is_full Using them appropriately in all places. Perfomance improvement (iperf3 via Hoststack): iperf3 Server: Marvell ThunderX2(AArch64) - iperf3 Client: Skylake(x86) ~6%(256 rxd/txd) - ~11%(2048 rxd/txd) Change-Id: I1d484e000e437430fdd5a819657d1c6b62443018 Signed-off-by: Sirshak Das <sirshak.das@arm.com> Reviewed-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
2019-02-18tls: fix openssl/mbedtls use of app_wrk indexFlorin Coras1-2/+7
Change-Id: I7ccc948357d815a1bd4279a7079cf4db2949183c Signed-off-by: Florin Coras <fcoras@cisco.com>
2019-02-04session: cleanup part 1Florin Coras3-22/+19
Rename core data structures. This will break compatibility for out of tree builtin apps. - stream_session_t to session_t - server_rx/tx_fifo to rx/tx_fifo - stream_session.h to session_types.h - update copyright Change-Id: I414097c6e28bcbea866fbf13b8773c7db3f49325 Signed-off-by: Florin Coras <fcoras@cisco.com>
2019-01-28update openssl TLS async to align with openssl master branchPing Yu1-4/+2
Need to align with 3.0.0 version Change-Id: I4e8aec1f1226ce09963a9bbb3a9170d1863059ec Signed-off-by: Ping Yu <ping.yu@intel.com>
2019-01-07Change vpp code to align with openssl interface changePing Yu3-36/+27
PR in openssl community is almost done, and need to change some code in VPP to align with the openssl interface. Change-Id: Ic7da53e507b67b53958760d07738dd774b1c526d Signed-off-by: Ping Yu <ping.yu@intel.com>
2018-11-08tlsopenssl: remove unused #includeKlement Sekera1-1/+0
Change-Id: I294e4f93e925c58765d4692337208fcee7d12886 Signed-off-by: Klement Sekera <ksekera@cisco.com>
2018-10-23c11 safe string handling supportDave Barach2-3/+3
Change-Id: Ied34720ca5a6e6e717eea4e86003e854031b6eab Signed-off-by: Dave Barach <dave@barachs.net>
2018-10-02tls: fix disconnects for sessions with pending dataFlorin Coras1-12/+12
TLS can enqueue events to itself when app session queue cannot be entirely drained. If a pending disconnect is handled before any such event, session layer may try to dequeue data on deallocated sessions. Change-Id: I5bfc4d53ce95bc16b6a01e1b0e644aafa1ca311b Signed-off-by: Florin Coras <fcoras@cisco.com>
2018-09-27add cmake build option to build openssl asyncPing Yu1-0/+11
This code is orignally in automake, but it is missing in cmake. Thus add it to make openssl async work in cmake build system Change-Id: Ie69ee9c2099273e51ce13ccab27bdd2619db4814 Signed-off-by: Ping Yu <ping.yu@intel.com>
2018-09-15tls: fix openssl engine write complete conditionFlorin Coras1-1/+1
Change-Id: Ic1526f6916970ce2b0c4fc0d148d4396fa629b5f Signed-off-by: Florin Coras <fcoras@cisco.com>
2018-09-13Add a polling configure to make thread bind with hardware enginePing Yu1-4/+9
Change-Id: Ib4130098dd9bf45370bdee9a04e4804074df58b1 Signed-off-by: Ping Yu <ping.yu@intel.com>
2018-09-04add option to allow user to set ciphersPing Yu2-6/+33
Orignal code hard code TLS ciphers, and this patch allows user to set ciphers via CLI, so that user can perform the TLS testing without re-building the code. Change-Id: I0d497f6d906af25bc7a33cee5747f9a1d63e0683 Signed-off-by: Ping Yu <ping.yu@intel.com>
2018-08-26cmake: move functions to src/cmakeDamjan Marion1-0/+1
Change-Id: Ibcb7105fa7e3c09efdce01bccd4de235fe33ea99 Signed-off-by: Damjan Marion <damarion@cisco.com>
2018-08-25cmake: improve add_vpp_plugin macroDamjan Marion1-2/+8
Change-Id: Iffd5c45ab242a919592a1f686f7f880936b68a1a Signed-off-by: Damjan Marion <damarion@cisco.com>
2018-08-17CMake as an alternative to autotools (experimental)Damjan Marion1-0/+18
Change-Id: Ibc59323e849810531dd0963e85493efad3b86857 Signed-off-by: Damjan Marion <damarion@cisco.com>
2018-08-17optimize init_server to reduce session overheadPing Yu2-33/+107
move un-necessary session based operation to listener split orignal openssl ctx to be session based ctx and listen ctx Change-Id: Id6c54f47b0e2171fd8924a45efcd5266ce5402d5 Signed-off-by: Ping Yu <ping.yu@intel.com>
2018-08-14reduce polling and resume overhead by checking if inflight request existsPing Yu1-3/+6
Change-Id: I0777a00f0cc082bab3348be8ec0be39faa50ffed Signed-off-by: Ping Yu <ping.yu@intel.com>
2018-07-23tls: avoid possible async handler duplicationPing Yu1-1/+1
One handler is good enough when engine sends out a retry status Thus this patch will just go one branch Change-Id: Id81cb3fa67d2b322b0fe1b2f62cd866cf3491eb4 Signed-off-by: Ping Yu <ping.yu@intel.com>
2018-07-19Add a new communication channel between VPP and openssl enginePing Yu3-19/+59
Thus when engine buffer is full during a burst in performance tesing, this code will help VPP handle retry machansim. Change-Id: I0f9fc05d3dba8a54d34dca4c6137700d6c80f714 Signed-off-by: Ping Yu <ping.yu@intel.com>
2018-07-16Enable openssl TLS async support in client for HW acclerationPing Yu1-0/+15
Change-Id: I003e41786c549c6451a1e9e178f5871d32c20e6e Signed-off-by: Ping Yu <ping.yu@intel.com>
2018-06-15TLS async supportPing Yu3-22/+735
Change-Id: I26194e00dfb85e5cd1c65ff4e6ffd665be2d719b Signed-off-by: Ping Yu <ping.yu@intel.com>
2018-05-31Fix TLS issue to load certification and keyPing Yu1-0/+2
Change-Id: If1ef2d4bc6f90a4d4b6a345c63723117834c6504 Signed-off-by: Ping Yu <ping.yu@intel.com>
2018-03-15tls: add openssl engineFlorin Coras1-0/+675
Change-Id: I6c215858d2c9c620787632b570950b15274c0df2 Signed-off-by: Florin Coras <fcoras@cisco.com>