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Fix a day-1 bug, possibly dating back as far as 2002. The zap64() game
involves fetching 8 byte chunks, and clearing octets not to be
included in the key.
That's fine *unless* the 8-byte fetch happens to cross a page boundary
into unmapped or no-access space.
Type: fix
Signed-off-by: Dave Barach <dave@barachs.net>
Change-Id: I4607e9840032257c96ba7387f86c931c0921749d
(cherry picked from commit 7e2cea3d26701ff1d80fda7d8ca907890e3e7baa)
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There is no bt->samples for this test, do not use it.
Type: fix
Change-Id: I2090290887bc5c0b5cdb0561cf2bf72a87781089
Signed-off-by: Benoît Ganne <bganne@cisco.com>
(cherry picked from commit b0a7c484eec9a813751e6e3fa71a9955ad5f0f74)
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Type: feature
Change-Id: I6bd675dc28dbc34293e895911efe986844c0564f
Signed-off-by: Florin Coras <fcoras@cisco.com>
(cherry picked from commit 7436b436733ea7217e745f3cc9971aaff1e3dfa4)
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Type: feature
Change-Id: I201155b1b92cf7e57310af726879dab039090582
Signed-off-by: Florin Coras <fcoras@cisco.com>
(cherry picked from commit 558e3e09577a7b49e2fec58e8ac27f3f3ae0592f)
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Type: refactor
Signed-off-by: Simon Zhang <yuwei1.zhang@intel.com>
Change-Id: I8674ff5f6f6336b256b7df8187afbb36ddef71fb
(cherry picked from commit e7eba48937c52478d3844745ebb63a4b9ce8d681)
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Type: fix
Change-Id: I3b4cb8fc17387693d6ad6cdef004ca99cd56bc23
Signed-off-by: Florin Coras <fcoras@cisco.com>
(cherry picked from commit 92f190a802b6999ce68696032e556aa75171e1cc)
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Type: feature
Add option to always compile in debugging infra. Debug verbosity can be
controlled via configuration updatable via cli. Compile time inclusion
and configuration of event logging verbosity is still available in order
to minimize event logging impact.
Change-Id: I9d946efe9fa4204fdace1adb1d6588c97b5ae758
Signed-off-by: Florin Coras <fcoras@cisco.com>
(cherry picked from commit a436a42221280888acd09858c7353e694c359bca)
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Type: feature
Control ack generation and retransmissions with session layer scheduler.
Change-Id: Iacdf9f84ab81f44851980aa45a83e75f29be2b7b
Signed-off-by: Florin Coras <fcoras@cisco.com>
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Type: feature
Change-Id: Ic720d56a6f8901efde2a58519bc9aa553205a9a6
Signed-off-by: Gary Boon <gboon@cisco.com>
Signed-off-by: Dave Barach <dave@barachs.net>
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Type: feature
Change-Id: I21511c1abea703da67f1a491e73342496275c498
Signed-off-by: Florin Coras <fcoras@cisco.com>
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- this remove the need to iterate through all state when deleting an SA
- and ensures that if the SA is deleted by the client is remains for use
in any state until that state is also removed.
Type: feature
Change-Id: I438cb67588cb65c701e49a7a9518f88641925419
Signed-off-by: Neale Ranns <nranns@cisco.com>
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Type:feature
- sample rtt estimation
- report acked+sacked
- report last lost bytes
- use snd_una == snd_nxt to detect 0 bytes in flight
Change-Id: I83181261fdb375c7e33d24b7a82343561e6a905f
Signed-off-by: Florin Coras <fcoras@cisco.com>
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Type: fix
Ticket: VPP-1649
Change-Id: I93a393eca80065c379035478500e75e855f39b12
Signed-off-by: Dave Barach <dave@barachs.net>
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Type: fix
- make sure that chunks and the rbtree are initialized if fifo segment
allocates multiple chunks for the fifo.
- ensure head/tail chunks are updated on all enqueue/dequeue events,
including when dropping data.
- more unit tests
Also fixes dequeue drop updates of head chunk.
Change-Id: I77f3550bc4e8b4e077f80ea87fe82b83ed013aeb
Signed-off-by: Florin Coras <fcoras@cisco.com>
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Type: fix
Found by coverity.
Change-Id: Ibfc753d2c42219d275e3722d6ce1ef0cec189adf
Signed-off-by: Florin Coras <fcoras@cisco.com>
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Type: feature
Try to also catch weirdness when running tests on arm cpus.
Change-Id: I45ab7c225f43623447271e67ebf37f94236a288f
Signed-off-by: Florin Coras <fcoras@cisco.com>
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Type: fix
Attempt at fixing a random failing tcp test
Change-Id: I73aa31e26dd2df77d8b975e4fc88df16d8991863
Signed-off-by: Florin Coras <fcoras@cisco.com>
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Type:fix
Change-Id: Icab89337eb3dbdc93d0fb453cfd34090026072b7
Signed-off-by: Florin Coras <fcoras@cisco.com>
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Type: feature
First cut implementation with limited testing. The feature is not
enabled by default and the expectation is that cc algorithms will enable
it on demand.
Change-Id: I92b70cb4dabcff0e9ccd1d725952c4880af394da
Signed-off-by: Florin Coras <fcoras@cisco.com>
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Type: refactor
Also reformats and fixes some of the tests.
Change-Id: I074c677fd9b28e192f72a2db32f6f2dbda9a314f
Signed-off-by: Florin Coras <fcoras@cisco.com>
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this change is being made to fix a crash when current_data < 0 in buffer
linearization function
Ticket: N/A
Type: fix
Fixes: f883f6a1132ad4bb7aa9d9a79d420274fbcf3b64
Change-Id: Ia4ede823f673780e0c30d075b091db42e183650d
Signed-off-by: Klement Sekera <ksekera@cisco.com>
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Type:fix
Make sure tnil color is black and that the right node colors are
updated.
Change-Id: Ibd9d7ea9438df4dab977202955957824723a865d
Signed-off-by: Florin Coras <fcoras@cisco.com>
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Ring data space is following ring vec_header_t and ring elements immediately.
Add verification code in session_test.
Type: fix
Change-Id: I0bfa096a9f459128a588821d99b5cdb4f10ede38
Signed-off-by: Lijian Zhang <Lijian.Zhang@arm.com>
Reviewed-by: Sirshak Das <Sirshak.Das@arm.com>
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Enhance the route add/del APIs to take a set of paths rather than just one.
Most unicast routing protocols calcualte all the available paths in one
run of the algorithm so updating all the paths at once is beneficial for the client.
two knobs control the behaviour:
is_multipath - if set the the set of paths passed will be added to those
that already exist, otherwise the set will replace them.
is_add - add or remove the set
is_add=0, is_multipath=1 and an empty set, results in deleting the route.
It is also considerably faster to add multiple paths at once, than one at a time:
vat# ip_add_del_route 1.1.1.1/32 count 100000 multipath via 10.10.10.11
100000 routes in .572240 secs, 174751.80 routes/sec
vat# ip_add_del_route 1.1.1.1/32 count 100000 multipath via 10.10.10.12
100000 routes in .528383 secs, 189256.54 routes/sec
vat# ip_add_del_route 1.1.1.1/32 count 100000 multipath via 10.10.10.13
100000 routes in .757131 secs, 132077.52 routes/sec
vat# ip_add_del_route 1.1.1.1/32 count 100000 multipath via 10.10.10.14
100000 routes in .878317 secs, 113854.12 routes/sec
vat# ip_route_add_del 1.1.1.1/32 count 100000 multipath via 10.10.10.11 via 10.10.10.12 via 10.10.10.13 via 10.10.10.14
100000 routes in .900212 secs, 111084.93 routes/sec
Change-Id: I416b93f7684745099c1adb0b33edac58c9339c1a
Signed-off-by: Neale Ranns <neale.ranns@cisco.com>
Signed-off-by: Ole Troan <ot@cisco.com>
Signed-off-by: Paul Vinciguerra <pvinci@vinciconsulting.com>
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Type: refactor
Change-Id: I97fa59a0ba0b6b7a98698926020ffffcf6ae6ba3
Signed-off-by: Nathan Skrzypczak <nathan.skrzypczak@gmail.com>
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Change-Id: I055014ff0bc7f6d32d59eaf3511ecb91e268d49b
Signed-off-by: Damjan Marion <damarion@cisco.com>
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- track fifo segment free and chunk freelist memory
- improve fifo alloc. If there are enough chunks to satisfy a fifo
allocation request but not enough free memory, allocate a multi-chunk
fifo
- add apis to preallocate chunks and fifo headers
- more tests
Change-Id: If18dba7ab856272c9f565d36ac36365139793e0b
Signed-off-by: Florin Coras <fcoras@cisco.com>
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The unit and code coverage tests are boring. The rest of the patch
involves test and packet-generator infra cleanups.
Teach the "make test-xxx" family of targets to set the api test plugin
path correctly, to make "binary-api <api-message-name> <args>" debug
CLI commands work correctly in the "make test"
environment. Unfortunately involves both the top-level and test
Makefiles.
Add a minor pg cli feature, a CLI to manually set
s->sw_if_index[VLIB_TX].
Consider the case where one configures an interface with both a
device-input and an output feature. To test the output feature using
the pg, it's necessary to inject packets into the interface output
node with both b->sw_if_index[VLIB_TX] and b->sw_if_index[VLIB_RX] set
correctly. For example:
packet-generator new {
name tx
limit 15
size 128-128
interface local0 # rx: device input feature not configured on local0
tx-interface loop0 # tx: output node requires b->sw_if_index[VLIB_TX]
node loop0-output
data {
hex 0x01005e7ffffa000dead0000008000102030405060708090a0b0c0d0e0f0102030405
}
}
Fix a longstanding bug in the packet generator stream setup. Remove
kludges which set b->sw_if_index[VLIB_TX] to ~0 [in multiple places]
instead of using the stream value s->sw_if_index[VLIB_TX], and setting
THAT datum correctly.
Change-Id: I1097a18e8db73661ded6b822c1d718f7e5cf36ed
Signed-off-by: Dave Barach <dave@barachs.net>
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Default chunk is no longer embedded into the fifo and on free is
returned to its respective chunk list.
Change-Id: Ifc5d214eaa6eca44356eb79dd75650fb8569113f
Signed-off-by: Florin Coras <fcoras@cisco.com>
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Example / unit-test in .../src/plugins/unittest/bihash_test.c
Change-Id: I23fd0ba742d65291667a755965aee1a3d3477ca2
Signed-off-by: Dave Barach <dave@barachs.net>
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Change-Id: Ie519683bb90aae6fb95f2a09e251cded1890ed41
Signed-off-by: Florin Coras <fcoras@cisco.com>
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As opposed to growing, this is not a bulk operation, instead dependent
on how the producer/consumer advance head and tail, the fifo will shrink
in one or multiple steps.
Only once the fifo's nitems and size are reduced to their appropriate
values, equal or larger to what was requested, can the fifo chunks be
collected by the owner. Chunk collection must be done with the segment
heap pushed.
Change-Id: Iae407ccf48d85320aa3c1e0304df56c5972c88c1
Signed-off-by: Florin Coras <fcoras@cisco.com>
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If head/tail are stored as "absolute" values that are normalized to [0,
fifo_size] interval, when fifo is shrunk/grown the consumer and producer
have to independently update to the new fifo size and fix head and tail,
respectively.
If the head and tail are stored as normalized values, under the right
conditions, they don't need to be fixed when fifo size changes.
This reverts one of the changes in gerrit 18223.
Change-Id: I55a908828afe90925cf7c20186a940b25e5805f9
Signed-off-by: Florin Coras <fcoras@cisco.com>
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Change-Id: Ie76c69641c8598164d0d00fd498018037258fd86
Signed-off-by: Florin Coras <fcoras@cisco.com>
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These were introduced with the switch to unbound tail/head size, so they
only affect master. Added unit tests to avoid future surprises.
Change-Id: I83b6c9efbe31d8092ba59b8e2ed46f4da97f35db
Signed-off-by: Florin Coras <fcoras@cisco.com>
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Change-Id: Ie96706b4d8bcb32d2d5f065bc765f95f4e9369e7
Signed-off-by: Florin Coras <fcoras@cisco.com>
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... at least for use cases we are interested in
Change-Id: I1156ff354635e8f990ce2664ebc8dcd3786ddca5
Signed-off-by: Damjan Marion <damarion@cisco.com>
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Change-Id: I984f347fb465c0c405cef668d8690457e81788e2
Signed-off-by: Florin Coras <fcoras@cisco.com>
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This reverts commit 7f2d57b69ea031cc6110b3a1f4c1ef1c35b67181.
Change-Id: I23c3b4d2dab6e13cc8fbbf0ac9d0cfd8af3241c1
Signed-off-by: Damjan Marion <damarion@cisco.com>
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Change-Id: If96f661d507305da4b96cac7b1a8f14ba90676ad
Signed-off-by: Damjan Marion <damarion@cisco.com>
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Change-Id: If23a04623a7138c9f6c98ee9ecfa587396618a60
Signed-off-by: Florin Coras <fcoras@cisco.com>
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Change-Id: Ic4e882b784e5773198e55bd97b1bbd3d6dda888a
Signed-off-by: Florin Coras <fcoras@cisco.com>
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Change-Id: I50a6bcc127e4b44becc4b694bdd3018ac9bfab5c
Signed-off-by: Florin Coras <fcoras@cisco.com>
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Change-Id: I638facf6e2128334c3d1a5a8494f378505831e1b
Signed-off-by: Florin Coras <fcoras@cisco.com>
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Change-Id: Icf0cff122dfbd260a2865b6c83531f4a8c726132
Signed-off-by: Paul Vinciguerra <pvinci@vinciconsulting.com>
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Change-Id: I6934beaf5c08bae2d4f0bd3a6bb811810407c1f9
Signed-off-by: Florin Coras <fcoras@cisco.com>
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Change-Id: Iac9ac9f5a6873aae1882316af4f6c919788a0cef
Signed-off-by: Florin Coras <fcoras@cisco.com>
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Change-Id: Ia56cad89b85b7a99ab4bfb85318a45a71381fb53
Signed-off-by: Florin Coras <fcoras@cisco.com>
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Fifos can use multiple memory chunks for simple read/write operations.
Adding/removing chunks after assignment not yet supported.
Change-Id: I2aceab6aea78059d74e0d3a9993c40d5196d077b
Signed-off-by: Florin Coras <fcoras@cisco.com>
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Problems Addressed:
- Contention of cursize by producer and consumer.
- Reduce the no of modulo operations.
Changes:
- Synchronization between producer and consumer changed from cursize
to head and tail indexes
Implications: reduces the usable size of fifo by 1.
- Using weaker memory ordering C++11 atomics to access head and tail
based on producer and consumer role.
- Head and tail indexes are unsigned 32 bit integers. Additions and
subtraction on them are implicit 32 bit Modulo operation.
- Adding weaker memory ordering variants of max_enq, max_deq, is_empty
and is_full Using them appropriately in all places.
Perfomance improvement (iperf3 via Hoststack):
iperf3 Server: Marvell ThunderX2(AArch64) - iperf3 Client: Skylake(x86)
~6%(256 rxd/txd) - ~11%(2048 rxd/txd)
Change-Id: I1d484e000e437430fdd5a819657d1c6b62443018
Signed-off-by: Sirshak Das <sirshak.das@arm.com>
Reviewed-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
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