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Type: fix
Change-Id: I0807f84737d5e98e69e9ed27a1de6813b2ddd138
Signed-off-by: Nathan Skrzypczak <nathan.skrzypczak@gmail.com>
(cherry picked from commit 1afa7afffad6e296a97556aa4c9482f4cd544074)
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Type: fix
Change-Id: Ia362ad821db1fd506e973e1844cc3ec74703cc17
Signed-off-by: Florin Coras <fcoras@cisco.com>
(cherry picked from commit 73cad33b56ffc08943e9c0d73ecb14466558baae)
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Type: fix
Ticket: VPP-1741
Signed-off-by: Guanghua Zhang <ghzhang@fiberhome.com>
Change-Id: Ifd3abaa5ec912378dbc7b73c4863aad26777dd7e
(cherry picked from commit 60f16c22b44625d517830b4266a225d3abaccefc)
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Type:fix
Change-Id: I60fdd7651a3d3fac505e7aec7a41f9d096022895
Signed-off-by: Florin Coras <fcoras@cisco.com>
(cherry picked from commit fcd26a039409e2697a6797e74b0c45544503e853)
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Type:fix
Change-Id: I39c339abf1b51105ef1bcf3d6f0f4f6ded54f32d
Signed-off-by: Florin Coras <fcoras@cisco.com>
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All instances of test_and_set locks used the following sequence
to release the locks:
CLIB_MEMORY_BARRIER ();
p->lock = 0; // p is a generic struct with a TAS lock
Use clib_atomic_release to generate more efficient assembly code.
Type: refactor
Change-Id: Idca3a38b1cf43578108bdd1afe83b6ebc17a4c68
Signed-off-by: Jason Zhang <jason.zhang2@arm.com>
Reviewed-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
Reviewed-by: Lijian Zhang <Lijian.Zhang@arm.com>
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Modified test-and-set spin locks to call CLIB_PAUSE () when spinning
for code consistency. Decreases the memory bandwidth consumed.
Type: fix
Change-Id: I1cca4f87f44f23f257c7a35466cd2e7767072f51
Signed-off-by: Jason Zhang <jason.zhang2@arm.com>
Reviewed-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
Reviewed-by: Lijian Zhang <Lijian.Zhang@arm.com>
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Type:fix
Freeing mq messages in vpp (producer), if enqueueing fails, invalidates
consumer assumption that messages can be freed without a lock.
Change-Id: I748a33b8846597bdad865945d8e899346d482434
Signed-off-by: Florin Coras <fcoras@cisco.com>
Signed-off-by: Tal Saiag <tal.saiag@gmail.com>
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Type: fix
Fixes: 6a5adc3695
Change-Id: I21091fc2938cababeb28bacf7c5e457a05ab6272
Signed-off-by: Benoît Ganne <bganne@cisco.com>
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Type: fix
- make sure that chunks and the rbtree are initialized if fifo segment
allocates multiple chunks for the fifo.
- ensure head/tail chunks are updated on all enqueue/dequeue events,
including when dropping data.
- more unit tests
Also fixes dequeue drop updates of head chunk.
Change-Id: I77f3550bc4e8b4e077f80ea87fe82b83ed013aeb
Signed-off-by: Florin Coras <fcoras@cisco.com>
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Type:fix
Change-Id: Ia8f3496bf24a7dbe0a295b038aa6dfa24f034989
Signed-off-by: Florin Coras <fcoras@cisco.com>
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Type: refactor
Change-Id: I651db44acdcb666a9c63e1037352cf88c68795b5
Signed-off-by: Florin Coras <fcoras@cisco.com>
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Type: feature
Change-Id: I1846cdeb35f079249f66a0351aa244c540923a43
Signed-off-by: Nathan Skrzypczak <nathan.skrzypczak@gmail.com>
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Type:fix
Change-Id: Icab89337eb3dbdc93d0fb453cfd34090026072b7
Signed-off-by: Florin Coras <fcoras@cisco.com>
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Type:fix
Change-Id: I8405bf8d93b4468c54f4f3c5dcd21ef91a6b1048
Signed-off-by: Florin Coras <fcoras@cisco.com>
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Type: fix
This was causing issues in QUIC when an app client & the protocol
app compete for the worker msg_queue. Might not be ideal performance-
wise.
Change-Id: I629892253d5b5d968f31ad1d56f18463e143d6b4
Signed-off-by: Nathan Skrzypczak <nathan.skrzypczak@gmail.com>
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Ring data space is following ring vec_header_t and ring elements immediately.
Add verification code in session_test.
Type: fix
Change-Id: I0bfa096a9f459128a588821d99b5cdb4f10ede38
Signed-off-by: Lijian Zhang <Lijian.Zhang@arm.com>
Reviewed-by: Sirshak Das <Sirshak.Das@arm.com>
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Change-Id: I893621d9a6520c6e24026a9bbaf44e9e69f60bcb
Signed-off-by: Florin Coras <fcoras@cisco.com>
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Type: refactor
Change-Id: I6933205cfb04bc31cabe6e3b1a8044cace93f84c
Signed-off-by: Florin Coras <fcoras@cisco.com>
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This fixes a typo introduced in https://gerrit.fd.io/r/18198
Change-Id: I634a06be95154d3e1c5e5711ea69f19c9c4cca44
Signed-off-by: Vratko Polak <vrpolak@cisco.com>
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replace all pthread_mutex_lock/unlock to be svm_queue_lock/unlock
So there all operation is based on defined mutux, and it can help us
to debug or replace mutux locking method
Change-Id: I9aeeb03bbbbf3d7a824c06a535e5d6a6b463b42c
Signed-off-by: Ping Yu <ping.yu@intel.com>
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- track fifo segment free and chunk freelist memory
- improve fifo alloc. If there are enough chunks to satisfy a fifo
allocation request but not enough free memory, allocate a multi-chunk
fifo
- add apis to preallocate chunks and fifo headers
- more tests
Change-Id: If18dba7ab856272c9f565d36ac36365139793e0b
Signed-off-by: Florin Coras <fcoras@cisco.com>
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- fix segment size rounding for 4GB segments
- fix initialization of first segment size
- cleanup fifo segment info retrieval
Change-Id: I5ebf20f71ea797087653e7e76fa2e37b2686ec40
Signed-off-by: Florin Coras <fcoras@cisco.com>
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Default chunk is no longer embedded into the fifo and on free is
returned to its respective chunk list.
Change-Id: Ifc5d214eaa6eca44356eb79dd75650fb8569113f
Signed-off-by: Florin Coras <fcoras@cisco.com>
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Change-Id: Ie519683bb90aae6fb95f2a09e251cded1890ed41
Signed-off-by: Florin Coras <fcoras@cisco.com>
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As opposed to growing, this is not a bulk operation, instead dependent
on how the producer/consumer advance head and tail, the fifo will shrink
in one or multiple steps.
Only once the fifo's nitems and size are reduced to their appropriate
values, equal or larger to what was requested, can the fifo chunks be
collected by the owner. Chunk collection must be done with the segment
heap pushed.
Change-Id: Iae407ccf48d85320aa3c1e0304df56c5972c88c1
Signed-off-by: Florin Coras <fcoras@cisco.com>
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If head/tail are stored as "absolute" values that are normalized to [0,
fifo_size] interval, when fifo is shrunk/grown the consumer and producer
have to independently update to the new fifo size and fix head and tail,
respectively.
If the head and tail are stored as normalized values, under the right
conditions, they don't need to be fixed when fifo size changes.
This reverts one of the changes in gerrit 18223.
Change-Id: I55a908828afe90925cf7c20186a940b25e5805f9
Signed-off-by: Florin Coras <fcoras@cisco.com>
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split_point is incremented twice per iteration whereas we only check for
*split_point != '\0' at the beginning of the iteration.
This code seems dead so remove it altogether.
Change-Id: Iabaf26cd5c0c8f747e267bcff044540a2376d3f6
Signed-off-by: Benoît Ganne <bganne@cisco.com>
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Change-Id: Ie76c69641c8598164d0d00fd498018037258fd86
Signed-off-by: Florin Coras <fcoras@cisco.com>
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These were introduced with the switch to unbound tail/head size, so they
only affect master. Added unit tests to avoid future surprises.
Change-Id: I83b6c9efbe31d8092ba59b8e2ed46f4da97f35db
Signed-off-by: Florin Coras <fcoras@cisco.com>
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Change-Id: Ie96706b4d8bcb32d2d5f065bc765f95f4e9369e7
Signed-off-by: Florin Coras <fcoras@cisco.com>
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Change-Id: I984f347fb465c0c405cef668d8690457e81788e2
Signed-off-by: Florin Coras <fcoras@cisco.com>
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Change-Id: If23a04623a7138c9f6c98ee9ecfa587396618a60
Signed-off-by: Florin Coras <fcoras@cisco.com>
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Change-Id: Ic4e882b784e5773198e55bd97b1bbd3d6dda888a
Signed-off-by: Florin Coras <fcoras@cisco.com>
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Change-Id: I638facf6e2128334c3d1a5a8494f378505831e1b
Signed-off-by: Florin Coras <fcoras@cisco.com>
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- make only the chunk copying (memcpy) code march aware
- cleanup dependencies
Change-Id: I369378264cacfcdaf0823353b957876554eaa17c
Signed-off-by: Florin Coras <fcoras@cisco.com>
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Change-Id: Ia56cad89b85b7a99ab4bfb85318a45a71381fb53
Signed-off-by: Florin Coras <fcoras@cisco.com>
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Fifos can use multiple memory chunks for simple read/write operations.
Adding/removing chunks after assignment not yet supported.
Change-Id: I2aceab6aea78059d74e0d3a9993c40d5196d077b
Signed-off-by: Florin Coras <fcoras@cisco.com>
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Problems Addressed:
- Contention of cursize by producer and consumer.
- Reduce the no of modulo operations.
Changes:
- Synchronization between producer and consumer changed from cursize
to head and tail indexes
Implications: reduces the usable size of fifo by 1.
- Using weaker memory ordering C++11 atomics to access head and tail
based on producer and consumer role.
- Head and tail indexes are unsigned 32 bit integers. Additions and
subtraction on them are implicit 32 bit Modulo operation.
- Adding weaker memory ordering variants of max_enq, max_deq, is_empty
and is_full Using them appropriately in all places.
Perfomance improvement (iperf3 via Hoststack):
iperf3 Server: Marvell ThunderX2(AArch64) - iperf3 Client: Skylake(x86)
~6%(256 rxd/txd) - ~11%(2048 rxd/txd)
Change-Id: I1d484e000e437430fdd5a819657d1c6b62443018
Signed-off-by: Sirshak Das <sirshak.das@arm.com>
Reviewed-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
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Change-Id: I33cd6e44d126c73c1f4c16b2041ea607b4d7f39f
Signed-off-by: Florin Coras <fcoras@cisco.com>
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Change-Id: I335c092a8965c5dbec58603e9f5063dc8e3fc3ed
Signed-off-by: Florin Coras <fcoras@cisco.com>
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Change-Id: Iea2c173000570043beafef58ca923463ce76d872
Signed-off-by: Florin Coras <fcoras@cisco.com>
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Ensures that fifo cursize loads cannot be speculated to before the event
unset.
Change-Id: Ia7c20c510d58f26a8e9b82d3982c6d4143a3a4d6
Signed-off-by: Florin Coras <fcoras@cisco.com>
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Change-Id: I2f1fa15a99163b9c105707484503dc9502265c52
Signed-off-by: Florin Coras <fcoras@cisco.com>
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Change-Id: Id6a7698da0c7b43313554d736c4df60b820beb80
Signed-off-by: Florin Coras <fcoras@cisco.com>
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Change-Id: Ibc852f88747125a895415570349975d3b379a6f4
Signed-off-by: Florin Coras <fcoras@cisco.com>
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- More fine tuning for multi-process applications.
- Experimental support for multi-thread apps. This is meant for app
whose threads are not vcl workers and the sessions are shared between
them.
Change-Id: Ie07651da5f2cdcf39f5dead5431f50ad39cf3f74
Signed-off-by: Florin Coras <fcoras@cisco.com>
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Change-Id: I7fb5402d4a530b5f2ffd9bb5787632099f4b4189
Signed-off-by: Florin Coras <fcoras@cisco.com>
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Change-Id: Ied476c417c8ba5b4d7c615125c36eecd9ca64fbc
Signed-off-by: Florin Coras <fcoras@cisco.com>
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* u32/u64/uword mismatches
* pointer-to-int fixes
* printf formatting issues
* issues with incorrect "ULL" and related suffixes
* structure alignment and padding issues
Change-Id: I70b989007758755fe8211c074f651150680f60b4
Signed-off-by: David Johnson <davijoh3@cisco.com>
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