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2022-03-23classify: fix typo in AVX-512 find entryBenoît Ganne1-1/+1
Type: fix Fixes: 26bc9f3c855496fb56f5fc648f75a299d4d539f8 Change-Id: Idab52bf856c03ded7b181608c3db1313aa2e33de Signed-off-by: Benoît Ganne <bganne@cisco.com>
2021-11-02classify: fix build on systems without crc32f and vector unitDamjan Marion1-2/+6
Change-Id: I4229239ed6b81c10362faa1aa9f658c3fccfd31b Type: fix Signed-off-by: Damjan Marion <damarion@cisco.com>
2021-09-23classify: use AVX-512 to find entryDamjan Marion1-3/+41
Type: improvement Change-Id: I10f4084907ad714aded86e0b7a1a4d1c5fa1f140 Signed-off-by: Damjan Marion <damarion@cisco.com>
2021-09-23classify: use AVX-512 to calculate hash on x86Damjan Marion1-1/+28
Type:improvement Change-Id: I9f9f16eabf64203db11cd4338948d76ca5e0ef12 Signed-off-by: Damjan Marion <damarion@cisco.com>
2021-09-22classify: improve vnet_classify_hashDamjan Marion1-27/+23
Type: improvement Change-Id: I8b129b71f91b12ab2d8b05fe3891a7ab8926f072 Signed-off-by: Damjan Marion <damarion@cisco.com>
2021-09-22classify: simplify vnet_classify_find_entry_inlineDamjan Marion1-88/+72
Type: improvement Change-Id: I3de4450b95f6fa76705923d983cf93c21b02a635 Signed-off-by: Damjan Marion <damarion@cisco.com>
2021-09-20classify: improve find entry performanceDamjan Marion1-10/+9
Type: improvement Change-Id: I5245fc3f35b7a70833916db2ebf33f7c87398915 Signed-off-by: Damjan Marion <damarion@cisco.com>
2021-09-20classify: avoid dependent read of classify maskDamjan Marion1-3/+4
Type: improvement Change-Id: I176f08c74eb58a78f7fbdb48fd4592e6ddf74d34 Signed-off-by: Damjan Marion <damarion@cisco.com>
2021-07-15misc: replace CLIB_PREFETCH with clib_prefetch_{load,store}Damjan Marion1-2/+2
Type: refactor Change-Id: Id10cbf52e8f2dd809080a228d8fa282308be84ac Signed-off-by: Damjan Marion <damarion@cisco.com>
2021-07-14classify: cheaper way to check if all elements are zeroDamjan Marion1-1/+1
Type: improvement Change-Id: I5f4517c65c37c5d73fcd608dc29dfb1d25d4cd8d Signed-off-by: Damjan Marion <damarion@cisco.com>
2021-01-20classify: Layout classify entry to group data-plane accessed fields onNeale Ranns1-70/+103
one cache line Type: refactor Signed-off-by: Neale Ranns <neale.ranns@cisco.com> Change-Id: I54128ba62f8dcc87c1845b33ed3637112d42a891
2020-12-15classify: add pcap/trace classfier mgmt API callsJon Loeliger1-11/+13
Add lookup/get/set API calls to manage both PCAP and Trace filtering Classifier tables. The "lookup" call may be used to identify a Classifier table within a chain of tables taht matches a particular mask vector. For efficiency, this call should be used to determine to which table a match vector should be added. The "get" calls return the first table within a chain (either a PCAP or the Trace) set of tables. The "set" call may be used to add a new table to one such chain. If the "sort_masks" flag is set, the tables within the chain are ordered such that the most-specific mask is first, and the least-specific mask is last. A call that "sets" a chain to ~0 will delete and free all the tables with a chain. The PCAP filters are per-interface, with "local0", (that is, sw_if_index == 0) holding the system-wide PCAP filter. The Classifier used a reference-counted "set" for each PCAP or trace filter that it stored. The ref counts were not used, and the vector of tables was only used temporarily to establish a sorted order for tables based on masks. None of that complexity was actually warranted, and where it was used, the same could be achieved more simply. Type: refactor Signed-off-by: Jon Loeliger <jdl@netgate.com> Change-Id: Icc56116cca91b91c631ca0628e814fb53f3677d2
2020-09-28vppinfra: don't call dlmalloc API directly from the codeDamjan Marion1-2/+2
- it is confusing from end consumer perspective that some thing is somewhere called heap and somewhere mspace - this is base for additional work where heap pointer is not the same thing like mspace Type: improvement Change-Id: I644d5a0de17690d65d164d8cec3c5654571629ef Signed-off-by: Damjan Marion <damarion@cisco.com>
2020-09-28classify: use clib_crc32c on supporting uarchRay Kinsella1-0/+5
Use clib_crc32c in place of clib_xxhash on supporting uarch. Type: improvement Signed-off-by: Ray Kinsella <mdr@ashroe.eu> Change-Id: Icdfb4ffa92c2c9e7aebc3ec99f20e91392a103ab
2019-09-26misc: add vnet classify filter set supportDave Barach1-0/+12
Type: feature Signed-off-by: Dave Barach <dave@barachs.net> Change-Id: I79b216d2499df143f53977e5b70382f6f887e0bc
2019-09-26classify: use vector code even when data is not alignedDamjan Marion1-142/+126
Type: feature Change-Id: I8f5f4841965beb13ebc8c2a37ce0dc331c920109 Signed-off-by: Damjan Marion <damarion@cisco.com>
2019-09-20classify: remove includes from classifier header fileDamjan Marion1-10/+0
Type: refactor Change-Id: I6f0af1c3078edce1c1b29a8b99c4a232d7084d33 Signed-off-by: Damjan Marion <damarion@cisco.com>
2019-07-31vppinfra: refactor test_and_set spinlocks to use clib_spinlock_tjaszha031-1/+1
Spinlock performance improved when implemented with compare_and_exchange instead of test_and_set. All instances of test_and_set locks were refactored to use clib_spinlock_t when possible. Some locks e.g. ssvm synchronize between processes rather than threads, so they cannot directly use clib_spinlock_t. Type: refactor Change-Id: Ia16b5d4cd49209b2b57b8df6c94615c28b11bb60 Signed-off-by: Jason Zhang <jason.zhang2@arm.com> Reviewed-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com> Reviewed-by: Lijian Zhang <Lijian.Zhang@arm.com>
2019-01-02Fixes for buliding for 32bit targets:David Johnson1-0/+1
* u32/u64/uword mismatches * pointer-to-int fixes * printf formatting issues * issues with incorrect "ULL" and related suffixes * structure alignment and padding issues Change-Id: I70b989007758755fe8211c074f651150680f60b4 Signed-off-by: David Johnson <davijoh3@cisco.com>
2018-09-08L2 BVI/FIB: Update L2 FIB table when BVI's MAC changesNeale Ranns1-3/+0
also some moving of l2 headers to reduce dependencies Change-Id: I7a700a411a91451ef13fd65f9c90de2432b793bb Signed-off-by: Neale Ranns <nranns@cisco.com>
2018-02-26Added u8x16,u32x4,u64x2 variants of _zero_byte_mask(x) for ARM/NEON ↵Adrian Oanca1-8/+4
platform. VPP-1129 Change-Id: I954acb56d901e42976e71534317f38d7c4359bcf Signed-off-by: Adrian Oanca <adrian.oanca@enea.com>
2018-02-20vppinfra: CLIB_HAVE_VEC128 mandates SSE4.2Damjan Marion1-1/+1
Change-Id: I6511110d0472203498a4f8741781eeeeb4f90844 Signed-off-by: Damjan Marion <damarion@cisco.com>
2018-02-07classifier-based ACL: refactor + add output ACLAndrew Yourtchenko1-0/+1
For implementation of MACIP ACLs enhancement (VPP-1088), an outbound classifier-based ACL would be needed. There was an existing incomplete code for outbound ACLs, it looked almost exact copy of input ACLs, minus the various enhancements, trying to sync that code seemed error-prone and cumbersome to maintain in the longer run. This change refactors the input+output ACLs processing into a unified routine (thus any changes will have effect on both), and also adds the API to set the output interface ACL, with the same format and semantics as the existing input one (except working on output ACL of course). WARNING: IP outbound ACL in L3 mode clobbers the ip.* fields in the vnet_buffer_opaque_t, since the code is using l2_classify.* The net_buffer (p0)->ip.save_rewrite_length is rescued into l2_classify.pad.l2_len, and used to rewind the header in case of drop, so that ipX_drop prints something sensible. Change-Id: I62f814f1e3650e504474a3a5359edb8a0a8836ed Signed-off-by: Andrew Yourtchenko <ayourtch@gmail.com>
2017-11-28VPP-246 Coding standards cleanup - vnet/vnet/classifykhemendra kumar1-238/+278
Signed-off-by: khemendra kumar <khemendra.kumar13@gmail.com> Change-Id: I0d94ef604d34da6981e7c2d2b4da5ec3ec5fb19a
2017-11-18Rename classifier ip6-sr metadata set actionDave Barach1-1/+1
There's nothing ip6-sr specific about it. Change-Id: I9e3710162bd81b535c46599c988557abf5a5003b Signed-off-by: Dave Barach <dave@barachs.net>
2017-11-10add classify session action set-sr-policy-indexGabriel Ganne1-0/+1
This allows to use the classifier to steer source routing packets instead of using the "sr steer" command. This way we can steer on anything instead of only the dst ip address. test: * add add_node_next function to the VppPapiProvider class. * add simple test scenario using the classifier to steer packets with dest ip addr == a7::/8 to the source routing insert node. * use new interface indexes (3,4) instead of (0,1) to prevent a cleanup conflict with the other tests which attach a specific fib to the interface. The test creates interfaces sepsrated from the other tests to prevent a conflict in the cleaning of the ip6 fib index 1 which causes vpp not to be able to find a default route on this table. Change-Id: Ibacb30fab3ce53f0dfe848ca6a8cdf0d111d8336 Signed-off-by: Gabriel Ganne <gabriel.ganne@enea.com>
2017-05-24Leak locks and tables in the ClassifierNeale Ranns1-3/+6
Change-Id: Iae04c57bba87ab3665388eadd0805f75171636a5 Signed-off-by: Neale Ranns <nranns@cisco.com>
2017-05-20VPP-849: improve vnet classifier memory allocator performanceDave Barach1-46/+57
Port the linear-scan bucket fix from bihash_template.c. Change-Id: Id8b2d1fe402401f098270ce6121c2f44f2f24c49 Signed-off-by: Dave Barach <dave@barachs.net>
2017-02-23Fix vpp built-in version of api_unformat_sw_if_index(...)Dave Barach1-0/+1
Change-Id: I103fe19a1ecbaf3746ec6b957fa1010458cc9fae Signed-off-by: Dave Barach <dave@barachs.net>
2016-12-28Reorganize source tree to use single autotools instanceDamjan Marion1-0/+523
Change-Id: I7b51f88292e057c6443b12224486f2d0c9f8ae23 Signed-off-by: Damjan Marion <damarion@cisco.com>