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2021-10-06docs: vnet comment nitfixesNathan Skrzypczak1-1/+1
Type: improvement Change-Id: Iac01d7830b53819ace8f199554be10ab89ecdb97 Signed-off-by: Nathan Skrzypczak <nathan.skrzypczak@gmail.com>
2021-07-15misc: replace CLIB_PREFETCH with clib_prefetch_{load,store}Damjan Marion1-1/+1
Type: refactor Change-Id: Id10cbf52e8f2dd809080a228d8fa282308be84ac Signed-off-by: Damjan Marion <damarion@cisco.com>
2021-06-07pg: Reduce the inclusion of pg.hNeale Ranns1-0/+11
Type: style reduce the number of files recompiled after changing pg.h from 1110 to 102. Signed-off-by: Neale Ranns <neale@graphiant.com> Change-Id: I50611eba818eeb3a2dffd437a3c72c77766bed80
2021-04-17classify: honor pcap interface filter also when classify filter is usedBenoît Ganne1-28/+3
Type: fix Change-Id: Ic32550ee9c5d76d232d8b67a7810611f6c8b9177 Signed-off-by: Benoît Ganne <bganne@cisco.com>
2021-03-05interface: move vnet_pcap_t to vnetDamjan Marion1-3/+3
It naturally belogns there... Type: refactor Change-Id: I05f7ba01103a5e9b3756f1ea69c8cc5d8f26f0a0 Signed-off-by: Damjan Marion <damarion@cisco.com>
2021-02-15misc: coverity fixesDave Barach1-2/+2
Type: fix Signed-off-by: Dave Barach <dave@barachs.net> Change-Id: I6a3348c7edd1cce6b407d336443103f77392bc5d
2020-11-13ethernet: mac must support 64-bits loadsBenoît Ganne1-6/+13
ethernet dataplane loads MAC addresses as 64-bits loads for efficiency. We must make sure it is valid, especially for the vector of secondary MACs. Type: fix Change-Id: I851e319b8a973c154e85ff9f05f3b8e385939788 Signed-off-by: Benoît Ganne <bganne@cisco.com>
2020-10-15ethernet: fix Ethernet DMAC checksIvan Shvedunov1-7/+12
Type: fix Due to confusion between ethernet flags and hw interface flags, DMAC filtering was not happening, most of the time. Signed-off-by: Ivan Shvedunov <ivan4th@gmail.com> Change-Id: I95209e1ea0f95f9be0b1a82ec9fcbc80955428d2
2020-08-06misc: harmonize namesDave Barach1-12/+12
Type: fix Signed-off-by: Dave Barach <dave@barachs.net> Change-Id: Ibad744788e200ce012ad88ff59c2c34920742454
2020-05-27ethernet: fix DMAC check and skip unnecessary ones (VPP-1868)John Lo1-19/+33
Fix and optimize DMAC check in ethernet-input node to utilize NIC or driver which support L3 DMAC-filtering mode so that DMAC check can be bypassed safely for interfaces/sub-interfaces in L3 mode. Checking of interface in L3-DMAC-filtering state to avoid DMAC check require the following: a) Fix interface driver init sequence for devices which supports L3 DMAC-filtering to indicate its capability and initialize interface to L3 DMAC-filtering state. b) Fix ethernet_set_flags() function and its associated callback flags_change() functions registered by various drivers in interface infra to provide proper L3 DMAC filtering status. Maintain interface/sub-interface L3 config count so DMAC checks can be bypassed if L3 forwarding is not setup on any main/sub-interfaces. Type: fix Ticket: VPP-1868 Signed-off-by: John Lo <loj@cisco.com> Change-Id: I204d90459c13e9e486cfcba4e64e3d479bc9f2ae
2020-05-15misc: removed executable bits from source filesRay Kinsella1-0/+0
Identified and removed executable bit from source files in the tree. find . -perm 755 -name *.[ch] -exec chmod a-x {} \; Type: improvement Signed-off-by: Ray Kinsella <mdr@ashroe.eu> Change-Id: I00710d59fcc46ce5be5233109af4c8077daff74b
2020-05-10ethernet: fix dmac stride errorZhiyong Yang1-1/+1
Type: fix Signed-off-by: Zhiyong Yang <zhiyong.yang@intel.com> Change-Id: I617fb365def22a28d48f75013dea38f8e1703a44
2020-04-22ethernet: leverage vlib_buffer_get_currentZhiyong Yang1-4/+4
Type: improvement Signed-off-by: Zhiyong Yang <zhiyong.yang@intel.com> Change-Id: I0eaedeee03dd3b4453edec7fca2a5c741a98de23
2020-04-22ethernet: put vlib_get_buffers togetherZhiyong Yang1-11/+6
The patch brings 0.8 clocks saved per pkt in IPv4 l3fwd case on Skylake. Type: improvement Signed-off-by: Zhiyong Yang <zhiyong.yang@intel.com> Change-Id: Ia8d3a27773bf959433380d7c219602b1e4a8e5bd
2019-11-26ethernet: all dmac checks include secondary addrsMatthew Smith1-19/+106
Type: feature In ethernet_input_inline(), when verifying that the destination mac address on a received packet matches the mac address of the interface where the packet was received, check the secondary addresses on the interface if the primary address does not match. This was done previously for eth_input_single_int(). Change-Id: I45716184dd789d83852271f9c79cedf5f6cbf75b Signed-off-by: Matthew Smith <mgsmith@netgate.com>
2019-11-20classify: per-interface rx/tx pcap capture filtersDave Barach1-2/+12
Finish the feature, and fix a couple of doc bugs Type: feature Signed-off-by: Dave Barach <dave@barachs.net> Change-Id: I2c62745fda137776204c8fc4fca0e7e288051573
2019-10-03ethernet: fix dmac filter coverity warningMatthew Smith1-1/+1
Static analysis says that a possibly null pointer is dereferenced. Check it first. Type: fix Change-Id: I3d1a1548162d1dfc26f19fbcf159f0f1f91eb7c4 Signed-off-by: Matthew Smith <mgsmith@netgate.com>
2019-10-02ethernet: dmac filter checks secondary mac addrsMatthew G Smith1-34/+132
Maintain a list of secondary MAC addresses on ethernet_interface_t. In ethernet-input dmac filtering, If packets do not match the primary interface hardware address, check to see if they match the other addresses. Type: feature Change-Id: Ie0edf45cae0d85c038a61086c47b3ae82d7e162d Signed-off-by: Matthew Smith <mgsmith@netgate.com>
2019-09-26misc: add vnet classify filter set supportDave Barach1-4/+2
Type: feature Signed-off-by: Dave Barach <dave@barachs.net> Change-Id: I79b216d2499df143f53977e5b70382f6f887e0bc
2019-09-23misc: unify pcap rx / tx / drop traceDave Barach1-8/+8
Use a single vnet_pcap_t in vlib_global_main, specifically to support unified tracing Update sphinx docs, doxygen tags Type: refactor Ticket: VPP-1776 Signed-off-by: Dave Barach <dave@barachs.net> Change-Id: Id15d41a596712968c0714cef1bd2cd5bc9cbdd55
2019-09-20misc: classifier-based packet trace filterDave Barach1-1/+15
See .../src/vnet/classify/trace_classify.h for the business end of the scheme. It would be best to hash pkts, prefetch buckets, and do the primary table lookups two at a time. The inline as given works, but perf tuning will be required. "At least it works..." Add "classify filter" debug cli, for example: classify filter mask l3 ip4 src dst \ match l3 ip4 dst 192.168.2.10 src 192.168.1.10 Add "pcap rx | tx trace ... filter" to use the current classify filter chain Patch includes sphinx documentation and doxygen tags. Next step: device-driver integration Type: feature Signed-off-by: Dave Barach <dave@barachs.net> Change-Id: I05b1358a769f61e6d32470e0c87058f640486b26
2019-09-04ethernet: move dmac filtering to inline functionMatthew Smith1-56/+63
In eth_input_process_frame(), destination MAC addresses are compared to the interface hardware address in a loop. Move this to a separate inline function to facilitate making changes to the filtering logic more cleanly. Type: refactor Change-Id: I0978f01667e78af5214dbbc9ba223f5b84ce6b7e Signed-off-by: Matthew Smith <mgsmith@netgate.com>
2019-09-03ethernet: fix dmac check avx2 loop conditionMatthew Smith1-1/+1
In eth_input_process_frame(), a loop which checks the destination MAC address of received packets had a different condition for avx2 than it did for the non-avx2 version of the loop. It could result in one unnecessary execution of the loop body after all packets had been processed. Type: fix Fixes: 8d6f34e2b1cbfde5702e88686631527d5e1e10a0 Change-Id: Ib673f45917a0dea461987fdc8f0ca318b749fb1a Signed-off-by: Matthew Smith <mgsmith@netgate.com>
2019-07-15interface: fix issue that pcap rx/tx trace not available when there are ↵Wei CHEN1-4/+5
worker threads Type: fix Change-Id: Ie9a3a78b45b53344a0a5d7e2027c0e0354a49ebe Signed-off-by: Wei CHEN <weichen@astri.org>
2019-07-03misc: fix coverity warningsDave Barach1-0/+5
Type: fix Ticket: VPP-1649 Change-Id: I93a393eca80065c379035478500e75e855f39b12 Signed-off-by: Dave Barach <dave@barachs.net>
2019-05-16init / exit function orderingDave Barach1-8/+2
The vlib init function subsystem now supports a mix of procedural and formally-specified ordering constraints. We should eliminate procedural knowledge wherever possible. The following schemes are *roughly* equivalent: static clib_error_t *init_runs_first (vlib_main_t *vm) { clib_error_t *error; ... do some stuff... if ((error = vlib_call_init_function (init_runs_next))) return error; ... } VLIB_INIT_FUNCTION (init_runs_first); and static clib_error_t *init_runs_first (vlib_main_t *vm) { ... do some stuff... } VLIB_INIT_FUNCTION (init_runs_first) = { .runs_before = VLIB_INITS("init_runs_next"), }; The first form will [most likely] call "init_runs_next" on the spot. The second form means that "init_runs_first" runs before "init_runs_next," possibly much earlier in the sequence. Please DO NOT construct sets of init functions where A before B actually means A *right before* B. It's not necessary - simply combine A and B - and it leads to hugely annoying debugging exercises when trying to switch from ad-hoc procedural ordering constraints to formal ordering constraints. Change-Id: I5e4353503bf43b4acb11a45fb33c79a5ade8426c Signed-off-by: Dave Barach <dave@barachs.net>
2019-04-24ethernet_input_inline: leverage vlib_get_buffersZhiyong Yang1-17/+14
Make full use of well optimized function vlib_get_buffers for ethernet_input_inline. Change-Id: Iee7df570b87fa95c0902895686a62386d730f9a1 Signed-off-by: Zhiyong Yang <zhiyong.yang@intel.com>
2019-04-10ethernet: fix packet tracingBenoît Ganne1-1/+1
Node tracing condition was wrongly reversed by commit "5ecd5a5d15 Move pcap rx/tx trace code out of the dpdk plugin". This prevented packet tracing in ethernet-input node and also impacted performance in the no tracing case. Change-Id: I345a11191d027c6c4ec474a2901995338050680a Signed-off-by: Benoît Ganne <bganne@cisco.com>
2019-02-26Move pcap rx/tx trace code out of the dpdk pluginDave Barach1-17/+42
Moved code to the ethernet input node, and the interface output path(s). Since we no longer skip ethernet-input, there's no reason for device drivers to know anything about pcap rx tracing, etc. Change-Id: I08d32fb1b90cbee1bd4f609837d533e047b36fa4 Signed-off-by: Dave Barach <dave@barachs.net>
2019-01-30Use IP and MAC API types for neighborsNeale Ranns1-4/+4
use address_t and mac_address_t for IPv6 and ARP entries and all other API calls in ip.api aprat from the route ones, that will follow in a separate commit Change-Id: I67161737c2184d3f8fc1e79ebd2b55121c5b0191 Signed-off-by: Neale Ranns <nranns@cisco.com>
2018-12-22ethernet-input tagged packets optimizationsDamjan Marion1-269/+474
Change-Id: I21bdd8982d5f357590af8a2a0219bdebbaee4e74 Signed-off-by: Damjan Marion <damarion@cisco.com>
2018-11-26Remove unused argument from eth_identify_subint(...)Damjan Marion1-3/+2
Change-Id: I0e89fbc51f30325655c4e9d0104aceb3ead3b16f Signed-off-by: Damjan Marion <damarion@cisco.com>
2018-11-21ethernet-input: fix assert in l2 modeDamjan Marion1-9/+24
Change-Id: I3befc762694e7c6d6847c361a144f72547038ba1 Signed-off-by: Damjan Marion <damarion@cisco.com>
2018-11-20ethernet-input optimizationsDamjan Marion1-22/+517
Change-Id: I4ec7750ef58363bd8966a16a2baeec6db18b7e9e Signed-off-by: Damjan Marion <damarion@cisco.com>
2018-10-12vnet: complete the fix for l3_hdr_offset calculation for single loop ↵Andrew Yourtchenko1-1/+1
fastpass case (VPP-1444) 20e6d36b has moved the calculation of the l3_hdr_offset into the determine_next_node() function, with the assumption that the current_data in the buffer is at the L3 header. This is not the case for the single loop fastpath, where the vlib_buffer_advance() call is made after the call to determine_next_node(), as a day1 behavior. As a result - that path incorrectly sets the l3_hdr_offset. Solution: move the vlib_buffer_advance() call to before determine_next_node() Change-Id: Id5eaa084c43fb6564f8239df4a0b3dc0412b15de Signed-off-by: Andrew Yourtchenko <ayourtch@gmail.com> (cherry picked from commit 376414f4c3f53af44da4e82ee5d0b1843b291f8e)
2018-10-09vnet: ethernet-input incorrectly sets l3_hdr_offset in some casesAndrew Yourtchenko1-26/+26
The issue surfaced when developing the tap GSO code, with an iteration where output path is reliant on vnet_buffer (b0)->l3_hdr_offset being set correctly in the input path, during performance testing. Adding a workaround in the TX path shows that the issue surfaces only for relatively few packets during the test (about 100 out of 600000). Analysis shows the issue arises if the ethernet-input is handling two untagged packets with different sw_if_index values - then the accelerated path punts to slow path, before the setting of the l2.l2_len values is done, thus resulting in them being 0, and l3_hdr_offset being the same as l2_hdr_offset, wreaking havoc on TX path. The solution is to move the l2_hdr_offset calculation into a place where it is done for all the packets, and move the l3_hdr_offset calculation into the determine_next_node() function - as that function is also the one setting the special-case l2.l2_len value for tagged packets and moving the current_data for the L2 case. Change-Id: If728c7715e011930c1887691188c98055bddde67 Signed-off-by: Andrew Yourtchenko <ayourtch@gmail.com>
2018-10-02Enabled untagged vs default functionalityMike Bly1-2/+1
Removed 0-tags attribute for default-sub-if config Moved default-sub-if check before untagged Change-Id: I68043445aa2f79846e0743567b9015257fd87f8d Signed-off-by: Mike Bly <mbly@ciena.com>
2018-09-12fix missing extern in vnet/ethernet/node.cDamjan Marion1-1/+1
Change-Id: Idabdd1112ba7e390a7b14a83cc7fbd198c8754df Signed-off-by: Damjan Marion <damarion@cisco.com>
2018-09-10new multiversioning on ethernet input nodesDamjan Marion1-34/+16
Change-Id: I1aa196756b3ff4969b8ff2f117778d2cd87d6dd5 Signed-off-by: Damjan Marion <damarion@cisco.com>
2018-07-11avoid using thread local storage for thread indexDamjan Marion1-1/+1
It is cheaper to get thread index from vlib_main_t if available... Change-Id: I4582e160d06d9d7fccdc54271912f0635da79b50 Signed-off-by: Damjan Marion <damarion@cisco.com>
2018-07-07PipesNeale Ranns1-1/+10
A pipe resembles a unix pipe. Each end of the pipe is a full VPP interface. pipes can be used for e.g. packet recirculation, inter-BD, etc. Change-Id: I185bb9fb43dd233ff45da63ac1b85ae2e1ceca16 Signed-off-by: Neale Ranns <neale.ranns@cisco.com>
2018-04-19Minor optimzation/cleanup to ethernet-input nodeJohn Lo1-5/+5
Change-Id: Ibf3ef82950f50b746394a731cd2e7cba1cd16ec4 Signed-off-by: John Lo <loj@cisco.com>
2018-02-19Use neutral vector code for ethernet_frame_is_taggedDamjan Marion1-25/+2
Also it removes ethernet_frame_is_any_taged implemebntation which seems to be equally costly compared to two invocations of ethernet_frame_is_tagged. Change-Id: If1c95f8267cd34b807ec07e0d675cbd0db2fdf9f Signed-off-by: Damjan Marion <damarion@cisco.com>
2018-02-06Fix clang implicit conversion errorsDamjan Marion1-7/+8
Change-Id: I1771a1cca2a4bc394677b2a18f14c47f0633fa77 Signed-off-by: Damjan Marion <damarion@cisco.com>
2018-01-17Fix checksum offload sssue caused by overwriten lX_hdr_offsetDamjan Marion1-2/+2
This happens when 2 packets belonging to 2 different interfaces hit dual loop in the ethernet-input. Packets go to slow path which doesn't set l2 hdr offset correctly for l3 packets. Change-Id: I61d87c079db0b2e21f8af6f6b600bff14030535d Signed-off-by: Damjan Marion <damarion@cisco.com>
2017-12-04vnet: set vnet_buffer l2_hdr_offset and l3_hdr_offsetSteven1-0/+22
Changes made in ethernet_input to set l2_hdr_offset,l3_hdr_offset, and their corresponding flags. Please note that ethernet_input, as a critical DP, incurs a few extra cpu cycles due to this patch, but for a worthy cause. Change-Id: Ie9ae352ea62959d2779ebcca98a1898e3d9e1d6f Signed-off-by: Steven <sluong@cisco.com>
2017-08-01P2P EthernetPavel Kotucek1-1/+16
Change-Id: Idb97e573961b3bc2acdeef77582314590795f8c3 Signed-off-by: Pavel Kotucek <pkotucek@cisco.com>
2017-07-14Introduce l{2,3,4}_hdr_offset fields in the buffer metadataDamjan Marion1-14/+9
To save space in the first cacheline following is changed: - total_length_not_including_first_buffer moved to the 2nd cacheline. This field is used only when VLIB_BUFFER_TOTAL_LENGTH_VALID and VLIB_BUFFER_NEXT_PRESENT are both set. - free_list_index is now stored in 4bits inside flags, which allows up to 16 free lists. In case we need more we can store index in the 2nd cachelin Change-Id: Ic8521350819391af470d31d3fa1013e67ecb7681 Signed-off-by: Damjan Marion <damarion@cisco.com>
2017-07-13Fix typo for non x86 platforms.Christophe Fontaine1-1/+1
Change-Id: Ic31b388cb972fb5f8a3fc42a5412401c3ee3e487 Signed-off-by: Christophe Fontaine <christophe.fontaine@enea.com>
2017-07-07ETH:optimized double is_tagged checkEyal Bari1-2/+24
a double version of is_tagged, uses "free lanes" in _mm_cmpeq_epi16 to check a second tag this code was not yet tested for performance Change-Id: I640017e1cc75c85a33d196ee911a7e4a512d9849 Signed-off-by: Eyal Bari <ebari@cisco.com>