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2018-08-01Move java api to extras/Damjan Marion1-0/+1
Change-Id: Ibd5cbbdfb22a235442cddaebc9eae9a3c4e35ec9 Signed-off-by: Damjan Marion <damarion@cisco.com>
2018-07-25Generate vppinfra/config.h from config.in script (same as we do for ↵Neale Ranns1-11/+0
vlib/config.h) Change-Id: I55549b589e34a62d3704f788fce801392de22f46 Signed-off-by: Neale Ranns <nranns@cisco.com>
2018-07-18Add config option to use dlmalloc instead of mheapDave Barach1-3/+19
Configure w/ --enable-dlmalloc, see .../build-data/platforms/vpp.mk src/vppinfra/dlmalloc.[ch] are slightly modified versions of the well-known Doug Lea malloc. Main advantage: dlmalloc mspaces have no inherent size limit. Change-Id: I19b3f43f3c65bcfb82c1a265a97922d01912446e Signed-off-by: Dave Barach <dave@barachs.net>
2018-07-13vppinfra: add missing header file to install listDamjan Marion1-0/+1
Change-Id: I1f82c40f9f927296d5d439b0db70a70ef803cf3c Signed-off-by: Damjan Marion <damarion@cisco.com>
2018-06-08Time range support for vppinfraDave Barach1-0/+6
Change-Id: I2356b1e05fd868b46b4d26ade760900a5739ca4d Signed-off-by: Dave Barach <dave@barachs.net>
2018-06-04Configure or deduce CLIB_LOG2_CACHE_LINE_BYTES (VPP-1064)Dave Barach1-0/+12
Added configure argument "--with-log2-cache-line-bytes=5|6|7|auto" AKA 32, 64, or 128 bytes, or use the inferred value from the build host. produces build-xxx/vpp/vppinfra/config.h, which .../src/vppinfra/cache.h Kernels which implement the following pseudo-file (aka x86_64) are easy: /sys/devices/system/cpu/cpu0/cache/index0/coherency_line_size Otherwise, extract the cpuid from /proc/cpuinfo and map it to the cache line size. Change-Id: I7ff861e042faf82c3901fa1db98864fbdea95b74 Signed-off-by: Dave Barach <dave@barachs.net> Signed-off-by: Nitin Saxena <nitin.saxena@cavium.com>
2018-05-25bond: performance harvestingSteven1-0/+1
- hash is great. But it is a bit too slow for the DP. Use direct array indexing to quickly retrieve the slave interface. - the algorithm used by flow hash is great. But it is a bit too slow for the DP. Use l2_hash_hash() extracted from lb_hash.h which ECMP is using. It makes use of intrinsic crc32 instruction set. - shortcut modulo arithmetic when the operand is 2**x (where x up to 4) to avoid division instruction. - special case for link count == 1 in bond_tx_fn() - use clib_mem_unaligned to access data for the packet to avoid alignment error - Fix some typos for packet tracing. Change-Id: I8eae3ad497061c5473aa675ba894ee0211120d25 Signed-off-by: Steven <sluong@cisco.com>
2018-04-25dpdk: complete rework of the dpdk-input nodeDamjan Marion1-0/+2
Change-Id: If174d189de40e6f9ffae99997bba93a2519d9fda Signed-off-by: Damjan Marion <damarion@cisco.com>
2018-03-12Remove md5.[ch] from vppinfraDave Barach1-7/+0
Removed the sole use of it from ip6_neighbor.c Change-Id: Ie53cb3b6a3a41ec0917ec2042e5006d0cfaefc01 Signed-off-by: Dave Barach <dave@barachs.net>
2018-02-21vppinfra: remove vector_iwmmxt.hDamjan Marion1-1/+0
Change-Id: I71fac34b071a07b4331cb5c900c3b8667c1fc114 Signed-off-by: Damjan Marion <damarion@cisco.com>
2018-02-20vppinfra: CLIB_HAVE_VEC128 mandates SSE4.2Damjan Marion1-1/+1
Change-Id: I6511110d0472203498a4f8741781eeeeb4f90844 Signed-off-by: Damjan Marion <damarion@cisco.com>
2018-02-01Add flowhash hash table to vppinfraPierre Pfister1-0/+11
This hash table intends to provide an alternative to the widely used bihash table in places where either: - Hash entry timeout is required - The hash table data does not fit in CPU cache Although the bihash table is very fast, each lookup requires accessing two cache lines in a serialized fashion. It works fine when the hash table is in cache, but hits a wall when it does not. The 'flowhash' table uses a simplified design (at the cost of a less good bucket auto-scaling) where each access only requires a single memory lookup (in the absence of collision). The hash table also uses a reduced number of registers. In practice, a VPP node implementing a stateful feature would typically: - prefetch buffer metadata (in-cache) - prefetch packet header (in-cache) - compute hash & prefetch hash bucket (possibly in RAM) - read/write key and value from bucket Using this hash table, it is possible to pipeline accesses in a way that does not exhaust CPU's line field buffers, even when the requested value is located in RAM (i.e. not in cache). Measurements showed it was possible to scale to tens of millions of flows (with a full 5-tuple matching and 32B value, i.e. 1 cache line per flow) with no performance degradation when the hash table grows to the point it doesn't fit in cache anymore. I have used this table in a couple of non-open-sourced projects, but think it might be useful to lb, nat, and possibly other VPP subsystems. More information in the .h file. Change-Id: I2b13dde0eabd868b75da1cedbfca0bf74d705102 Signed-off-by: Pierre Pfister <ppfister@cisco.com>
2018-01-30Compile valloc.c, install header file, etc.Dave Barach1-0/+7
Change-Id: Ibc252d9ed595be955790ec1c97d8730e43ad89b2 Signed-off-by: Dave Barach <dave@barachs.net>
2017-12-14vppinfra: add AVX512 variant of clib_memcpyDamjan Marion1-1/+2
Taken from DPDK, also AVX2 variant updated to be in sync with DPDK version. Change-Id: I8a42e4141a5a1a8cfbee328b07bd0c9b38a9eb05 Signed-off-by: Damjan Marion <damarion@cisco.com>
2017-11-30mmap-based fixed-size record double-buffered loggerDave Barach1-0/+7
Change-Id: I760b482b9de457bbb17de817db7079b57d3f5ec1 Signed-off-by: Dave Barach <dave@barachs.net>
2017-10-30Add the bihash_vec8_8 variantDave Barach1-3/+10
This is an all-purpose octet-vector memory hash, intended as a thread-safe replacement for hash_create_mem / hash_create_string. All u8 * key vectors are memorized by the hash table. Change-Id: I22944daea8fda07dde8ba118a6529a6d382491f9 Signed-off-by: Dave Barach <dave@barachs.net>
2017-10-20add cuckoo hashKlement Sekera1-1/+11
Change-Id: I78215041588014e9e5c3599c60471ced610735bb Signed-off-by: Klement Sekera <ksekera@cisco.com>
2017-09-15vppinfra: add clib_mem_vm_ext_alloc functionDamjan Marion1-1/+4
Change-Id: Iff33694fc42cc3bcc73cf1372339053a6365039c Signed-off-by: Damjan Marion <damarion@cisco.com>
2017-09-09move unix_file_* code to vppinfraDamjan Marion1-0/+1
This will allow us to use this code in client libraries without vlib. Change-Id: I8557b752496841ba588aa36b6082cbe2cd1867fe Signed-off-by: Damjan Marion <damarion@cisco.com>
2017-09-01Add fixed-size, preallocated pool supportDave Barach1-11/+15
Simply call pool_init_fixed(...) before using the pool. Note that fixed, preallocated pools live in individually-mmap'ed address segments, except for the free element bitmap. A large fixed pool can exceed 4gb. Fix tcp buffer allocator leak, remove broken assert Change-Id: I4421082e12a77c41c6e20f7747f3150dcd01fc26 Signed-off-by: Dave Barach <dave@barachs.net>
2017-07-19Add a bihash prefetchable bucket-level cacheDave Barach1-0/+2
According to Maciek, the easiest way to leverage the csit "performance trend" job is to actually merge the patch once verified. Manual testing indicates that the patch improves l2 path performance. Other use-cases are TBD. It's possible that we'll need to back out the patch depending on what happens. Change-Id: Ic0a0363de35ef9be953ad7709c57c3936b73fd5a Signed-off-by: Dave Barach <dave@barachs.net>
2017-07-01Refactor API message handling codeKlement Sekera1-0/+1
This is preparation for new C API. Moving common stuff to separate headers reduces dependency issues. Change-Id: Ie7adb23398de72448e5eba6c1c1da4e1bc678725 Signed-off-by: Klement Sekera <ksekera@cisco.com>
2017-06-12three-level timer wheel implementation w/ overflow vectorDave Barach1-0/+6
prep work for s/timing_wheel/tw_timer/ in the vlib process model Change-Id: I763f4968a8fce1764a3778b12def0afbd30086b1 Signed-off-by: Dave Barach <dave@barachs.net>
2017-05-10Add crc32c inline function, allows compilation on 32-bit systemsDamjan Marion1-0/+1
32-bit code still can use crc32c instructions, but it operates on 32 registers Change-Id: I9bb6b0b59635d6ea6a753584676ebcf59c8f6584 Signed-off-by: Damjan Marion <damarion@cisco.com>
2017-03-30vppinfra: add spinlock inline functionsDamjan Marion1-0/+1
Change-Id: I86089e9bb604adfc260a111685001be1c897ce53 Signed-off-by: Damjan Marion <damarion@cisco.com>
2017-03-01VPP-598: tcp stack initial commitDave Barach1-0/+5
Change-Id: I49e5ce0aae6e4ff634024387ceaf7dbc432a0351 Signed-off-by: Dave Barach <dave@barachs.net> Signed-off-by: Florin Coras <fcoras@cisco.com>
2017-02-16add tw_timer_template.c to vpp devel packagesGabriel Ganne1-0/+1
Change-Id: Ia25a8827ed94877e8fe6c0b2ff6d05c1568eb0e1 Signed-off-by: Gabriel Ganne <gabriel.ganne@enea.com>
2017-02-05Wheel-timer infraDave Barach1-0/+13
Change-Id: I5499dd6b768425a56936afae50bd578620c83d30 Signed-off-by: Dave Barach <dave@barachs.net>
2017-01-27IP Multicast FIB (mfib)Neale Ranns1-1/+1
- IPv[46] mfib tables with support for (*,G/m), (*,G) and (S,G) exact and longest prefix match - Replication represented via a new replicate DPO. - RPF configuration and data-plane checking - data-plane signals sent to listening control planes. The functions of multicast forwarding entries differ from their unicast conterparts, so we introduce a new mfib_table_t and mfib_entry_t objects. However, we re-use the fib_path_list to resolve and build the entry's output list. the fib_path_list provides the service to construct a replicate DPO for multicast. 'make tests' is added to with two new suites; TEST=mfib, this is invocation of the CLI command 'test mfib' which deals with many path add/remove, flag set/unset scenarios, TEST=ip-mcast, data-plane forwarding tests. Updated applications to use the new MIFB functions; - IPv6 NS/RA. - DHCPv6 unit tests for these are undated accordingly. Change-Id: I49ec37b01f1b170335a5697541c8fd30e6d3a961 Signed-off-by: Neale Ranns <nranns@cisco.com>
2017-01-11Makefile.am cleanupDamjan Marion1-7/+1
- remove unused stuff - add --quiet flag to libtool - avoid building some tests programs when tests are not enabled Change-Id: Ie34aeec1a598ad811256a00354f66cfddae9d0b9 Signed-off-by: Damjan Marion <damarion@cisco.com>
2016-12-28Reorganize source tree to use single autotools instanceDamjan Marion1-0/+276
Change-Id: I7b51f88292e057c6443b12224486f2d0c9f8ae23 Signed-off-by: Damjan Marion <damarion@cisco.com>