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2020-04-01vppinfra: fix vppinfra test code buildDave Barach1-1/+1
Type: fix Signed-off-by: Dave Barach <dave@barachs.net> Change-Id: I921adae4ad797bf80cfcdb05d2a89ace9183a89a
2020-04-01vppinfra: add tw_timer_2t_2w_512sl variantDave Barach1-0/+1
Type: feature Signed-off-by: Dave Barach <dave@barachs.net> Change-Id: I72cacfb5696dca74335f31415c0df795467615a5
2020-03-21vppinfra: fix minor cuckoo bugs and add cuckoo_16_8Klement Sekera1-1/+4
Type: improvement Change-Id: If1164d2eb81e9d4748436cb1bb8b164857d70565 Signed-off-by: Klement Sekera <ksekera@cisco.com>
2020-02-13vppinfra: add cmake option to grow vectors by 1Dave Barach1-0/+7
For debugging. Do not set this option in production. Type: feature Signed-off-by: Dave Barach <dave@barachs.net> Change-Id: I5e59671c4932e064bc087b85bf9c62c6f3bf48cf
2020-02-11vppinfra: remove the historical mheap memory allocatorDave Barach1-24/+6
The mheap allocator has been turned off for several releases. This commit removes the cmake config parameter, parallel support for dlmalloc and mheap, and the mheap allocator itself. Type: refactor Signed-off-by: Dave Barach <dave@barachs.net> Change-Id: I104f88a1f06e47e90e5f7fb3e11cd1ca66467903
2020-02-10vppinfra: use vm memory allocator for numa mappingFlorin Coras1-8/+1
Type: refactor Signed-off-by: Florin Coras <fcoras@cisco.com> Change-Id: I13b239cd572ae6dfaec07019d3d9b7c0ed3edcfa
2020-02-05vppinfra: numa vector placement supportDave Barach1-1/+8
Type: feature Signed-off-by: Dave Barach <dave@barachs.net> Change-Id: I7e7d95a089dd849c1f01ecea84529d8dbf239f21
2019-11-27misc: add address sanitizer heap instrumentationBenoît Ganne1-0/+1
Introduce AddressSanitizer support: https://github.com/google/sanitizers/ This starts with heap instrumentation. vlib_buffer, bihash and stack instrumentation should follow. Type: feature Change-Id: I7f20e235b2f79db72efd0e756f22c75f717a9884 Signed-off-by: Benoît Ganne <bganne@cisco.com>
2019-11-26build: remove valgrind leftoversBenoît Ganne1-1/+0
Valgrind never really worked well with VPP. Remove the partial support. Type: refactor Change-Id: Ic09773fd85f904fdd2240bc161e23a4c2b196cf6 Signed-off-by: Benoît Ganne <bganne@cisco.com>
2019-08-01vppinfra: fix spinlock and rwlock testsFlorin Coras1-1/+1
Type: fix Change-Id: I67b72b5ad03b972198c27bc0d927867f41b0e20b Signed-off-by: Florin Coras <fcoras@cisco.com>
2019-08-01vppinfra: remove unused historical codeDave Barach1-2/+0
"timer.[ch]" used a signal handler to deliver timer callbacks. Without indulging in a set of sigprocmask(...) system calls, it would be unsafe to use the mechanism. Rather than wait for another developer to accidentally open this particular can of worms, best to remove the code. It's nothing more than an attractive nuisance at this point. Type: refactor Signed-off-by: Dave Barach <dave@barachs.net> Change-Id: Ia3e7b00a389c302b466605dff0c1bf3566b8dbbd
2019-07-31vppinfra: added performance test for clib_rwlock_t (test_rwlock.c)jaszha031-0/+1
Spawns a uniform number of writer and reader threads across a number of cores where each writer thread increments a global variable a specified number of times, and the reader threads continually poll the global's value until the writers complete. Type: test Change-Id: I979c3734c6d03139d0802bff1846875d226f6fbb Signed-off-by: Jason Zhang <jason.zhang2@arm.com> Reviewed-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com> Reviewed-by: Lijian Zhang <Lijian.Zhang@arm.com>
2019-07-31vppinfra: added lock performance test for clib_spinlock_t (test_spinlock.c)jaszha031-0/+1
Spawns a uniform number of threads across a number of cores where each thread increments a global variable a specified number of times. Type: test Change-Id: I12b3a37708a199c297d022348d99dbb0e8349a9f Signed-off-by: Jason Zhang <jason.zhang2@arm.com> Reviewed-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com> Reviewed-by: Lijian Zhang <Lijian.Zhang@arm.com>
2019-07-24vppinfra: add mapped pcap file supportGary Boon1-0/+2
Type: feature Change-Id: Ic720d56a6f8901efde2a58519bc9aa553205a9a6 Signed-off-by: Gary Boon <gboon@cisco.com> Signed-off-by: Dave Barach <dave@barachs.net>
2019-07-13vppinfra: add doubly linked listFlorin Coras1-0/+1
Type: feature Change-Id: I21511c1abea703da67f1a491e73342496275c498 Signed-off-by: Florin Coras <fcoras@cisco.com>
2019-07-09vppinfra: allocate bihash virtual space on demandDave Barach1-0/+1
Reduces the vpp image virtual size by multiple gigabytes Add a "show bihash" command which displays configured and current virtual space in use by bihash tables. Modify the .py test framework to call "show bihash" on test tear-down Type: refactor Change-Id: Ifc1b7e2c43d29bbef645f6802fa29ff8ef09940c Signed-off-by: Dave Barach <dave@barachs.net>
2019-05-24Add callback multiplex supportDave Barach1-0/+1
Change-Id: Iddeb3a1b0e20706e72ec8f74dabc60b342f003ba Signed-off-by: Dave Barach <dave@barachs.net>
2019-05-07Improve lcov reported code coverage statsDave Barach1-3/+0
Remove unused code from the vppinfra build Add a bihash test case Change-Id: Ia930309efa28620dd1c0d69aaec432e2d8bd962c Signed-off-by: Dave Barach <dave@barachs.net>
2019-04-16vppinfra: add basic rbtreeFlorin Coras1-0/+2
Algorithm from CLRS, Introduction to Algorithms 3rd Edition, Ch. 13 Change-Id: I5bc2c507593770939cd5584f21dacf36ebd2b4c1 Signed-off-by: Florin Coras <fcoras@cisco.com>
2019-04-15vppinfra: add SHA-2 family of hash algorithms (including HMAC)Damjan Marion1-0/+1
Change-Id: I54d6fb1a2721b548620eb66cea254d0103deca32 Signed-off-by: Damjan Marion <damarion@cisco.com>
2018-11-17pcap-based dispatch tracerDave Barach1-0/+3
To facilitate dispatch trajectory tracing, vlib_buffer_t decoding, etc. through Wireshark Change-Id: I31356b9fa1f40cba8830aaf10a86a9fbb7546438 Signed-off-by: Dave Barach <dave@barachs.net>
2018-10-23Numa-aware, growable physical memory allocator (pmalloc)Damjan Marion1-0/+3
Change-Id: Ic4c46bc733afae8bf0d8146623ed15633928de30 Signed-off-by: Damjan Marion <damarion@cisco.com>
2018-10-22X86_64 perf counter pluginDave Barach1-0/+1
Change-Id: Ie5a00c15ee9536cc61afab57f6cadc1aa1972f3c Signed-off-by: Dave Barach <dave@barachs.net>
2018-10-19vppinfra: add atomic macros for __sync builtinsSirshak Das1-0/+1
This is first part of addition of atomic macros with only macros for __sync builtins. - Based on earlier patch by Damjan (https://gerrit.fd.io/r/#/c/10729/) Additionally - clib_atomic_release macro added and used in the absence of any memory barrier. - clib_atomic_bool_cmp_and_swap added Change-Id: Ie4e48c1e184a652018d1d0d87c4be80ddd180a3b Original-patch-by: Damjan Marion <damarion@cisco.com> Signed-off-by: Sirshak Das <sirshak.das@arm.com> Reviewed-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com> Reviewed-by: Ola Liljedahl <ola.liljedahl@arm.com> Reviewed-by: Steve Capper <steve.capper@arm.com>
2018-09-07Remove qsort.c from vppinfraDamjan Marion1-1/+0
Change-Id: Ifcc2717efd242ae2016563d6f3e5cd57fe161e00 Signed-off-by: Damjan Marion <damarion@cisco.com>
2018-09-03Compile vppinfra on macOSDamjan Marion1-3/+8
Add missing calls to clib_mem_init to vppinfra test codes. Change-Id: I53ffc6fc287d1a378065bb86c18b6e995ecdb775 Signed-off-by: Damjan Marion <damarion@cisco.com> Signed-off-by: Dave Barach <dave@barachs.net>
2018-09-02cmake: cache line size detectionDamjan Marion1-1/+1
Change-Id: I9a0df8d15deefdf31cfead56c96433cd7220b802 Signed-off-by: Damjan Marion <damarion@cisco.com>
2018-08-30cmake: a bit of packaging workDamjan Marion1-1/+2
Change-Id: I40332c2348c4aab873d726532f2ac3c4abde7ec9 Signed-off-by: Damjan Marion <damarion@cisco.com>
2018-08-26cmake: add add_vpp_library and add_vpp_executable macrosDamjan Marion1-29/+34
Change-Id: I1382021a6f616571b4b3243ba8c8999239d10815 Signed-off-by: Damjan Marion <damarion@cisco.com>
2018-08-24cmake: fix -DVPP_USE_DLMALLOC=OFFDamjan Marion1-2/+12
Change-Id: Ib8dc37b1a39c92a0c7b22cebdf985c6afa8229d9 Signed-off-by: Damjan Marion <damarion@cisco.com>
2018-08-17CMake as an alternative to autotools (experimental)Damjan Marion1-0/+235
Change-Id: Ibc59323e849810531dd0963e85493efad3b86857 Signed-off-by: Damjan Marion <damarion@cisco.com>