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2023-04-18vppinfra: missing static_always_inline in crc32c.hDamjan Marion1-2/+2
Change-Id: Ie7ee71af7dbbc23de3f413423070ea87fb36ed8c Type: fix Signed-off-by: Damjan Marion <damarion@cisco.com>
2023-04-17vppinfra: table based crc32c for targets without crc32c instructionsDamjan Marion1-0/+71
Type: improvement Signed-off-by: Damjan Marion <damarion@cisco.com> Change-Id: I45cef390c72f2102c8c3d94f49bed7d0e0e0d7b2
2023-03-14vlib: fix clib_crc32c on odd lengths and clib_crc32c_u8Andrew Yourtchenko1-1/+1
Fix the typo in the intrinsic name, which caused incorrect intrinsic to be used. Type: fix Signed-off-by: Andrew Yourtchenko <ayourtch@gmail.com> Change-Id: Ib7fde14d12897e4d1bfb5a01f6d65025473e4f8e
2022-10-17cnat: Add sctp supportNathan Skrzypczak1-8/+12
This patch adds SCTP support in the CNat translation primitives. It also exposes a clib_crc32c_with_init function allowing to set the init value to start the crc32 with instead of 0. Type: feature Change-Id: I86add4cfcac08f2a5a34d1e1841122fafd349fe7 Signed-off-by: Nathan Skrzypczak <nathan.skrzypczak@gmail.com>
2021-11-12hash: refactor crc32_5tupleDamjan Marion1-33/+47
Type: improvement Change-Id: I31cae2367e2ec7fc89991ca0df994a73da93aaed Signed-off-by: Damjan Marion <damarion@cisco.com>
2019-01-02Fixes for buliding for 32bit targets:David Johnson1-2/+2
* u32/u64/uword mismatches * pointer-to-int fixes * printf formatting issues * issues with incorrect "ULL" and related suffixes * structure alignment and padding issues Change-Id: I70b989007758755fe8211c074f651150680f60b4 Signed-off-by: David Johnson <davijoh3@cisco.com>
2018-08-2832/64 shmem bihash interoperabilityDave Barach1-0/+2
Move the binary api segment above 4gb Change-Id: I40e8aa7a97722a32397f5a538b5ff8344c50d408 Signed-off-by: Dave Barach <dave@barachs.net>
2018-05-25bond: performance harvestingSteven1-0/+2
- hash is great. But it is a bit too slow for the DP. Use direct array indexing to quickly retrieve the slave interface. - the algorithm used by flow hash is great. But it is a bit too slow for the DP. Use l2_hash_hash() extracted from lb_hash.h which ECMP is using. It makes use of intrinsic crc32 instruction set. - shortcut modulo arithmetic when the operand is 2**x (where x up to 4) to avoid division instruction. - special case for link count == 1 in bond_tx_fn() - use clib_mem_unaligned to access data for the packet to avoid alignment error - Fix some typos for packet tracing. Change-Id: I8eae3ad497061c5473aa675ba894ee0211120d25 Signed-off-by: Steven <sluong@cisco.com>
2017-12-16Use crc32 wrapper (VPP-1086)Gabriel Ganne1-0/+5
This allows arm platforms to also take advantage of crc32 hardware acceleration. * add a wrapper for crc32_u64. It's the only one really used. Using it instead of a call to clib_crc32c() eases building symmetrical hash functions. * replace #ifdef on SSE4 by a test on clib_crc32c_uses_intrinsics. Note: keep the test on i386 * fix typo in lb test log Change-Id: I03a0897b70f6c1717e6901d93cf0fe024d5facb5 Signed-off-by: Gabriel Ganne <gabriel.ganne@enea.com>
2017-11-15armv8 crc32 - fix macro nameGabriel Ganne1-1/+1
Change-Id: Iba2d20c0a3d4f07457d108d014a6fa4522cb8e2c Signed-off-by: Gabriel Ganne <gabriel.ganne@enea.com>
2017-06-12Fix build breakge post 6956Neale Ranns1-0/+2
Change-Id: I0ab0e3e40b00ed5c2a34f5c23d04b596c1e9aa5f Signed-off-by: Neale Ranns <nranns@cisco.com>
2017-06-12Remove calls to crc_u32 and add clib_crc32c for armv8+crcChristophe Fontaine1-1/+25
crc_u32 was not defined for non x86_64 with SSE4.2 processors. Calls to "crc_u32" are removed and replaced by either a call to clib_crc32c or a call to clib_xxhash, as the result is not used as a check value but as a hash. Change-Id: I3af4d68e2e5ebd0c9b0a6090f848d043cb0f20a2 Signed-off-by: Christophe Fontaine <christophe.fontaine@enea.com>
2017-05-10Add crc32c inline function, allows compilation on 32-bit systemsDamjan Marion1-0/+58
32-bit code still can use crc32c instructions, but it operates on 32 registers Change-Id: I9bb6b0b59635d6ea6a753584676ebcf59c8f6584 Signed-off-by: Damjan Marion <damarion@cisco.com>