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Change-Id: Ibe7f806b9d600994e83c9f1be526fdb0a1ef1833
Signed-off-by: Damjan Marion <damarion@cisco.com>
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Change-Id: If6c65f16c6fba8beb90e189c1443c3d7d67ee02c
Signed-off-by: Damjan Marion <damarion@cisco.com>
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Change-Id: Ibc59323e849810531dd0963e85493efad3b86857
Signed-off-by: Damjan Marion <damarion@cisco.com>
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Without inlining [TAG=vpp_debug], gcc7 (at least) refuses to produce
the indicated vector unit instruction.
Change-Id: I0f0400ad74b1e498dce7963a85c47d33afe0a768
Signed-off-by: Dave Barach <dave@barachs.net>
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Change-Id: I1a28ddf535c80ecf4ba4bf31659ff2fead1d8a64
Signed-off-by: Damjan Marion <damarion@cisco.com>
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Change-Id: I4bf1cfe5a9492092a7362675079c47629b6f0ee8
Signed-off-by: Damjan Marion <damarion@cisco.com>
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Change-Id: I4e0fd487970796f0153a5b16333827d23b57deac
Signed-off-by: Damjan Marion <damarion@cisco.com>
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Change-Id: I56782652d8ef10304900cc293cfc0502689d800e
Signed-off-by: Damjan Marion <damarion@cisco.com>
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Remove functions which have native C equivalent (i.e. _is_equal can be
replaced with ==, _add with +)
Add SSE4.2, AVX-512 implementations of splat, load_unaligned, store_unaligned,
is_all_zero, is_equal, is_all_equal
Change-Id: Ie80b0e482e7a76248ad79399c2576468532354cd
Signed-off-by: Damjan Marion <damarion@cisco.com>
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This fixes ARM64 build where we dont have defined u16x8_msb_mask(...)
Change-Id: I864f5134a0d951601810c800f587d173b3b7ef41
Signed-off-by: Damjan Marion <damarion@cisco.com>
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Change-Id: I1042c0fe179b57a00ce99c8d62cb1bdbe24d9184
Signed-off-by: Damjan Marion <damarion@cisco.com>
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Change-Id: If174d189de40e6f9ffae99997bba93a2519d9fda
Signed-off-by: Damjan Marion <damarion@cisco.com>
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Change-Id: Ie9f611fa6a962b0937245f5cc949571ba11c5604
Signed-off-by: Damjan Marion <damarion@cisco.com>
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Change-Id: I6511110d0472203498a4f8741781eeeeb4f90844
Signed-off-by: Damjan Marion <damarion@cisco.com>
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