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2019-03-20Re-enable aarch64 neon instruction in vlib_buffer_free_inlineLijian.Zhang1-2/+9
int vaddvq_u8 (uint8x16_t __a) is not appropriate to implement xxx_is_all_zero, as there may be overflow causing incorrect return value. Here's an example. u8x16 x = {0 <repeats 12 times>, 1, 255, 0, 0}; Change-Id: Ia6a10bdf8da360dec12db902d028751a1a77e9a4 Signed-off-by: Lijian Zhang <Lijian.Zhang@arm.com> Reviewed-by: Sirshak Das <Sirshak.Das@arm.com>
2019-03-18Fix build with newer linux headersDamjan Marion2-3/+6
Change-Id: Ibfdcec60567ec357205fa137257f2d8cba44b01c Signed-off-by: Damjan Marion <damarion@cisco.com>
2019-03-15Fix bihash bucket double unlock.Tom Seidenberg1-2/+1
Change-Id: Icc9bef32d1bb2b8f277598c50c69343c81f22cd2 Signed-off-by: Tom Seidenberg <tseidenb@cisco.com>
2019-03-12Use AVX2 as default even on AVX512 systemsDamjan Marion1-1/+1
Use of scalar AVX512 instructions impacts the maximum CPU frequency as they require CPU to request level 1 power license. So sparse use of AVX512 like we do, typically causes more harm than improvement. This patch makes AVX2 higher priority than AVX512, but still there is option to change it on per-node basis: vpp# set node function ethernet-input avx512 Change-Id: I42e03510a6efc1756e22fbb70e8c76d7f74f59d7 Signed-off-by: Damjan Marion <damarion@cisco.com>
2019-02-27VPP-1576: fix Coverity issuesDave Barach1-1/+1
Change-Id: I8b59b2e1c0525abf4b0492e50a7af57df4cd3ce2 Signed-off-by: Dave Barach <dave@barachs.net>
2019-02-26Fix vpp crashing when attempting to run in kubernetes PodArtem Belov1-0/+21
mmap does not fail but writing to mapped memory is causing sigbus. Change-Id: I5135f32eede67fccb4aaa07a501cd262d254ed8d Signed-off-by: Artem Belov <artem.belov@xored.com>
2019-02-21physmem: keep physmem VA in 39-bit address space on x86_64Damjan Marion3-5/+11
Some x86 CPUs have IOMMU capable dealing only with 39-bit address space This patch also adds option to specify physmem base address from startup.conf Change-Id: I9e8abd26efb60e9c4ad54c035fb1751a4a61f4dc Signed-off-by: Damjan Marion <damarion@cisco.com>
2019-02-02Deprecate old mutliarch code, phase 1Damjan Marion1-6/+2
It is causing compilation sloness with gcc-7 so removing it before it was originally planned. So far macros are left in the tree so we can know which nodes to convert to new multiarch code. Change-Id: Idb14622ca61fdce1eba59723b20d98715b7971e6 Signed-off-by: Damjan Marion <damarion@cisco.com>
2019-01-30buffers: major cleanup and improvementsDamjan Marion2-0/+60
This patch introduces following changes: - deprecated free lists which are not used and not compatible with external buffer managers (i.e. DPDK) - introduces native support for per-numa buffer pools - significantly improves performance of buffer alloc and free Change-Id: I4a8e723ae47056717afd6cac0efe87cb731b5be7 Signed-off-by: Damjan Marion <damarion@cisco.com>
2019-01-27Fix issue with cpu_id and numa_code captured too earlyDamjan Marion1-1/+1
Change-Id: I79b213b34c6071d14acf1922f89037a4a5a36c45 Signed-off-by: Damjan Marion <damarion@cisco.com>
2019-01-23vppinfra: add CLIB_CACHE_LINE_ROUND() macroDamjan Marion1-0/+1
Change-Id: Ic141162acaf39878ab978a997e3f6757d4f7c240 Signed-off-by: Damjan Marion <damarion@cisco.com>
2019-01-23pmalloc: don't iterate if there is no enough free spaceDamjan Marion1-0/+3
Change-Id: I975d46a82e9f884a9cd0ac2bd5f57181695f4124 Signed-off-by: Damjan Marion <damarion@cisco.com>
2019-01-21doxygen formatting fix: prevent stray examples appearing in the docsAndrew Yourtchenko1-2/+2
The 'example' keyword triggers the creation of very out-of-context example in the "Examples" top level of documentation. Rename the keyword in the comment so the comment is still readable, but does not trigger the doxygen. Change-Id: Iecbdc236918f9178a034817aa6cea7ab6b2c1654 Signed-off-by: Andrew Yourtchenko <ayourtch@gmail.com> (cherry picked from commit 1705599efe5eec09c09d2214da776d92d0e4f1cf)
2019-01-20Store numa-noda and cpu-index in vlib_main_tDamjan Marion1-0/+17
Change-Id: If88ccd965122b9318a39a8d71b53334cd1fd81e4 Signed-off-by: Damjan Marion <damarion@cisco.com>
2019-01-18Look for plugins in target triplet subdirDamjan Marion1-0/+2
Change-Id: I3bab0ab05b4f552ad64392439fb48409ab0ab8c0 Signed-off-by: Damjan Marion <damarion@cisco.com>
2019-01-18deprecate clib_memcpy64_x4Damjan Marion1-68/+0
Storing buffer in local template seems to be better option.... Change-Id: I1a2fdd68cb956f99a5b36d2cd810fc623e089bcf Signed-off-by: Damjan Marion <damarion@cisco.com>
2019-01-18vcl: move forking logic to vlsFlorin Coras1-12/+15
Change-Id: I721542aca139d7908a4f917629856f82cae79962 Signed-off-by: Florin Coras <fcoras@cisco.com>
2019-01-10strncpy_s_inline copies more bytes than necessarySteven1-2/+3
Given n equals to the maximum number of bytes to copy from src in the API, or the rough estimate strlen of src, strncpy_s_inline should not copy more than the number of bytes, computed by strlen(src), to dst if n is greater than strlen(src). The number of bytes to copy is computed by strnlen(src,n), not n. Change-Id: I088b46125d9776962750e121f1fbf441952efc2b Signed-off-by: Steven <sluong@cisco.com>
2019-01-09Use the official libpcap file typeDave Barach1-13/+8
Change-Id: Ia34a4278eedc8cf450688b1fa0291e1f976868d3 Signed-off-by: Dave Barach <dave@barachs.net>
2019-01-02Fixes for buliding for 32bit targets:David Johnson5-27/+27
* u32/u64/uword mismatches * pointer-to-int fixes * printf formatting issues * issues with incorrect "ULL" and related suffixes * structure alignment and padding issues Change-Id: I70b989007758755fe8211c074f651150680f60b4 Signed-off-by: David Johnson <davijoh3@cisco.com>
2019-01-02Add microarch details to 'show cpu'.Paul Vinciguerra1-2/+4
Change-Id: I31a3ff9e8f70468196c091027592a3aed2d09ac3 Signed-off-by: Paul Vinciguerra <pvinci@vinciconsulting.com>
2019-01-01Default huge page size to the regular page sizeDave Barach1-0/+6
With this simple tweak, vpp is OK for "make test" or non-dpdk driver operation over a kernel which doesn't support hugepages at all. Tested on a Raspberry-pi 3B+ running the Ubuntu 18.04 64-bit server beta image. It's amazing that such a minimal system will not only self-compile vpp, but also run the unit tests. It's slow, but what do you expect for that amount of money? Change-Id: I7f080f871c828cc4b44be13809495278fadbd717 Signed-off-by: Dave Barach <dave@barachs.net>
2018-12-28vppinfra: add simple ring implementationDamjan Marion1-0/+134
Change-Id: I188e2dfd187d7b2ab7e0fbb11461f3db052f3224 Signed-off-by: Damjan Marion <damarion@cisco.com>
2018-12-19session: add cli option to dump session elogFlorin Coras3-3/+28
Change-Id: I1f42644f143bb65ee764c0f869b402595126adac Signed-off-by: Florin Coras <fcoras@cisco.com>
2018-12-19tw: fix _16t_1w_2048sl timer weel definitionFlorin Coras1-3/+3
Change-Id: If5c44241577bc5a42d33f1ec5a62097974d6fda8 Signed-off-by: Florin Coras <fcoras@cisco.com>
2018-12-17docs: clarify vector element alignment description.Dave Wallace1-6/+8
Change-Id: I6da153779010263e6fc4b51c64b01444aaadca17 Signed-off-by: Dave Wallace <dwallacelf@gmail.com>
2018-12-05Improve strncpy_s src/dst overlap checkDave Barach1-2/+12
Let m = user estimate of the (max) src string length, low = smaller address of (src, dst), hi = larger address (src, dst). if (low + (m - 1) >= hi), we have a *potential* overlapping copy which is not allowed. Before we declare overlap - and return an error - retry the check with m = actual src string length. The resulting "test string" failure affected aarch64 (only) because of differences in test code stack variable placement / alignment. Change-Id: I2931d1ce2c61af3d3880075b033d2a4c4e421f09 Signed-off-by: Dave Barach <dave@barachs.net>
2018-12-02vppinfra: c11 safe string functionsSteven2-0/+1082
Add memcmp_s, strcmp_s, strncmp_s, strcpy_s, strncpy_s, strcat_s, strncat_s, strtok_s, strnlen_s, and strstr_s C11 safe string API. For migrating extant unsafe API, add also the corresponding macro version of each safe API, clib_memcmp, clib_strcmp, etc. In general, the benefits of the safe string APIs are to provide null pointer checks, add additional argument to specify the string length of the passed string rather than relying on the null terminated character, and src/dest overlap checking for the the string copy operations. The macro version of the API takes the same number of arguments as the unsafe API to provide easy migration. However, it does not usually provide the full aformentioned benefits. In some cases, it is necessary to move to the safe API rather than using the macro in order to avoid some unpredictable problems such as accessing memory beyond what it is intended due to the lack of the passed string length. dbarach: add a "make test" vector, and a doxygen file header cookie. Change-Id: I5cd79b8928dcf76a79bf3f0b8cbc1a8f24942f4c Signed-off-by: Steven <sluong@cisco.com> Signed-off-by: Dave Barach <dave@barachs.net>
2018-11-29do not opttimize graph node functions in debug buildsDamjan Marion1-1/+1
Change-Id: I5b4cd419d317381a06e7e6d703373959f4bbd97b Signed-off-by: Damjan Marion <damarion@cisco.com>
2018-11-29vcl: basic support for apps that forkFlorin Coras1-1/+1
- intercept fork and register a new worker with vpp - share sessions between parent and forked child - keep binary api state per worker Change-Id: Ib177517d661724fa042bd2d98d18e777056352a2 Signed-off-by: Florin Coras <fcoras@cisco.com>
2018-11-29vppinfra: add pool_dup macroFlorin Coras1-0/+35
Change-Id: I192e340bd072d27bf6ddc382347ad5c3ca411bad Signed-off-by: Florin Coras <fcoras@cisco.com>
2018-11-28Use acquire/release ordering when accessing svm_fifo shared variable cursizeSirshak Das1-0/+4
Improves TCP iperf3 performance by ~3% on AArch64. Change-Id: I1e51bd8403ba45ec6af4c2f96b95e884c1ae0d67 Signed-off-by: Sirshak Das <sirshak.das@arm.com> Reviewed-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com> Reviewed-by: Ola Liljedahl <ola.liljedahl@arm.com>
2018-11-28cmake: display warning and continue if dpdk not presentDamjan Marion1-4/+4
Change-Id: I5cb2619444507a159c42ac8401800e90b6541a20 Signed-off-by: Damjan Marion <damarion@cisco.com>
2018-11-27pmalloc: correct format_pmalloc_map u32 index overrun bugKingwel Xie2-5/+3
Change-Id: I95ba4eab6e2154ef33a479450b997c8317db3a92 Signed-off-by: Kingwel Xie <kingwel.xie@ericsson.com>
2018-11-26vppinfra: prevent dlmalloc from allocating memory via mmap_alloc()Andrew Yourtchenko1-1/+22
If the heap does not have enough space to satisfy allocation request, the allocator calls sys_alloc(). There, if the request is bigger than mparams.mmap_threshold, the mmap_alloc() is called to allocate memory via a direct mmap call. The resulting allocated memory is properly recognized by clib_mem_is_heap_object() only for the first such request. Subsequent requests overwrite the tracking data, resulting in previously "valid" addresses become invalid, as seen by clib_mem_is_heap_object(). The result is a misleading behavior which masks other issues. This is a temporary change to avoid the affected codepath until there is a proper fix to track the directly mmap-allocated memory. Change-Id: I4137f91b5196d4503c40cf8ecc2f71554bc8f858 Signed-off-by: Andrew Yourtchenko <ayourtch@gmail.com>
2018-11-20vppinfra: add 128 and 256 bit vector scatter/gather inlinesDamjan Marion2-0/+102
Change-Id: If6c65f16c6fba8beb90e189c1443c3d7d67ee02c Signed-off-by: Damjan Marion <damarion@cisco.com>
2018-11-17pcap-based dispatch tracerDave Barach4-0/+581
To facilitate dispatch trajectory tracing, vlib_buffer_t decoding, etc. through Wireshark Change-Id: I31356b9fa1f40cba8830aaf10a86a9fbb7546438 Signed-off-by: Dave Barach <dave@barachs.net>
2018-11-15VPP-1474: fix 2x coverity warningsDave Barach2-3/+3
Change-Id: I441beaf3d7f57886580d7cce35ef592aa0fcca5f Signed-off-by: Dave Barach <dave@barachs.net>
2018-11-14Remove c-11 memcpy checks from perf-critical codeDave Barach16-58/+70
Change-Id: Id4f37f5d4a03160572954a416efa1ef9b3d79ad1 Signed-off-by: Dave Barach <dave@barachs.net>
2018-11-10pmalloc: u32 pp->index leads to va address overrunKingwel Xie1-1/+2
when pagesize is 1G, this pm->base + (pp->index << pm->def_log2_page_sz) would very soon overrun if creating multiple mempools add a (uword) to it Change-Id: If769b99d344cc3f547418a242a7497d044071615 Signed-off-by: Kingwel Xie <kingwel.xie@ericsson.com>
2018-11-08Calculate clock rounding constantDave Barach2-3/+20
Compute the first power of ten which is greater than 0.1% of the clock rate. Save the result, and use it to round future results. The previous constant value - 1e7 - didn't work properly on aarch64. Change-Id: Ic021e3eb1b90c0d4a7d9f1b6425123f0c8b48b0b Signed-off-by: Dave Barach <dave@barachs.net>
2018-11-08physmem: Add physmem map supportMohsin Kazmi2-0/+22
This patch adds support for mapping the virtual address to physical address and size of memory allocated. Change-Id: I7659a1881308e89b215c486fecd7c973076d0773 Signed-off-by: Mohsin Kazmi <sykazmi@cisco.com>
2018-11-07pmalloc: fix shared mappingsDamjan Marion1-2/+4
Change-Id: I6782544d5ee0a66b1a027874b23574416093ca92 Signed-off-by: Damjan Marion <damarion@cisco.com>
2018-11-07Optimize xxx_zero_byte_mask NEON functionLijian Zhang1-44/+7
Optimize zero byte mask NEON functions below with less intrinsics, and get their outputs consistent with functions in vector_sse42.h always_inline u32 u64x2_zero_byte_mask (u64x2 input) always_inline u32 u32x4_zero_byte_mask (u32x4 input) always_inline u32 u16x8_zero_byte_mask (u16x8 input) always_inline u32 u8x16_zero_byte_mask (u8x16 input) always_inline u32 i64x2_zero_byte_mask (i64x2 input) always_inline u32 i32x4_zero_byte_mask (i32x4 input) always_inline u32 i16x8_zero_byte_mask (i16x8 input) always_inline u32 i8x16_zero_byte_mask (i8x16 input) Change-Id: I7f485915baeb37fa2dd484699b8769e0136f6574 Signed-off-by: Lijian Zhang <Lijian.Zhang@arm.com> Reviewed-by: Sirshak Das <Sirshak.Das@arm.com>
2018-11-05Enable atomic swap and store macro with acquire and release orderingSirshak Das2-4/+3
Add atomic swap and store macro with acquire and release ordering respectively. Variable in question is interupt_pending variable which is used as guard variable by input nodes to process the device queue. Atomic Swap is used with Acquire ordering as writes or reads following this in program order should not be reordered before the swap. Atomic Store is used with Release ordering, as post store the node is added to pending list. Change-Id: I1be49e91a15c58d0bf21ff5ba1bd37d5d7d12f7a Original-patch-by: Damjan Marion <damarion@cisco.com> Signed-off-by: Sirshak Das <sirshak.das@arm.com> Reviewed-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com> Reviewed-by: Ola Liljedahl <ola.liljedahl@arm.com>
2018-10-31Add and enable msb mask vector intrinsic for aarch64.Lijian Zhang1-10/+28
This patch enables the use of this function for enqueuing frames to the next graph node. Change-Id: I4003110db59870f7106e0d13942d6ff7bc54b46d Signed-off-by: Lijian Zhang <Lijian.Zhang@arm.com> Reviewed-by: Sirshak Das <Sirshak.Das@arm.com> Reviewed-by: Honnappa Nagarahalli <Honnappa.Nagarahalli@arm.com> Reviewed-by: Steve Capper <Steve.Capper@arm.com>
2018-10-30vppinfra: fix bug in default_socket_sendmsgDamjan Marion1-1/+1
Change-Id: Ia9b74761ce511d218bb5319c7c9b5e58be3e2e8a Signed-off-by: Damjan Marion <damarion@cisco.com>
2018-10-28physmem: coverity issuesDamjan Marion1-3/+4
Change-Id: I34cc55d8292a69fb451ed0031484994f51d3537a Signed-off-by: Damjan Marion <damarion@cisco.com>
2018-10-25pmalloc: don't lock 4K pages if we don't have access to pagemapDamjan Marion2-6/+30
Without pagemap access only way to do DMA to physmem is by using IOMMU. In such case VFIO will take care for preventing paging of such memory so we don't need to lock here. Change-Id: Ica9c20659fba3ea3c96202eb5f7d29c43b313fa9 Signed-off-by: Damjan Marion <damarion@cisco.com>
2018-10-25pmalloc: support for 4K pagesDamjan Marion5-80/+250
Change-Id: Iecceffe06a92660976ebb58cd3cbec4be8931db0 Signed-off-by: Damjan Marion <damarion@cisco.com>