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2017-09-19format_sockaddr: add trivial support for AF_LOCAL socketsDave Barach1-0/+12
There isn't anything useful to print. Return a unique name since the unix cli uses the returned string to create a node name. Node names must be unique, or vpp will quit abruptly. Change-Id: I8f85ae8fececdbfd26c729bc32c2c2007c06d1ea Signed-off-by: Dave Barach <dave@barachs.net>
2017-09-18Fixes for issues Coverity has reported (VPP-972)Chris Luke1-1/+1
177117: fstat() returns -1 on error; the code is checking for any positive value instead 175142: final return could never be reached; simple refactoring 175235,175236: Warning suppressed with an explicit cast to (void) 174817: Final return couldn't be reached; is is_in_order is 0 then 'rv' is already returned above 172095,172093: If is_is_set does not get set to 1, then return 0 has already been invoked 174405: Re-kill this (nothing sets rv) 171136: Looks like a cmd line flag to set test_bytes was missing; added it, and refactored the argc/argv processing to avoid two other potential segv's 176813: Add range checking for term width/height. First stab at a reasonable range is 1-512 for both. 175350: Fix implicit casting in shift operation 174272: Not a c+p error; try using a coverity annotation to ignore it 174273,175320: Annotated FORWARD_NULL Change-Id: I58d0f860fc2209f59f8d1b6b344d631b8d429ace Signed-off-by: Chris Luke <chrisy@flirble.org>
2017-09-15vppinfra: add clib_mem_vm_ext_alloc functionDamjan Marion8-268/+696
Change-Id: Iff33694fc42cc3bcc73cf1372339053a6365039c Signed-off-by: Damjan Marion <damarion@cisco.com>
2017-09-14clib_socket: add sendmsg / recvmsg with ancillary data supportDamjan Marion3-24/+161
Change-Id: Ie18580e05ec12291e7026f21ad874e088a712c8e Signed-off-by: Damjan Marion <damarion@cisco.com>
2017-09-12tcp: horizontal scaling improvmentsFlorin Coras1-4/+7
- do not scale syn-ack window - fix the max number of outstanding syns in builtin client - fix syn-sent ack validation to use modulo arithmetic - improve retransmit timer handler - fix output buffer allocator leakeage - improved debugging Change-Id: Iac3bc0eadf7d0b494a93e22d210a3153b61b3273 Signed-off-by: Florin Coras <fcoras@cisco.com>
2017-09-09move unix_file_* code to vppinfraDamjan Marion1-0/+134
This will allow us to use this code in client libraries without vlib. Change-Id: I8557b752496841ba588aa36b6082cbe2cd1867fe Signed-off-by: Damjan Marion <damarion@cisco.com>
2017-09-08Fixes for issues reported by Coverity (VPP-972)Chris Luke1-2/+14
Change-Id: I25238debb7081b4467aec4620dfdef33fbef3295 Signed-off-by: Chris Luke <chrisy@flirble.org>
2017-09-07Add fd/socket name to clib_socket_* error msgs.Dave Wallace1-12/+22
Change-Id: Ifcc9df04e7b224dfc9e9be53a30df5bbccbe05b4 Signed-off-by: Dave Wallace <dwallacelf@gmail.com>
2017-09-06Fixes for issues raised by Coverity (VPP-972)Chris Luke1-1/+2
Change-Id: I4b1f27b95d67d48b7a13750ff8754c344ed7afa7 Signed-off-by: Chris Luke <chrisy@flirble.org>
2017-09-01Add fixed-size, preallocated pool supportDave Barach12-38/+431
Simply call pool_init_fixed(...) before using the pool. Note that fixed, preallocated pools live in individually-mmap'ed address segments, except for the free element bitmap. A large fixed pool can exceed 4gb. Fix tcp buffer allocator leak, remove broken assert Change-Id: I4421082e12a77c41c6e20f7747f3150dcd01fc26 Signed-off-by: Dave Barach <dave@barachs.net>
2017-08-31Fix BIHASH_KVP_CACHE_SIZE == 0 caseDave Barach3-4/+37
Setting the bucket-level LRU cache size to zero removes the bucket-level LRU cache code. Change-Id: Idf2e63d0d508675e957366515863766f79a3479c Signed-off-by: Dave Barach <dbarach@cisco.com>
2017-08-22acl-plugin: Recreate the bihash_40_8.h in the proper placeAndrew Yourtchenko1-0/+87
Change-Id: I30a3df53bc5fe5ab991a657918eb502bd2913440 Signed-off-by: Andrew Yourtchenko <ayourtch@gmail.com>
2017-08-02Fix tcp tx buffer allocationFlorin Coras1-1/+1
- Make tcp output buffer allocation macro an inline function - Use per ip version per thread tx frames for retransmits and timer events - Fix / parameterize tcp data structure preallocation - Add a couple of gdb-callable show commands - Fix local endpoint cleanup Change-Id: I67b47b7570aa14cb4634b6fd93c57cd2eacbfa29 Signed-off-by: Florin Coras <fcoras@cisco.com> Signed-off-by: Dave Barach <dave@barachs.net>
2017-07-23Atomic bucket lockDave Barach2-41/+58
Change-Id: I84908b9ad30d7555024e98b69ed37b111f31c27a Signed-off-by: Dave Barach <dbarach@cisco.com>
2017-07-19Add a bihash prefetchable bucket-level cacheDave Barach7-37/+320
According to Maciek, the easiest way to leverage the csit "performance trend" job is to actually merge the patch once verified. Manual testing indicates that the patch improves l2 path performance. Other use-cases are TBD. It's possible that we'll need to back out the patch depending on what happens. Change-Id: Ic0a0363de35ef9be953ad7709c57c3936b73fd5a Signed-off-by: Dave Barach <dave@barachs.net>
2017-07-13Use clib_crc32c_uses_intrinsics instead of __SSE4_2__Christophe Fontaine1-1/+1
clib_crc32c is not limited to x86 platforms. Change-Id: I5f6d5fdd4af80f9fe696d3317453fa58760df1db Signed-off-by: Christophe Fontaine <christophe.fontaine@enea.com>
2017-07-10VPP-904: fixes zero length CLI parameters parseAlexander Kotov1-2/+3
Change-Id: I21fbc9aff2b97a8b3f4cbed202c00b6d84557a6e Signed-off-by: Alexander Kotov <kot@yandex.ru>
2017-07-09format: Check for NaN when rendering doublesChris Luke2-1/+14
- The result of 0.0/0.0 was being rendered as a lot of zeroes in the integer portion, as in this example: DBGvpp# show physmem 0: 16 objects, 576k of 582k used, 3k free, 0 reclaimed, 2k overhead, 16380k capacity alloc. from small object cache: 0 hits 0 attempts (0.00%) replacements 0 alloc. from free-list: 0 attempts, 0 hits (0.00%), 0 considered (per-attempt 0.00) alloc. from vector-expand: 16 allocs: 16 73643.06 clocks/call frees: 0 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000.00 clocks/call - Add two macros to vppinfra/math.h that use compiler builtins to check for NaN and Infinity and then use them in format_float(). Change-Id: Iccc03997e6e33d6b888d1e7e20cd78df0cfd02e8 Signed-off-by: Chris Luke <chrisy@flirble.org>
2017-07-06vppinfra: revert clib_memcpy optimizationDamjan Marion2-10/+14
Looks like some compiler versions are producing wrong code when we are copying 9-16 bytes so reverting back to the original code. Change-Id: I74b5fa54a3b01f6288648f1cb0926030edd3b26f Signed-off-by: Damjan Marion <damarion@cisco.com>
2017-07-01Refactor API message handling codeKlement Sekera2-13/+36
This is preparation for new C API. Moving common stuff to separate headers reduces dependency issues. Change-Id: Ie7adb23398de72448e5eba6c1c1da4e1bc678725 Signed-off-by: Klement Sekera <ksekera@cisco.com>
2017-06-30VPP-893: handle multiple simultaneous event registrationsDave Barach2-1/+7
Change-Id: I8cd90820624987dbef848935e2de86fa66a86c17 Signed-off-by: Dave Barach <dave@barachs.net>
2017-06-28switch vlib process model to tw_timer_template timer implDave Barach8-0/+107
Change-Id: I36bb47faea55a6fea7af7ee58d87d8f6dd28f93d Signed-off-by: Dave Barach <dave@barachs.net>
2017-06-27FLOWPROBE: Add flowstartns, flowendns and tcpcontrolbitsOle Troan1-0/+14
- fixed problem with tcp_flag - changed flowtimestamp into NTP format Change-Id: I4ef05d6c69c5c078a0c80d59c5ccb0c85b924ba6 Signed-off-by: Ole Troan <ot@cisco.com>
2017-06-21Add option to create clib_socket with group write permissionsDamjan Marion2-0/+10
Also allow group write as default for CLI socket connections. Change-Id: I6af1f277f70581358cd9241bf0f5cb0752fe250f Signed-off-by: Damjan Marion <damarion@cisco.com>
2017-06-21Add knob to specify effective group id (gid) for VPP processDamjan Marion2-0/+29
Change-Id: Icf9bd4abda058fb380f1a25d5fe3917ffb38b1c4 Signed-off-by: Damjan Marion <damarion@cisco.com>
2017-06-20Parenthesize the usage of the macro argument within vec_search() macro ↵Andrew Yourtchenko1-1/+1
definition Change-Id: I488d7c2b864c0e3661c8abf0363e4b97984d4974 Signed-off-by: Andrew Yourtchenko <ayourtch@gmail.com>
2017-06-14VPP-874: fix coverity warnings in tw_timer_template.cDave Barach1-4/+4
Best guess, tested carefully, should do no harm. Clang doesn't complain either way; it's not certain that this patch will make the coverity warnings in tw_timer_template.c disappear. Change-Id: I75aa0cfd8970751e823a1165df2a755e947c4cf9 Signed-off-by: Dave Barach <dave@barachs.net>
2017-06-12three-level timer wheel implementation w/ overflow vectorDave Barach12-77/+1325
prep work for s/timing_wheel/tw_timer/ in the vlib process model Change-Id: I763f4968a8fce1764a3778b12def0afbd30086b1 Signed-off-by: Dave Barach <dave@barachs.net>
2017-06-12Fix build breakge post 6956Neale Ranns1-0/+2
Change-Id: I0ab0e3e40b00ed5c2a34f5c23d04b596c1e9aa5f Signed-off-by: Neale Ranns <nranns@cisco.com>
2017-06-12Remove calls to crc_u32 and add clib_crc32c for armv8+crcChristophe Fontaine4-63/+35
crc_u32 was not defined for non x86_64 with SSE4.2 processors. Calls to "crc_u32" are removed and replaced by either a call to clib_crc32c or a call to clib_xxhash, as the result is not used as a check value but as a hash. Change-Id: I3af4d68e2e5ebd0c9b0a6090f848d043cb0f20a2 Signed-off-by: Christophe Fontaine <christophe.fontaine@enea.com>
2017-06-05vppinfra: fix vec_validate_init_empty_aligned macroDamjan Marion1-1/+1
Change-Id: Ieafd00c7d03fe5c090808c7af4aa2f86974a092e Signed-off-by: Damjan Marion <damarion@cisco.com>
2017-06-05More GCC-7 errorsMarco Varlese1-0/+2
The Wmaybe-uninitialized is the new error included with Wall. This patch addresses the warning and fixes it. Change-Id: I8fdf9ff2d236c46b717024a14874fbbbad8af303 Signed-off-by: Marco Varlese <marco.varlese@suse.com>
2017-06-02Fix mac_age process crash in multi-threaded environmentSteve Shin1-2/+1
VPP crash is observed when MAC aging is enabled with multi-threaded mode. If a thread other-than-zero expands the working_copies vector, working_copy_lengths should be initialized with vec_validate_init_empty(..., -1) to fill -1 across lower-numbered working_copy_lengths vector element. Change-Id: I60959fc6511306b33acae323df9c6898fc6c50ce Signed-off-by: Steve Shin <jonshin@cisco.com>
2017-05-18VPP-847: improve bihash template memory allocator performanceDave Barach5-57/+111
Particularly in the DCLIB_VEC64=1 case, using vectors vs. raw clib_mem_alloc'ed memory causes abysmal memory allocator performance. Change-Id: I07a4dec0cd69ca357445385e2671cdf23c59b95d Signed-off-by: Dave Barach <dave@barachs.net>
2017-05-10completelly deprecate os_get_cpu_number, replace new occurencesDamjan Marion9-33/+44
Change-Id: I82c663bc0866c6c68ba354104b0bb059387f4b9d Signed-off-by: Damjan Marion <damarion@cisco.com>
2017-05-10Add crc32c inline function, allows compilation on 32-bit systemsDamjan Marion3-10/+62
32-bit code still can use crc32c instructions, but it operates on 32 registers Change-Id: I9bb6b0b59635d6ea6a753584676ebcf59c8f6584 Signed-off-by: Damjan Marion <damarion@cisco.com>
2017-05-10vppinfra: optimize and simplify splat inline functionsDamjan Marion1-17/+11
Example for u32x4 case: Old code generates 2 instructions: vmovd %edi,%xmm0 vpunpckldq %xmm0,%xmm0,%xmm0 vpunpcklqdq %xmm0,%xmm0,%xmm0 New code uses only one instruction: mov %edi,-0x4(%rsp) vbroadcastss -0x4(%rsp),%xmm0 Change-Id: I989dc3025f5fe3f6c880972389ded11f31e2f3f6 Signed-off-by: Damjan Marion <damarion@cisco.com>
2017-05-09Fix remaining 32-bit compile issuesDamjan Marion1-1/+1
Change-Id: I9664214652229b663c3e3ba7406b4ede96bfb123 Signed-off-by: Damjan Marion <damarion@cisco.com>
2017-05-03Fix vnet unit testsFilip Tehlar1-4/+4
Change-Id: Ibe55e4399c6b78d83268d7c49ed498cab7bfdb43 Signed-off-by: Filip Tehlar <ftehlar@cisco.com>
2017-04-25Define cache line size for x86 32-bitDamjan Marion1-1/+1
Change-Id: Ie70e805f342bda69207b9df9543f1eccb5e69612 Signed-off-by: Damjan Marion <damarion@cisco.com>
2017-04-21vppinfra: clib_memcpy improvementRay Kinsella2-10/+0
In the case where n is a constant 16 bytes, the second load/store is ignored by the load/store unit - it has neglible/zero cost. In the case where n is variable and greater than 512 bytes, the extra if (n == 16) branch has a very small performance impact. Change-Id: I04b313cf022c18fee31b1d9bcf6a128414659a99 Signed-off-by: Ray Kinsella <ray.kinsella@intel.com>
2017-04-01Clean up event log merge codeDave Barach3-70/+276
Fix a decade-old ridiculous qsort function bug. Managed to subtract floating-point numbers as if they were integers, leading to manufactured time-paradoxes. That completely confuses g2, leading to the summary disappearance of entire tracks' worth of data at high zoom levels. Add a manual alignment tweak parameter to elog_merge, users can dial-out time paradoxes caused by NTP-grade clock synchronization. The event-logger has a precision of O(100ns), whereas NTP synchronization is O(1ms). Change-Id: I69dedabaa314f69f9df74ec9ee66e21e6c87f703 Signed-off-by: Dave Barach <dave@barachs.net>
2017-03-30vppinfra: add spinlock inline functionsDamjan Marion1-0/+97
Change-Id: I86089e9bb604adfc260a111685001be1c897ce53 Signed-off-by: Damjan Marion <damarion@cisco.com>
2017-03-22Add memif - packet memory interface for intra-host communicationDamjan Marion1-0/+6
Change-Id: I94c06b07a39f07ceba87bf3e7fcfc70e43231e8a Signed-off-by: Damjan Marion <damarion@cisco.com> Co-Authored-By: Milan Lenco <Milan.Lenco@pantheon.tech>
2017-03-21armv8 - fix os_cpu_clock_frequency for armv8Gabriel Ganne1-0/+6
System timer of ARMv8 runs at a different frequency than the CPU's. The frequency is fixed, typically in the range 1-50MHz. It can be read at CNTFRQ special register. Change-Id: I6a21a6a9e2df783559df0caec63d5525c2258227 Signed-off-by: Gabriel Ganne <gabriel.ganne@enea.com>
2017-03-04timing wheel: avoid queueing expired timers and caching wrong earliest ↵Andrew Yourtchenko1-2/+11
expiry value This commit addresses two issues: 1) Avoid refilling the timing wheel with stale timers in rare circumstances. The timing_wheel_advance() may call advance_cpu_time_base() to update the cpu_time_base, which is used as a starting point for 32-bit offsets of events on the timer wheel. If the timing_wheel_advance() is not called for a longer period of time, then advance_cpu_time_base() is called multiple times in a loop. advance_cpu_time_base() has two parts - the first part adjusting the base for the existing event, and the second part trying to fill with the new events from the overflow queue, which now fit into the 32-bit-sized time window off the new cpu_time_base. In doing so this second part incorrectly considers the timers which have just expired (have the time index == w->current_time_index) to still be unexpired and places them onto the wheel instead of returning them as expired. For quick successive executions of timing_wheel_advance() these events result in a relatively benign late expiry - the newly placed events expire during the next call to timing_wheel_advance(). If the successive executions of timing_wheel_advance() result in multiple invocations of advance_cpu_time_base(), the Nth iteration of it may place a stale event on the timer wheel if the event time index equals to the current time index (which has been previously purged), while the N+1th iteration of it will trigger an assert violation on this stale event, resulting in a reboot. As part of the testing, two test runs were done before and after the change. Each of the test runs consisted of the following command: for i in `seq 1 300`; do ./test_timing_wheel validate events 10000 synthetic-time verbose seed $i iter 10000 wait-time 2 max-time 300; done The test runs completed identically, however they uncovered the following assert failure: vpp/src/vppinfra/test_timing_wheel.c:225 (test_timing_wheel_main) assertion `min_next_time[0] <= tm->events[i]' fails This assert is the second issue covered by this commit: 2) Inserting a new element may result in incorrect cached expiry value The w->cached_min_cpu_time_on_wheel is being updated within timing_wheel_advance() every time the elements are expired. However, it is not touched if the new elements are inserted. Assuming current time is "T" and the cached min cpu time is "T+X", if a new element is being inserted whose expiry time is "T+Y", and Y is such that Y < X, then the value w->cached_min_cpu_time_on_wheel becomes incorrect until the next expiry event, during which it is updated. The test catches this transient condition which results in the asserts seen in the runs above. The solution is to update the w->cached_min_cpu_time_on_wheel within timing_wheel_insert_helper() as necessary. Change-Id: I56a65a9a11cc2a1e0b36937a9c6d5ad10233a731 Signed-off-by: Andrew Yourtchenko <ayourtch@gmail.com>
2017-03-03IPv6 RA improvementsNeale Ranns1-0/+26
1) tests for RA options 2) memleaks deleteing a ip6_radv_info_t 3) MLD prefix code refactoring Change-Id: I34db103994bd8fbdbbec50b202d72770dd145681 Signed-off-by: Neale Ranns <nranns@cisco.com>
2017-03-01vppinfra: fix issue when copying 16 bytes with clib_memcpyDamjan Marion2-0/+10
Current code wos copying same data twice when length is 16. Change-Id: I8d935b32f61672aaea9789c097a5083ae8f78cdd Signed-off-by: Damjan Marion <damarion@cisco.com>
2017-03-01VPP-598: tcp stack initial commitDave Barach4-0/+291
Change-Id: I49e5ce0aae6e4ff634024387ceaf7dbc432a0351 Signed-off-by: Dave Barach <dave@barachs.net> Signed-off-by: Florin Coras <fcoras@cisco.com>
2017-02-24MFIB memory leak. free the per-source interface hashNeale Ranns1-5/+0
Change-Id: I0ccb337eb0ed50ccc64193533cd816f6e36e6db5 Signed-off-by: Neale Ranns <nranns@cisco.com>