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2019-07-13vppinfra: add doubly linked listFlorin Coras2-0/+255
Type: feature Change-Id: I21511c1abea703da67f1a491e73342496275c498 Signed-off-by: Florin Coras <fcoras@cisco.com>
2019-07-11vppinfra: bihash add-but-do-not-overwrite semanticsDave Barach1-0/+7
If is_add=2, fail w/ return value -2 if the key exists instead of overwriting the (key,value) pair. Type: feature Change-Id: I00a3c194a381c68090369c31d6c6f9870cfe0a62 Signed-off-by: Dave Barach <dave@barachs.net>
2019-07-09vppinfra: allocate bihash virtual space on demandDave Barach4-11/+136
Reduces the vpp image virtual size by multiple gigabytes Add a "show bihash" command which displays configured and current virtual space in use by bihash tables. Modify the .py test framework to call "show bihash" on test tear-down Type: refactor Change-Id: Ifc1b7e2c43d29bbef645f6802fa29ff8ef09940c Signed-off-by: Dave Barach <dave@barachs.net>
2019-07-02api: fix coverity warningsDave Barach1-1/+1
New coverity toolset, new set of squawks to fix Ticket: VPP-1649 Type: fix Change-Id: I2a7e4c42b101c6c79c01b150b2523ce3d5d62354 Signed-off-by: Dave Barach <dave@barachs.net>
2019-06-28vppinfra: add dummy/noop f32/f64 endian swap fnsDave Barach1-0/+8
Makes life easier for binary API language bindings Type: fix Change-Id: Ib459274fda05153d01cbb7bc328a8407e3ee5027 Signed-off-by: Dave Barach <dave@barachs.net>
2019-06-26vppinfra: add u64x2_scatter/u32x4_scatterLijian.Zhang1-0/+16
Add u64x2_scatter/u32x4_scatter in vector_neon.h. u64x2_scatter/u32x4_scatter scatters data from SIMD register to scattered memory locations. Type: feature Change-Id: I298d5478c7ba6935ab7402a6d467c7ee00f17e9f Signed-off-by: Lijian Zhang <Lijian.Zhang@arm.com> Reviewed-by: Sirshak Das <Sirshak.Das@arm.com> Reviewed-by: Honnappa Nagarahalli <Honnappa.Nagarahalli@arm.com>
2019-06-25vppinfra: fix tw_timer_first_expires_in_ticks for multiple wheelsAndreas Schultz1-0/+13
When only the fast in wheel is in use, the next expiring has to be within the fast_slot_bitmap. With mutliple wheels, the next expiring timer could be in the slow wheel. The timers on the slow wheel are only moved into the fast wheel when the fast wheel index reaches TW_SLOTS_PER_RING. When calculating the next expiring timer we therefor need to consider the timers on the slow wheel as well. When there are no more before reaching TW_SLOTS_PER_RING, instead of scanning the slow wheel, return the number of ticks until TW_SLOTS_PER_RING is reached. Type: fix Change-Id: I847031f8efc015c888d082f0b0c1bd500aa65704 Signed-off-by: Andreas Schultz <andreas.schultz@travelping.com> Signed-off-by: Dave Barach <dave@barachs.net>
2019-06-21vppinfra: add u64x2_gather/u32x4_gatherLijian.Zhang1-0/+18
Add u64x2_gather/u32x4_gather in vector_neon.h. u64x2_gather/u32x4_gather gathers data from scattered memory locations to a SIMD register. Type: feature Change-Id: I1dd27e38af28b9bed85143014c86197ee549fede Signed-off-by: Lijian Zhang <Lijian.Zhang@arm.com> Reviewed-by: Sirshak Das <Sirshak.Das@arm.com> Reviewed-by: Honnappa Nagarahalli <Honnappa.Nagarahalli@arm.com>
2019-06-19vppinfra: fix rbtree node deleteFlorin Coras1-3/+7
Type:fix Make sure tnil color is black and that the right node colors are updated. Change-Id: Ibd9d7ea9438df4dab977202955957824723a865d Signed-off-by: Florin Coras <fcoras@cisco.com>
2019-06-18vppinfra: rbtree custom insert/search/delFlorin Coras2-24/+99
Type: feature Add support for insert/search/del with custom compare function. Change-Id: Ibb740afc224d8adc29d3e1b51b46cdd738d1bd93 Signed-off-by: Florin Coras <fcoras@cisco.com>
2019-06-18stats: fix memory leakage when adding / deleting interfacesOle Troan2-0/+16
This fixes two leaks in registering errors in the stats segment. - The error name created by vlib_register_errors() was not freed. - Duplicate error names (when interface readded) was added to the vector. This fix also adds memory usage statistics for the statistics segment as /mem/statseg/{used, total} Change-Id: Ife98d5fc5baef5bdae426a5a1eef428af2b9ab8a Type: fix Signed-off-by: Ole Troan <ot@cisco.com>
2019-06-18vppinfra: add format_hex_bytes_no_wrapDamjan Marion2-0/+17
Type: feature Change-Id: I53e1f05b2b048925fca3b2f6b0499ff9c3e6ee12 Signed-off-by: Damjan Marion <damarion@cisco.com>
2019-06-16vlib: add "memory-trace stats-segment"Dave Barach5-21/+52
Type: feature Change-Id: Ie020fd7e2618284a63efbeb9895068f27c0fb9ab Signed-off-by: Dave Barach <dave@barachs.net>
2019-06-14vppinfra: optimize elog_stringDave Barach2-5/+31
Add a string hash to make sure that strings in the string table are unique. This optimization has been coded piecemeal in multiple places, we should have made the underlying function do the work years ago. Type: fix Change-Id: I5010fd4926b9b80ce3a168748f6de64e333ef498 Signed-off-by: Dave Barach <dave@barachs.net>
2019-06-05Switch atomic release API from __sync to __atomic builtin.Sirshak Das1-1/+1
__sync_lock_release switched to __atomic_store for code consitency, although both generate same instructions with current compilers. Change-Id: I37d320509e43a4c2b8a49af6346dc4a43ca2f535 Signed-off-by: Sirshak Das <sirshak.das@arm.com> Reviewed-by: Lijian Zhang <Lijian.Zhang@arm.com> Reviewed-by: Honnappa Nagarahalli <Honnappa.Nagarahalli@arm.com>
2019-06-05Switch atomic test and set API from __sync to __atomic builtinSirshak Das1-1/+1
__sync_test_and_set uses full memory barriers for AArch64, __atomic_exchange(ACQUIRE) would use load acquire. Change-Id: Ifdf2481db3b9dde6c5842d75671402862adb6d81 Signed-off-by: Sirshak Das <sirshak.das@arm.com> Reviewed-by: Lijian Zhang <Lijian.Zhang@arm.com> Reviewed-by: Honnappa Nagarahalli <Honnappa.Nagarahalli@arm.com>
2019-06-04elog: make elog_string() multi-thread safeSteven Luong1-0/+2
elog is supposed to be thread safe. Yet elog_string() is not. To fulfill that promise, let's make elog_string() thread safe to avoid surprises. Change-Id: Iab82faa7cb6719777a66c3ff14775e59a6a68a20 Signed-off-by: Steven Luong <sluong@cisco.com>
2019-05-27vppinfra: add pclmulqdq x86 cpuid flagDamjan Marion1-0/+1
Change-Id: If59fea9bb733f6a134d9cb5a9f61dfabf3441820 Signed-off-by: Damjan Marion <damarion@cisco.com>
2019-05-24Add callback multiplex supportDave Barach2-0/+112
Change-Id: Iddeb3a1b0e20706e72ec8f74dabc60b342f003ba Signed-off-by: Dave Barach <dave@barachs.net>
2019-05-17Add a debug-CLI leak-checkerDave Barach1-0/+2
leak-check { <any-debug-cli-command-and-args> } Hint: "set term history off" or you'll have to sort through a bunch of bogus leaks related to the debug cli history mechanism. Cleaned up a set of reported leaks in the "show interface" command. At some point, we thought about making a per-thread vlib_mains vector, but we never did that. Several interface-related CLI's maintained local static cache vectors. Not a bad idea, but not useful as things shook out. Removed the static vectors. Change-Id: I756bf2721a0d91993ecfded34c79da406f30a548 Signed-off-by: Dave Barach <dave@barachs.net>
2019-05-14Preallocate mhash key_tmps vectorDave Barach1-8/+1
Fix os_get_nthreads() so that it starts returning the correct answer as early as possible. Change-Id: Id5292262f2c3f521b07ffbe6a9f6748dcc4dcb7d Signed-off-by: Dave Barach <dave@barachs.net>
2019-05-13Fix typoIgor Mikhailov (imichail)1-1/+1
Change-Id: Ibc69195244bcc1e8e82c488fcd50b1eb2fcf81c0 Signed-off-by: Igor Mikhailov (imichail) <imichail@cisco.com>
2019-05-10zero-pad date string output.Paul Vinciguerra1-2/+2
2019/ 5/ 9 21:18:01:710 notice -> 2019/05/09 21:18:01:710 notice Change-Id: I8ed932a0d6f5e6ce29ab6428f0f01221d0a6ae34 Signed-off-by: Paul Vinciguerra <pvinci@vinciconsulting.com>
2019-05-07bihash: Freeing up working_copy_lengths vectorVijayabhaskar Katamreddy1-1/+2
1)Freeing up working_copy_lengths vector 2)Passing vebososity level to fmt_fn Change-Id: I5e3f541e2f8cc0150105cc35835366f84937bb2e Signed-off-by: Vijayabhaskar Katamreddy <vkatamre@cisco.com>
2019-05-07Improve lcov reported code coverage statsDave Barach1-3/+0
Remove unused code from the vppinfra build Add a bihash test case Change-Id: Ia930309efa28620dd1c0d69aaec432e2d8bd962c Signed-off-by: Dave Barach <dave@barachs.net>
2019-05-07Add bihash statistics hookDave Barach10-5/+197
Example / unit-test in .../src/plugins/unittest/bihash_test.c Change-Id: I23fd0ba742d65291667a755965aee1a3d3477ca2 Signed-off-by: Dave Barach <dave@barachs.net>
2019-05-01Enable NEON instructions in memcpy_leLijian.Zhang2-1/+9
Neon version of memcpy_le gives better performance compared with memmove on aarch64 Change-Id: I44b487bb0795a6e70dd1e55bdde4a077773ec859 Signed-off-by: Lijian Zhang <Lijian.Zhang@arm.com> Reviewed-by: Sirshak Das <sirdas@arm.com>
2019-04-30elf: fix memcmp() overflowBenoît Ganne1-1/+1
name can be (and will be) smaller than section_name_start. Both name and section_name_start are NULL-terminated so we can use strcmp. Change-Id: Iec414810109f9267de20c25c0fe601df35daf89e Signed-off-by: Benoît Ganne <bganne@cisco.com>
2019-04-30vppinfra: fix buffer overflow in unformat_tokenBenoît Ganne1-2/+8
Change-Id: Ia60e4092c45c192002de064c362a9265bc9baeec Signed-off-by: Benoît Ganne <bganne@cisco.com>
2019-04-26svm: fifo segment support for chunk allocationFlorin Coras1-2/+2
Change-Id: Ie96706b4d8bcb32d2d5f065bc765f95f4e9369e7 Signed-off-by: Florin Coras <fcoras@cisco.com>
2019-04-24svm: fifo ooo reads/writes with multiple chunksFlorin Coras2-21/+21
Change-Id: If23a04623a7138c9f6c98ee9ecfa587396618a60 Signed-off-by: Florin Coras <fcoras@cisco.com>
2019-04-23vppinfra: fix one macro issue in clib_cpu_supports_aes()Zhiyong Yang1-1/+1
The macro for x86 platform is wrong, and the patch fixes it. Change-Id: I4f0ed254b177d6863fbe9113308c6a8b4478e0b2 Signed-off-by: Zhiyong Yang <zhiyong.yang@intel.com>
2019-04-19rbtree: add successor and predecessor functionsFlorin Coras2-0/+36
Change-Id: I6934beaf5c08bae2d4f0bd3a6bb811810407c1f9 Signed-off-by: Florin Coras <fcoras@cisco.com>
2019-04-17Use template-specific key compare fn when deleting recordsDave Barach1-2/+2
A simple memcmp won't work when comparing pointer-keys, such as those used by the bihash_vec8_8.h template. Change-Id: I77e59f3fd7f7740ef42908ace90ed4843e1c9ac7 Signed-off-by: Dave Barach <dave@barachs.net>
2019-04-17vppinfra: AVX512 interelaave, insert and permuteDamjan Marion1-0/+27
Change-Id: I26c704ec27b8f5431faef08156778f53ea454269 Signed-off-by: Damjan Marion <damarion@cisco.com>
2019-04-16vppinfra: more AVX2 and AVX512 inlinesDamjan Marion2-0/+72
Change-Id: I81bd967a580ae3b476dfd731e9933a9898568a91 Signed-off-by: Damjan Marion <damarion@cisco.com>
2019-04-16dlmalloc: honor 8 byte alignment requestsFlorin Coras1-1/+1
Change-Id: Ie504603c2e42cae3ad592952b2b166919420e5f7 Signed-off-by: Florin Coras <fcoras@cisco.com>
2019-04-16svm_fifo rework to avoid contention on cursizeSirshak Das1-0/+3
Problems Addressed: - Contention of cursize by producer and consumer. - Reduce the no of modulo operations. Changes: - Synchronization between producer and consumer changed from cursize to head and tail indexes Implications: reduces the usable size of fifo by 1. - Using weaker memory ordering C++11 atomics to access head and tail based on producer and consumer role. - Head and tail indexes are unsigned 32 bit integers. Additions and subtraction on them are implicit 32 bit Modulo operation. - Adding weaker memory ordering variants of max_enq, max_deq, is_empty and is_full Using them appropriately in all places. Perfomance improvement (iperf3 via Hoststack): iperf3 Server: Marvell ThunderX2(AArch64) - iperf3 Client: Skylake(x86) ~6%(256 rxd/txd) - ~11%(2048 rxd/txd) Change-Id: I1d484e000e437430fdd5a819657d1c6b62443018 Signed-off-by: Sirshak Das <sirshak.das@arm.com> Reviewed-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
2019-04-16vppinfra: add basic rbtreeFlorin Coras3-0/+497
Algorithm from CLRS, Introduction to Algorithms 3rd Edition, Ch. 13 Change-Id: I5bc2c507593770939cd5584f21dacf36ebd2b4c1 Signed-off-by: Florin Coras <fcoras@cisco.com>
2019-04-15vppinfra: add SHA-2 family of hash algorithms (including HMAC)Damjan Marion3-0/+647
Change-Id: I54d6fb1a2721b548620eb66cea254d0103deca32 Signed-off-by: Damjan Marion <damarion@cisco.com>
2019-04-12vppinfra: AVX-512 transpose (u32x16 and u64x8)Damjan Marion1-0/+126
Change-Id: Iefe9d20799a6f5f271aa5b675ea2b19ac3efbe1e Signed-off-by: Damjan Marion <damarion@cisco.com>
2019-04-11vppinfra: fix the issue that mheap_get_trace record wrong pointerWei CHEN1-1/+1
when mspace_get_aligned try to malloc a chunk with align greater than 16 Change-Id: Ic3b91fc9532248482662f019bbfa073da18645ed Signed-off-by: Wei CHEN <weichen@astri.org>
2019-04-08host stack: update stale copyrightFlorin Coras2-2/+2
Change-Id: I33cd6e44d126c73c1f4c16b2041ea607b4d7f39f Signed-off-by: Florin Coras <fcoras@cisco.com>
2019-04-08vppinfra: u32x8 transposeDamjan Marion1-0/+56
Change-Id: I7d39cb184f1f9ad24276183c29969327681a1f82 Signed-off-by: Damjan Marion <damarion@cisco.com>
2019-04-06Doxygen: clean up vec.hDave Wallace1-8/+4
Change-Id: I2294982e6df41a13e61783e18f947da0bdd4b499 Signed-off-by: Dave Wallace <dwallacelf@gmail.com>
2019-04-02vppinfra: add u32x4 min / max sse4.2 inlinesDamjan Marion1-24/+49
Change-Id: I38e0be777199654ece286fdd1a42931ed99bbe8a Signed-off-by: Damjan Marion <damarion@cisco.com>
2019-04-02vppinfra: fix sparse_vec_index() returning non-zero index for some ↵Andrew Yourtchenko1-0/+4
nonexistent elements If we are testing for an index whose membership bitmask happens to sit in LSB of uword, and there is nothing else set in that uword in the member bitmask, the shortcut path returning the valid index is taken even if the element with a given index doesn't exist in the sparse vector. This happens because the count of leading zeroes on the value of 0 is zero, which is equal to the value taken modulo bitsize uword. Take care of that case. Also add unittests showing the problem and verifying that sparse_vec_index2 does not have the same issue. Change-Id: I19117e13817c3e5de579b9250bb741de42491985 Signed-off-by: Andrew Yourtchenko <ayourtch@gmail.com>
2019-03-30VPP-1576: fix a class of spurious warningsDave Barach1-0/+5
Change-Id: I52198e97397bb6f3b5c0c30c44aac34c17650d4d Signed-off-by: Dave Barach <dave@barachs.net>
2019-03-30vppinfra: add few more cpuid flagsDamjan Marion1-0/+7
Change-Id: Ic2a61c45face18b6dd23d5509d75367d3b2441e9 Signed-off-by: Damjan Marion <damarion@cisco.com>
2019-03-29Convince Coverity that s = format (0, ...) is OKDave Barach1-0/+4
Change-Id: Ia88c7228a46e251b8a7815240da6ddbbcde08bc7 Signed-off-by: Dave Barach <dave@barachs.net>