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2020-08-18vppinfra: fix format_c_identifier vector overflowBenoît Ganne1-1/+1
In case of vector, we must check length before trying to access element. Also fix wrong DPDK plugin workaround. Type: fix Change-Id: I2ecef1c88ebef2362f48cab0d462699aa43cd4b9 Signed-off-by: Benoît Ganne <bganne@cisco.com> (cherry picked from commit 1bd6f61820c6c15534ebb04a4b070ba84bf08a9d)
2020-08-18vppinfra: enable STATIC_ASSERT with clangBenoît Ganne2-6/+3
For some reason clang does not support &((struct foo*)0)->field in static assertion contrary to gcc. Use offsetof() macro implementation provided by both compilers instead. Type: fix Change-Id: I3311cdd29c5861e45dc0ef92f2bbd66242ca73b8 Signed-off-by: Benoît Ganne <bganne@cisco.com> (cherry picked from commit 5e60c17f49082b7731778e81b58177177a31b58f)
2020-08-18tcp: avoid rcv wnd more than RX fifo can enqueueRyujiro Shibuya1-0/+6
Type: fix Signed-off-by: Ryujiro Shibuya <ryujiro.shibuya@owmobility.com> Signed-off-by: Florin Coras <fcoras@cisco.com> Change-Id: Ie358b731f8ecb1fcaebd6e79f5ce5c10802c2814 (cherry picked from commit cc1085647b2ae36e6c086d65b4e81b9f1cf9fc9a)
2020-08-18vppinfra: fix u32x4_gather definitionDamjan Marion1-1/+1
Type: fix Change-Id: I3df8d3f277bfadee95bfc329e8ce8b929a986af6 Signed-off-by: Damjan Marion <damarion@cisco.com> (cherry picked from commit 97b9e008b9e072120ea8b0d98e81e898c3adbd4d)
2020-08-18vppinfra: set explicit found in search_free_list loopSteven Luong1-2/+6
While https://gerrit.fd.io/r/c/vpp/+/26948 fixed avoid using -1 to index into h->free_lists[b][l] by changing the loop counter, the check for the value of the loop counter (l < 0) cannot be trusted to decide whether we've found a large enough object within the bin or not. When the loop is terminated, the value of the variable l could be ambiguous if it equals to 0 and it is never less than 0, ie, when we bail out of the loop, we don't know if it was due to the breaking out of the condition in if ((s = f_size - size) >= 0) break; or while (l > 0); The fix is to explicitly set a variable when we have found a large enough object inside the loop to be used to test whether the loop was prematurely terminated (found == 1) or the loop just ran exhausted (found == 0) Type: fix Signed-off-by: Steven Luong <sluong@cisco.com> Change-Id: I0161813fbd44dcba8982a767eac2e0930e9d77e3 (cherry picked from commit a5436ae2516edc955f26c6aa4103f5946ee8653c)
2020-08-18vppinfra: loop counter off by 1 in search_free_list()Steven Luong1-1/+1
In search_free_list(), we have this do while loop. do { l--; f_index = h->free_lists[b][l]; f = elt_at (h, f_index); f_size = heap_elt_size (v, f); if ((s = f_size - size) >= 0) break; } while (l >= 0); When (l == 0), we still go back up to execute l--. Then l become -1. The next statement is we index h->free_lists[b][-1]. After that, elt_at() would probably cause a crash in the ASSERT. Type: fix Ticket: VPPSUPP-63 Signed-off-by: Steven Luong <sluong@cisco.com> Change-Id: I617d122aa221cfdfe38f8be50f4e0f0e76e11bb5 (cherry picked from commit ec7012e51edef4aec2239cb5b3a249f46d9b2cb0)
2020-08-16vppinfra: harmonize function namesDave Barach3-16/+16
Type: fix Signed-off-by: Dave Barach <dave@barachs.net> Change-Id: Icce7eab4510785e15bdcf97e4d1881b0f46f6899 (cherry picked from commit d4a639bbd2257a88fa3f06939a23c13af1d56dd3)
2020-08-13vppinfra: selectively disable false-positive GCC-10 warningsBenoît Ganne3-0/+24
GCC-10 increase overflows-related warnings but is confused by SIMD operations. Type: fix Change-Id: Iafde754c2fbec60e2d0a328f295b1f5c156d8234 Signed-off-by: Benoît Ganne <bganne@cisco.com> (cherry picked from commit a66971f980187efd03a84d340b80a7d3cf39deac)
2020-08-13vppinfra: selectively disable false-positive GCC-10 warningsBenoît Ganne1-0/+9
GCC-10 increase overflows-related warnings but failed to infer that b->n_cached_bytes is always < sizeof(uword). Type: fix Change-Id: I956ae609abc9e39d4a932e5801510999d7d27b79 Signed-off-by: Benoît Ganne <bganne@cisco.com> (cherry picked from commit ffbcf6178891bd68a97543ac91d28f37256d5e13)
2020-08-13build: add vppinfra/warnings.h to exported headers listBenoît Ganne1-0/+1
To allow the use of WARN_ON/OFF macros to selectively disable build warnings. Type: fix Change-Id: Iceb9d28b2b80c373afb51900880c23041be836db Signed-off-by: Benoît Ganne <bganne@cisco.com> (cherry picked from commit be7dbbbfdd49fcfff851f38d1d36d08fc9710604)
2020-08-13vppinfra: finish deprecating qsort.cDave Barach2-272/+7
Minor change to vec_sort_with_function(...): don't depend on the qsort implementation to deal with null, zero-long, or 1-long vectors Type: fix Signed-off-by: Dave Barach <dave@barachs.net> Change-Id: I7bd7b0421673d2a025363089562aa7c6266fba66 (cherry picked from commit f593b5792031b3797cdcdfd3fbb33ac4de8c9a5d)
2020-08-12misc: fix coverity warningsDave Barach1-0/+29
Add an ALWAYS_ASSERT (...) macro, to (a) shut up coverity, and (b) check the indicated condition in production images. As in: p = hash_get(...); ALWAYS_ASSERT(p) /* was ASSERT(p) */ elt = pool_elt_at_index(pool, p[0]); This may not be the best way to handle a specific case, but failure to check return values at all followed by e.g. a pointer dereference isn't ok. Type: fix Ticket: VPP-1837 Signed-off-by: Dave Barach <dave@barachs.net> Change-Id: Ia97c641cefcfb7ea7d77ea5a55ed4afea0345acb (cherry picked from commit 47d41ad62c5d6008e72d2e9c137cf8f49ca86353)
2020-08-12vppinfra: remove unused variable from timing wheelKlement Sekera1-3/+0
Type: fix Change-Id: I77b03efcac04cc46550d03657464ab8de5d7da78 Signed-off-by: Klement Sekera <ksekera@cisco.com> (cherry picked from commit 90d28846f963a86d760b4a6b83aed62b862f1c61)
2020-08-12vppinfra: fixing compilation issues in 32-bitVijayabhaskar Katamreddy1-2/+3
Fixing compilation issuues for 32-bit also setting init flag for shm based bihash Type: fix Signed-off-by: Vijayabhaskar Katamreddy <vkatamre@cisco.com> Change-Id: Ic2072c5ba7fc77d061ca9f1b844a71f6e22e58b2 (cherry picked from commit f0bae64f6fd4c410c19f6ece688443f389932688)
2020-08-12vppinfra: retry socket connect on EAGAINFlorin Coras1-4/+6
Type: fix Signed-off-by: Florin Coras <fcoras@cisco.com> Change-Id: I93577acf559a8fa639aab7ec3f7cdbe7df9a248d (cherry picked from commit 42ddf69ed0560cff70a2f3fafc732fc5a33255c0)
2020-08-12pg: don't leak open files in packet-generatorChristian E. Hopps1-0/+1
Fix pg code to close it's open file descriptors before zero'ing the pcap_main structure for re-use. Ticket: VPP-1780 Type: fix Signed-off-by: Christian E. Hopps <chopps@chopps.org> Change-Id: I32945c6476ae83b8d210ee67ac78db3e8f786f46 (cherry picked from commit 19871f25394fa9a4bfb55006092cbcc28b446c04)
2020-08-12vppinfra: fix cpu flag string overflowBenoît Ganne1-7/+5
Type: fix Change-Id: Idb1fff8a172034044bb33d5b271a84d1fd672ef5 Signed-off-by: Benoît Ganne <bganne@cisco.com> (cherry picked from commit a7cb357491bc8adeac23a329685e8ea9aa2d2f33)
2020-08-12vppinfra: fix coverity issue 205691 in pmallocAndrew Yourtchenko1-0/+1
set the address to MMAP_FAILED if mmap has failed, so that we do not attempt to free it in the error handling path. Change-Id: I6e6b51a365fb68086dc20aa40a676a36af59a3ba Type: fix Signed-off-by: Andrew Yourtchenko <ayourtch@gmail.com> (cherry picked from commit 9ce35233658d6c19a4458ec7e728b6ee75fd3ace)
2020-06-11vppinfra: refactor mpcap.hDave Barach1-88/+4
vppinfra source files MUST NOT #include <vlib/vlib.h>, <vnet/vnet.h> or similar. Move mpcap_add_packet(...), mpcap_add_buffer(...) to a new file: src/vnet/mpcap.h. Type: refactor Signed-off-by: Dave Barach <dave@barachs.net> Change-Id: Id517aef6fe49b618f853ce32940b91ba45a1e60d (cherry picked from commit 2a41919e39d4672f76a654f30be9c2093cef4fad)
2020-03-30vppinfra: fix typo in dlmalloc.cDave Barach1-1/+1
Type: fix Signed-off-by: Dave Barach <dave@barachs.net> Change-Id: Idc567717494b4c40c307f20a40d5e10cd26b0a46 (cherry picked from commit 6e6968f06435727e6887abef4669715c9e59de6b)
2020-03-30vppinfra: correct fixed pool header size calculationDave Barach1-3/+1
Remove duplicate space allocation for the pool header. Not significant w/ CLIB_CACHE_LINE_BYTES >= 64 since the code rounds the size of the pool header to an even multiple of the cache line size. Type: fix Signed-off-by: Dave Barach <dave@barachs.net> Change-Id: I923f2a60e7565cf2dfbc18d78264bf82ff30c926 (cherry picked from commit 6e495ce428e110665ee9616e0951015963502cac)
2020-03-27vppinfra: manual cherrypick timebase fixesDave Barach3-56/+150
Gerrit Headline ------ -------- 25729 fix corner cases in tw_timer_expire 25763 improve timebase resilience 25837 remove time jump workaround Automatic cherry-picking failed miserably. Type: fix Ticket: VPP-1852 Signed-off-by: Dave Barach <dave@barachs.net> Change-Id: I460effb2b5f4f19ae4548ef01ca3726b7412bd7f
2020-02-06vppinfra: fix typo in tw_timer_template.cDave Barach1-1/+1
Fix minor memory leak Type: fix Ticket: VPP-1833 Fixes: 4af9ba1dab Signed-off-by: Dave Barach <dave@barachs.net> Change-Id: Id10fba70471ca78f73f14146054f6b12c5d4431f
2020-02-06vppinfra: preserve total_cpu_time across clock freq adjustmentDave Barach2-4/+17
If clib_time_verify_frequency() adjusts the clock frequency, transform total_cpu_time to the new time coordinate space. Otherwise, we break comparisons with previous clib_time_now() value. Without this correction, time jumps in one direction or the other depending on the sign of the frequency change. Reasonably harmless in most cases, but under perfect storm conditions the wheels fall off. Type: fix Signed-off-by: Dave Barach <dave@barachs.net> Change-Id: I21802c2630e2c87ff817cd732b7d78bc022cd2d7 (cherry picked from commit e52d8d880ac644f07154bc2fb94035a198ed6688)
2020-02-06pmalloc: always lock pagesDamjan Marion1-25/+11
Type: feature Change-Id: I5bbf37969c9c51e40a013d1fc3ab966838eeb80d Signed-off-by: Damjan Marion <damarion@cisco.com> (cherry picked from commit 801c7016ad90e5f5618f523b3f9284daee0b696c)
2019-11-28session tcp: refactor pacer timeFlorin Coras1-0/+7
Type: refactor Change-Id: Ic1c3e1f7987702cd88972acc34849dc1f585d5fe Signed-off-by: Florin Coras <fcoras@cisco.com> (cherry picked from commit a8e71c8981f039588a7ca94e6ab66b4ebac784a5)
2019-10-31vppinfra: make coverity happy with vec_set_lenBenoît Ganne1-1/+6
Coverity gets confused by ASSERT((l) <= vec_max_len(v)) when l is 0. Type: fix Change-Id: I247d7015b148233d8f195bcf41e9a047b7a21309 Signed-off-by: Benoît Ganne <bganne@cisco.com> (cherry picked from commit 70d5d4fa09520bd5825b49960ae896beca3535e8)
2019-10-31vppinfra: add clib_mem_free_sBenoît Ganne1-0/+8
IPsec zero-es all allocated key memory including memory sur-allocated by the allocator. Move it to its own function in clib mem infra to make it easier to instrument. Type: refactor Change-Id: Icd1c44d18b741e723864abce75ac93e2eff74b61 Signed-off-by: Benoît Ganne <bganne@cisco.com> (cherry picked from commit 78af0a8c5ff1a33ff8dccb1b2ea6ffadb8ef7b62)
2019-10-29vppinfra: add vec_set_len()Benoît Ganne1-6/+13
l2-flood and bier nodes reset vector length without updating it to its effective size. Introduce a helper to do it (this allows ASAN to keep track of the new vector size). Type: refactor Change-Id: I2d652550c440f0553a2b49c3ee3d37b49ebc16c3 Signed-off-by: Benoît Ganne <bganne@cisco.com> (cherry picked from commit 8a4bfdae87286ed281df855c58b669eb6b76aaf8)
2019-10-23vppinfra: fix page boundary crossing bug in hash_memory64Dave Barach1-4/+47
Fix a day-1 bug, possibly dating back as far as 2002. The zap64() game involves fetching 8 byte chunks, and clearing octets not to be included in the key. That's fine *unless* the 8-byte fetch happens to cross a page boundary into unmapped or no-access space. Type: fix Signed-off-by: Dave Barach <dave@barachs.net> Change-Id: I4607e9840032257c96ba7387f86c931c0921749d (cherry picked from commit 7e2cea3d26701ff1d80fda7d8ca907890e3e7baa)
2019-10-16vppinfra: create unformat function for data size parsingMathiasRaoul2-0/+26
Type: feature Signed-off-by: MathiasRaoul <mathias.raoul@gmail.com> Change-Id: I8d71078a9ed42326e19453ea10008c6bb6992c52 (cherry picked from commit 579b165069e7c14392cded3a76e5cc1964ad13a9)
2019-10-11vppinfra: implement CLIB_PAUSE () for aarch64 platformsjaszha031-0/+2
Define CLIB_PAUSE () to generate the "yield" instruction. No significant performance changes were observed for clib_spinlock_t and clib_rwlock_t. Type: feature Change-Id: I59eb996e61c7a16007517e57e6996567302c1657 Signed-off-by: Jason Zhang <jason.zhang2@arm.com> Reviewed-by: Lijian Zhang <Lijian.Zhang@arm.com> (cherry picked from commit 18512b002da5da312aa2638b67a8ec4bb2c10236)
2019-10-03classify: use vector code even when data is not alignedDamjan Marion1-0/+2
Type: feature Change-Id: I8f5f4841965beb13ebc8c2a37ce0dc331c920109 Signed-off-by: Damjan Marion <damarion@cisco.com> (cherry picked from commit 8304933922620cef005b788a36a4d3f2eab45bb5)
2019-09-25interface: fix pcap_write functionAndrew Yourtchenko1-3/+0
when use pcap cli to capture pcakets into two files rx01.pcap && rx02.pcap, the first time: 1)pcap rx trace on max 100 intfc any file rx01.pcap 2)......the process of capture data to buffer...... 3)pcap rx trace off the second time: 4)pcap rx trace on max 100 intfc any file rx02.pcap 5)......the process of capture data to buffer...... 6)pcap rx trace off the pcap_write function bug in this two lines pm->n_packets_captured = 0; if (pm->n_packets_captured >= pm->n_packets_to_capture) referring to calling pcap_close() will result in that the twice pcap cli both writes the packets into rx01.pcap, but nothing into rx02.pcap. Beside, the rx02.pcap file will not be created. solution: separate the pcap_close() out of pcap_write() The automatic cherrypick did not work, so the manual cherrypick of commit 9af7e2e87e6a11fb69309fc9ce4432acbc4e3 was performed as follows: 0) git checkout stable/1908 1) git checkout -b stable-1908-history-rewrite 2) git rebase -i d1e17d00bb81659bf9e45caa62482bf7029d98f7~1 3) in the editor, mark the second commit as "edit", search for the following commits and edit as in the snippet below: edit 30d28bdfd api: enforce vla is last and fixed string type drop 4c19bfd93 vlib: clean up the "pcap dispatch trace" debug CLI pick 4aef0dd82 dpdk: fix extended stats edit 1dafb7fd8 dpdk: initialize rte_mbuf during mempool dequeue drop 4b943d632 misc: clean up "pcap [rx|tx] trace" debug CLI 4) close the editor 5) git cherry-pick 9af7e2e87e6a11fb69309fc9ce4bf8432acbc4e3 (it applies cleanly) 6) git rebase --continue (rebase of a 1000+ patches) 7) at prompt - git cherry-pick -x e5948fb49a6eeaf437323cc1043a350cd33bcd47 8) git rebase --continue 9) at prompt - git cherry-pick -x b97641c79f4aaf0069268c550f263167ddea2b34 10) git rebase --continue 11) the rebase finished. 12) git checkout stable/1908 13) git diff stable/1908..stable-1908-history-rewrite | patch -p1 14) discard the whitespace-only hunk 15) git commit -a -s; edit this commit message Type: fix Change-Id: Iedeb46f9cf0a4cb12449fd75a4014f95f3bb3fa8 Signed-off-by: Jack Xu <jack.c.xu@ericsson.com> Signed-off-by: Andrew Yourtchenko <ayourtch@gmail.com>
2019-09-21vppinfra: Update "show cpu" output for AArch64 chipsNitin Saxena1-15/+18
- Allow "Microarch model(family)" row to show PASS revison as either string (like A0, B0) or number (like 1.0, 2.0). - Fix part number for Marvell CN96XX Type: refactor Change-Id: Ie01a3960c4e5e481be354dc8bb60f744e5c65737 Signed-off-by: Nitin Saxena <nsaxena@marvell.com> (cherry picked from commit c9122f97398b11f8be0256901a0cbd83dc3b6511)
2019-09-09dpdk: initialize rte_mbuf during mempool dequeueDamjan Marion1-0/+3
In some cases it may happen that buffer is allocated by DPDK, and freed by VPP native code. In such cases dpdk metadata is not reset, so we need to do that during mempool dequeue. Template approach is taken to reduce cost of that operation. Type: fix Fixes: 910d369 Change-Id: Ic239007cfc8fbceb965021c56963cda9d53f63be Signed-off-by: Damjan Marion <damarion@cisco.com>
2019-09-09vlib: clean up the "pcap dispatch trace" debug CLIDave Barach1-0/+3
Separate debug CLI arg parsing from the underlying action function. Fixes a number of subtle ordering dependencies, and will allow us to add a binary API to control the feature at some point in the future. Type: refactor Ticket: VPP-1762 Signed-off-by: Dave Barach <dave@barachs.net> Change-Id: I1240fe3f61a0acf5ee9faed60d6ad3386e72e569 (cherry picked from commit e5948fb49a6eeaf437323cc1043a350cd33bcd47)
2019-09-03vppinfra: add bihash_init2Dave Barach2-20/+53
Add controls to list / not list a specific bihash in clib_all_bihashes, to immediately initialize a bihash. clib_bihash_init2 is now the primary API. It takes a typical args_t structure. clib_bihash_init becomes a compatibility widget. It fabricates an args_t and calls init2... Type: refactor Ticket: VPP-1758 Signed-off-by: Dave Barach <dave@barachs.net> Change-Id: Ib3e1304884997cf7025af20bdc67a7dda290f15b (cherry picked from commit bdf9b97774f02458ede6b7c7ae2d5728bddba000)
2019-08-02vppinfra: Expose function setting __os_thread_indexNathan Skrzypczak2-0/+27
Type: feature This is needed when creating pthreads in client applications, they need a way to set __os_thread_index per thread that does not conflict with the binary API thread index. If __os_thread_index is left to 0 in two client pthreads and they call vl_msg_api_alloc and vec_resize at the same time it can fail due to them sharing (and push/poping) the same clib_per_cpu_mheaps slot. Change-Id: I85d4248a39b641a4d3ad5a1c1bd6e0db5875fab6 Signed-off-by: Nathan Skrzypczak <nathan.skrzypczak@gmail.com>
2019-08-01interface: fix pcap tx/rx trace cli handlingJohn Lo1-0/+2
Provide default packet_to_capture value. Display interface name correctly for "pcap tx/rx trace status". Type: fix Signed-off-by: John Lo <loj@cisco.com> Change-Id: I7064d0dbea236a9aff68bba7fbaf2c4a73b16c6f Signed-off-by: John Lo <loj@cisco.com>
2019-08-01vppinfra: fix spinlock and rwlock testsFlorin Coras3-15/+15
Type: fix Change-Id: I67b72b5ad03b972198c27bc0d927867f41b0e20b Signed-off-by: Florin Coras <fcoras@cisco.com>
2019-08-01vppinfra: refactor clib_rwlock_t to use single condition variablejaszha031-24/+19
Previous implementation of clib_rwlock_t used two spinlocks: one writer lock, and one to guard the counter for the number of readers. This implementation uses a single condition variable rw_cnt which has the following properties: if a writer has the rwlock, rw_cnt = -1 if the rwlock is free, rw_cnt = 0 otherwise, rw_cnt > 0 and rw_cnt = number of readers rw_cnt will never be less than -1 Benchmarking: The results below are the cycle counts from test_rwlock.c, configured so that for 10000 iterations, 6 reader and 6 writer threads on separate cores are spawned such that each writer thread increments a global counter 10000 times in each iteration. For Taishan, 4 reader and 4 writer threads are spawned in each test. x86 Xeon old rwlock: 12.473e8, 11.655e8, 13.201e8, 11.347e8, 13.182e8 x86 Xeon new rwlock: 5.881e8, 5.796e8, 6.536e8, 5.540e8, 5.890e8 Aarch64 ThX2* old rwlock: 9.263e7, 8.933e7, 9.074e7, 8.979e7, 9.378e7 Aarch64 ThX2* new rwlock: 7.221e7, 8.107e7, 7.515e7, 7.672e7, 7.386e7 A72 old rwlock: 3.268e6, 3.200e6, 3.086e6, 3.176e6, 3.170e6 A72 new rwlock: 1.261e6, 1.288e6, 1.251e6, 1.229e6, 1.234e6 *ThunderX2 used additional gcc options "-march=armv8.1-a+crc+crypto+lse" Type: refactor Change-Id: I7c347d3037b36205ab532cbcb52a374c846eb275 Signed-off-by: Jason Zhang <jason.zhang2@arm.com> Reviewed-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com> Reviewed-by: Lijian Zhang <Lijian.Zhang@arm.com>
2019-08-01vppinfra: remove unused historical codeDave Barach3-375/+0
"timer.[ch]" used a signal handler to deliver timer callbacks. Without indulging in a set of sigprocmask(...) system calls, it would be unsafe to use the mechanism. Rather than wait for another developer to accidentally open this particular can of worms, best to remove the code. It's nothing more than an attractive nuisance at this point. Type: refactor Signed-off-by: Dave Barach <dave@barachs.net> Change-Id: Ia3e7b00a389c302b466605dff0c1bf3566b8dbbd
2019-08-01vppinfra: make first bihash add thread-safeDave Barach2-7/+25
Type: fix Signed-off-by: Dave Barach <dave@barachs.net> Change-Id: Ie37ff66faba79e3b8f46c7a704137f9ef2acc773
2019-08-01vppinfra: refactor clib_spinlock_t to use compare and swapjaszha032-2/+13
Tested performance of a CAS implementation (using __atomic_compare_exchange) against a TAS implementation (using __atomic_exchange) using test_spinlock.c and found some performance improvement. Generated assembly for CAS and TAS implementations show that TAS always executes with a load-store dependency, but CAS moves a branch condition between the load and store so that only a load occurs when the lock is free. Benchmarking: The results below are the cycle counts from test_spinlock.c, configured so that for 10000 iterations, 12 threads on separate cores are spawned, each of which increments a global counter 10000 times in each iteration. For A72, 8 threads are spawned in each test. x86 Xeon TAS: 7.333e8, 7.605e8, 7.535e8, 7.485e8, 7.321e8 x86 Xeon CAS: 5.842e8, 5.433e8, 5.389e8, 5.983e8, 5.552e8 Aarch64 ThX2* TAS: 9.852e7, 10.209e7, 9.190e7, 9.600e7, 9.224e7 Aarch64 ThX2* CAS: 7.640e7, 7.486e7, 7.425e7, 7.269e7, 7.534e7 A72 TAS: 7.289e6, 6.963e6, 7.208e6, 6.976e6, 7.200e6 A72 CAS: 1.695e6, 1.608e6, 1.600e6, 1.634e6, 1.746e6 *ThunderX2 used additional gcc options "-march=armv8.1-a+crc+crypto+lse" Type: refactor Change-Id: Ic5cd97991804f6b012707fad1a5d1a6edb96cd3d Signed-off-by: Jason Zhang <jason.zhang2@arm.com> Reviewed-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com> Reviewed-by: Lijian Zhang <Lijian.Zhang@arm.com>
2019-07-31vppinfra: added performance test for clib_rwlock_t (test_rwlock.c)jaszha032-0/+265
Spawns a uniform number of writer and reader threads across a number of cores where each writer thread increments a global variable a specified number of times, and the reader threads continually poll the global's value until the writers complete. Type: test Change-Id: I979c3734c6d03139d0802bff1846875d226f6fbb Signed-off-by: Jason Zhang <jason.zhang2@arm.com> Reviewed-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com> Reviewed-by: Lijian Zhang <Lijian.Zhang@arm.com>
2019-07-31vppinfra: refactor test_and_set spinlocks to use clib_spinlock_tjaszha031-0/+3
Spinlock performance improved when implemented with compare_and_exchange instead of test_and_set. All instances of test_and_set locks were refactored to use clib_spinlock_t when possible. Some locks e.g. ssvm synchronize between processes rather than threads, so they cannot directly use clib_spinlock_t. Type: refactor Change-Id: Ia16b5d4cd49209b2b57b8df6c94615c28b11bb60 Signed-off-by: Jason Zhang <jason.zhang2@arm.com> Reviewed-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com> Reviewed-by: Lijian Zhang <Lijian.Zhang@arm.com>
2019-07-31vppinfra: added lock performance test for clib_spinlock_t (test_spinlock.c)jaszha032-0/+207
Spawns a uniform number of threads across a number of cores where each thread increments a global variable a specified number of times. Type: test Change-Id: I12b3a37708a199c297d022348d99dbb0e8349a9f Signed-off-by: Jason Zhang <jason.zhang2@arm.com> Reviewed-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com> Reviewed-by: Lijian Zhang <Lijian.Zhang@arm.com>
2019-07-30vppinfra: refactor use of CLIB_MEMORY_BARRIER ()jaszha033-17/+8
All instances of test_and_set locks used the following sequence to release the locks: CLIB_MEMORY_BARRIER (); p->lock = 0; // p is a generic struct with a TAS lock Use clib_atomic_release to generate more efficient assembly code. Type: refactor Change-Id: Idca3a38b1cf43578108bdd1afe83b6ebc17a4c68 Signed-off-by: Jason Zhang <jason.zhang2@arm.com> Reviewed-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com> Reviewed-by: Lijian Zhang <Lijian.Zhang@arm.com>
2019-07-30vppinfra: conformed spinlocks to use CLIB_PAUSEjaszha032-2/+4
Modified test-and-set spin locks to call CLIB_PAUSE () when spinning for code consistency. Decreases the memory bandwidth consumed. Type: fix Change-Id: I1cca4f87f44f23f257c7a35466cd2e7767072f51 Signed-off-by: Jason Zhang <jason.zhang2@arm.com> Reviewed-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com> Reviewed-by: Lijian Zhang <Lijian.Zhang@arm.com>