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mmap does not fail but writing to mapped memory is causing sigbus.
Change-Id: I5135f32eede67fccb4aaa07a501cd262d254ed8d
Signed-off-by: Artem Belov <artem.belov@xored.com>
Signed-off-by: Ed Warnicke <hagbard@gmail.com>
(cherry picked from commit f6defa113e2e10a70c5a92ce7e14b7a532154409)
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Some x86 CPUs have IOMMU capable dealing only with 39-bit address space
This patch also adds option to specify physmem base address from
startup.conf
Change-Id: I9e8abd26efb60e9c4ad54c035fb1751a4a61f4dc
Signed-off-by: Damjan Marion <damarion@cisco.com>
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The 'example' keyword triggers the creation of very out-of-context
example in the "Examples" top level of documentation. Rename the
keyword in the comment so the comment is still readable, but
does not trigger the doxygen.
Change-Id: Iecbdc236918f9178a034817aa6cea7ab6b2c1654
Signed-off-by: Andrew Yourtchenko <ayourtch@gmail.com>
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Given n equals to the maximum number of bytes to copy from src in the API,
or the rough estimate strlen of src, strncpy_s_inline should not copy more
than the number of bytes, computed by strlen(src), to dst if n is greater than
strlen(src). The number of bytes to copy is computed by strnlen(src,n), not n.
Change-Id: I088b46125d9776962750e121f1fbf441952efc2b
Signed-off-by: Steven <sluong@cisco.com>
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Change-Id: Ia34a4278eedc8cf450688b1fa0291e1f976868d3
Signed-off-by: Dave Barach <dave@barachs.net>
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* u32/u64/uword mismatches
* pointer-to-int fixes
* printf formatting issues
* issues with incorrect "ULL" and related suffixes
* structure alignment and padding issues
Change-Id: I70b989007758755fe8211c074f651150680f60b4
Signed-off-by: David Johnson <davijoh3@cisco.com>
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Change-Id: I31a3ff9e8f70468196c091027592a3aed2d09ac3
Signed-off-by: Paul Vinciguerra <pvinci@vinciconsulting.com>
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With this simple tweak, vpp is OK for "make test" or non-dpdk driver
operation over a kernel which doesn't support hugepages at all.
Tested on a Raspberry-pi 3B+ running the Ubuntu 18.04 64-bit server
beta image. It's amazing that such a minimal system will not only
self-compile vpp, but also run the unit tests. It's slow, but what do
you expect for that amount of money?
Change-Id: I7f080f871c828cc4b44be13809495278fadbd717
Signed-off-by: Dave Barach <dave@barachs.net>
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Change-Id: I188e2dfd187d7b2ab7e0fbb11461f3db052f3224
Signed-off-by: Damjan Marion <damarion@cisco.com>
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Change-Id: I1f42644f143bb65ee764c0f869b402595126adac
Signed-off-by: Florin Coras <fcoras@cisco.com>
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Change-Id: If5c44241577bc5a42d33f1ec5a62097974d6fda8
Signed-off-by: Florin Coras <fcoras@cisco.com>
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Change-Id: I6da153779010263e6fc4b51c64b01444aaadca17
Signed-off-by: Dave Wallace <dwallacelf@gmail.com>
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Let m = user estimate of the (max) src string length, low = smaller
address of (src, dst), hi = larger address (src, dst).
if (low + (m - 1) >= hi), we have a *potential* overlapping copy which
is not allowed. Before we declare overlap - and return an error -
retry the check with m = actual src string length.
The resulting "test string" failure affected aarch64 (only) because of
differences in test code stack variable placement / alignment.
Change-Id: I2931d1ce2c61af3d3880075b033d2a4c4e421f09
Signed-off-by: Dave Barach <dave@barachs.net>
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Add memcmp_s, strcmp_s, strncmp_s, strcpy_s, strncpy_s, strcat_s, strncat_s,
strtok_s, strnlen_s, and strstr_s C11 safe string API. For migrating extant
unsafe API, add also the corresponding macro version of each safe API,
clib_memcmp, clib_strcmp, etc.
In general, the benefits of the safe string APIs are to provide null pointer
checks, add additional argument to specify the string length of the passed
string rather than relying on the null terminated character, and src/dest
overlap checking for the the string copy operations.
The macro version of the API takes the same number of arguments as the unsafe
API to provide easy migration. However, it does not usually provide the full
aformentioned benefits. In some cases, it is necessary to move to the safe
API rather than using the macro in order to avoid some unpredictable problems
such as accessing memory beyond what it is intended due to the lack of the
passed string length.
dbarach: add a "make test" vector, and a doxygen file header cookie.
Change-Id: I5cd79b8928dcf76a79bf3f0b8cbc1a8f24942f4c
Signed-off-by: Steven <sluong@cisco.com>
Signed-off-by: Dave Barach <dave@barachs.net>
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Change-Id: I5b4cd419d317381a06e7e6d703373959f4bbd97b
Signed-off-by: Damjan Marion <damarion@cisco.com>
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- intercept fork and register a new worker with vpp
- share sessions between parent and forked child
- keep binary api state per worker
Change-Id: Ib177517d661724fa042bd2d98d18e777056352a2
Signed-off-by: Florin Coras <fcoras@cisco.com>
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Change-Id: I192e340bd072d27bf6ddc382347ad5c3ca411bad
Signed-off-by: Florin Coras <fcoras@cisco.com>
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Improves TCP iperf3 performance by ~3% on AArch64.
Change-Id: I1e51bd8403ba45ec6af4c2f96b95e884c1ae0d67
Signed-off-by: Sirshak Das <sirshak.das@arm.com>
Reviewed-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
Reviewed-by: Ola Liljedahl <ola.liljedahl@arm.com>
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Change-Id: I5cb2619444507a159c42ac8401800e90b6541a20
Signed-off-by: Damjan Marion <damarion@cisco.com>
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Change-Id: I95ba4eab6e2154ef33a479450b997c8317db3a92
Signed-off-by: Kingwel Xie <kingwel.xie@ericsson.com>
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If the heap does not have enough space to satisfy allocation
request, the allocator calls sys_alloc(). There, if the request
is bigger than mparams.mmap_threshold, the mmap_alloc() is called
to allocate memory via a direct mmap call.
The resulting allocated memory is properly recognized by
clib_mem_is_heap_object() only for the first such request.
Subsequent requests overwrite the tracking data, resulting
in previously "valid" addresses become invalid, as seen
by clib_mem_is_heap_object(). The result is a misleading
behavior which masks other issues.
This is a temporary change to avoid the affected codepath
until there is a proper fix to track the directly mmap-allocated
memory.
Change-Id: I4137f91b5196d4503c40cf8ecc2f71554bc8f858
Signed-off-by: Andrew Yourtchenko <ayourtch@gmail.com>
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Change-Id: If6c65f16c6fba8beb90e189c1443c3d7d67ee02c
Signed-off-by: Damjan Marion <damarion@cisco.com>
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To facilitate dispatch trajectory tracing, vlib_buffer_t decoding, etc.
through Wireshark
Change-Id: I31356b9fa1f40cba8830aaf10a86a9fbb7546438
Signed-off-by: Dave Barach <dave@barachs.net>
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Change-Id: I441beaf3d7f57886580d7cce35ef592aa0fcca5f
Signed-off-by: Dave Barach <dave@barachs.net>
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Change-Id: Id4f37f5d4a03160572954a416efa1ef9b3d79ad1
Signed-off-by: Dave Barach <dave@barachs.net>
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when pagesize is 1G, this pm->base + (pp->index << pm->def_log2_page_sz) would very soon overrun if creating multiple mempools
add a (uword) to it
Change-Id: If769b99d344cc3f547418a242a7497d044071615
Signed-off-by: Kingwel Xie <kingwel.xie@ericsson.com>
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Compute the first power of ten which is greater than 0.1% of the clock
rate. Save the result, and use it to round future results. The
previous constant value - 1e7 - didn't work properly on aarch64.
Change-Id: Ic021e3eb1b90c0d4a7d9f1b6425123f0c8b48b0b
Signed-off-by: Dave Barach <dave@barachs.net>
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This patch adds support for mapping the virtual address to physical
address and size of memory allocated.
Change-Id: I7659a1881308e89b215c486fecd7c973076d0773
Signed-off-by: Mohsin Kazmi <sykazmi@cisco.com>
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Change-Id: I6782544d5ee0a66b1a027874b23574416093ca92
Signed-off-by: Damjan Marion <damarion@cisco.com>
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Optimize zero byte mask NEON functions below with less intrinsics,
and get their outputs consistent with functions in vector_sse42.h
always_inline u32 u64x2_zero_byte_mask (u64x2 input)
always_inline u32 u32x4_zero_byte_mask (u32x4 input)
always_inline u32 u16x8_zero_byte_mask (u16x8 input)
always_inline u32 u8x16_zero_byte_mask (u8x16 input)
always_inline u32 i64x2_zero_byte_mask (i64x2 input)
always_inline u32 i32x4_zero_byte_mask (i32x4 input)
always_inline u32 i16x8_zero_byte_mask (i16x8 input)
always_inline u32 i8x16_zero_byte_mask (i8x16 input)
Change-Id: I7f485915baeb37fa2dd484699b8769e0136f6574
Signed-off-by: Lijian Zhang <Lijian.Zhang@arm.com>
Reviewed-by: Sirshak Das <Sirshak.Das@arm.com>
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Add atomic swap and store macro with acquire and release ordering
respectively. Variable in question is interupt_pending variable which
is used as guard variable by input nodes to process the device queue.
Atomic Swap is used with Acquire ordering as writes or reads following
this in program order should not be reordered before the swap.
Atomic Store is used with Release ordering, as post store the node is
added to pending list.
Change-Id: I1be49e91a15c58d0bf21ff5ba1bd37d5d7d12f7a
Original-patch-by: Damjan Marion <damarion@cisco.com>
Signed-off-by: Sirshak Das <sirshak.das@arm.com>
Reviewed-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
Reviewed-by: Ola Liljedahl <ola.liljedahl@arm.com>
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This patch enables the use of this function for enqueuing frames to the next graph node.
Change-Id: I4003110db59870f7106e0d13942d6ff7bc54b46d
Signed-off-by: Lijian Zhang <Lijian.Zhang@arm.com>
Reviewed-by: Sirshak Das <Sirshak.Das@arm.com>
Reviewed-by: Honnappa Nagarahalli <Honnappa.Nagarahalli@arm.com>
Reviewed-by: Steve Capper <Steve.Capper@arm.com>
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Change-Id: Ia9b74761ce511d218bb5319c7c9b5e58be3e2e8a
Signed-off-by: Damjan Marion <damarion@cisco.com>
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Change-Id: I34cc55d8292a69fb451ed0031484994f51d3537a
Signed-off-by: Damjan Marion <damarion@cisco.com>
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Without pagemap access only way to do DMA to physmem is by
using IOMMU. In such case VFIO will take care for preventing
paging of such memory so we don't need to lock here.
Change-Id: Ica9c20659fba3ea3c96202eb5f7d29c43b313fa9
Signed-off-by: Damjan Marion <damarion@cisco.com>
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Change-Id: Iecceffe06a92660976ebb58cd3cbec4be8931db0
Signed-off-by: Damjan Marion <damarion@cisco.com>
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Change-Id: I5ff713ad0b254c74c5622e3b9425cca365b5ee97
Signed-off-by: Damjan Marion <damarion@cisco.com>
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Change-Id: Ie9ff9b751190632dfc4576e5cbb1987a4142af5e
Signed-off-by: Damjan Marion <damarion@cisco.com>
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Change-Id: Ic4c46bc733afae8bf0d8146623ed15633928de30
Signed-off-by: Damjan Marion <damarion@cisco.com>
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Change-Id: Ied34720ca5a6e6e717eea4e86003e854031b6eab
Signed-off-by: Dave Barach <dave@barachs.net>
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Change-Id: Ibec32c6df32f4cd9889d378e244f170c93ad295b
Signed-off-by: Damjan Marion <damarion@cisco.com>
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Change-Id: Ie5a00c15ee9536cc61afab57f6cadc1aa1972f3c
Signed-off-by: Dave Barach <dave@barachs.net>
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Change-Id: Iffba7ebe5af8fadc0251f3a10022739d45f394ce
Signed-off-by: Juraj Sloboda <jsloboda@cisco.com>
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Starting with kernel 4.14 hugepage fd can be retrieved with
memfd_systemcall
Change-Id: I0f3bd6d0a7757ffe7b98e83763502013ac763ecb
Signed-off-by: Damjan Marion <damarion@cisco.com>
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This is first part of addition of atomic macros with only macros for
__sync builtins.
- Based on earlier patch by Damjan (https://gerrit.fd.io/r/#/c/10729/)
Additionally
- clib_atomic_release macro added and used in the absence
of any memory barrier.
- clib_atomic_bool_cmp_and_swap added
Change-Id: Ie4e48c1e184a652018d1d0d87c4be80ddd180a3b
Original-patch-by: Damjan Marion <damarion@cisco.com>
Signed-off-by: Sirshak Das <sirshak.das@arm.com>
Reviewed-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
Reviewed-by: Ola Liljedahl <ola.liljedahl@arm.com>
Reviewed-by: Steve Capper <steve.capper@arm.com>
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Shorthand for the pattern:
pool_get (<pool>, ep);
memset (ep, 0, sizeof(*ep));
Should have done this years ago.
Change-Id: Ideeb27a79ff4ca3e9a077c973b297671d1fa2d26
Signed-off-by: Dave Barach <dave@barachs.net>
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Break up bond tx function into multiple small workloads:
1. parse the packet header and hash it based on the configured algorithm
2. optionally, trace the packet
3. convert the hash value from (1) to the slave port
4. update the buffers with the slave sw_if_index
5. Add the buffers to the queues
6. Create and send the frames
old numbers
-----------
Time 5.3, average vectors/node 223.74, last 128 main loops 40.00 per node 222.61
vector rates in 3.3627e6, out 6.6574e6, drop 3.3964e4, punt 0.0000e0
Name State Calls Vectors Suspends Clocks Vectors/Call
BondEthernet0-output active 68998 17662979 0 1.89e1 255.99
BondEthernet0-tx active 68998 17662979 0 2.60e1 255.99
TenGigabitEthernet3/0/1-output active 68998 8797416 0 1.03e1 127.50
TenGigabitEthernet3/0/1-tx active 68998 8797416 0 7.85e1 127.50
TenGigabitEthernet7/0/1-output active 68996 8865563 0 1.02e1 128.49
TenGigabitEthernet7/0/1-tx active 68996 8865563 0 7.65e1 128.49
new numbers
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BondEthernet0-output active 304064 77840384 0 2.29e1 256.00
BondEthernet0-tx active 304064 77840384 0 2.47e1 256.00
TenGigabitEthernet3/0/1-output active 304064 38765525 0 1.03e1 127.49
TenGigabitEthernet3/0/1-tx active 304064 38765525 0 7.66e1 127.49
TenGigabitEthernet7/0/1-output active 304064 39074859 0 1.01e1 128.51
Change-Id: I3ef9a52bfe235559dae09d055c03c5612c08a0f7
Signed-off-by: Damjan Marion <damarion@cisco.com>
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Change-Id: I2779626d745badb63386efcf729da7a094a4f297
Signed-off-by: Haiyang Tan <haiyangtan@tencent.com>
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Change-Id: I8691a10493d159a97574550c111f07722960a7cd
Signed-off-by: Haiyang Tan <haiyangtan@tencent.com>
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Change-Id: Ife2a83b9d7f733f36e0e786ef79edcd394d7c0f9
Signed-off-by: Neale Ranns <nranns@cisco.com>
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