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Change-Id: I7b51f88292e057c6443b12224486f2d0c9f8ae23
Signed-off-by: Damjan Marion <damarion@cisco.com>
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Ran indent *twice*
Change-Id: If9c18b81983bb859cc8dc3b415c67cbf318fc618
Signed-off-by: Ed Warnicke <eaw@cisco.com>
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Change-Id: I1b971ab326dc334a4743fd7d4184cef106b0523d
Signed-off-by: Dave Barach <dave@barachs.net>
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Change-Id: I816de8b1f255dc3bc6d2904566ea0b0f68fac5d8
Signed-off-by: Dave Barach <dave@barachs.net>
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gcc version 4.9.2 (Raspbian 4.9.2-10)
Tested on Linux raspberrypi 4.4.6-v7+ #875 SMP Tue Apr 12 16:33:02 BST 2016 armv7l GNU/Linux
CPUs may be little or big endian, detect with gcc flags, not the processor architecture
Add a new flag $(PLATFORM)_uses_openssl which allows to disable the link with openssl lib.
vlib/vlib/threads.c:
startup.conf must:
- specify the heapsize as we don't have hugepages on raspbian
cpu {
main-core 3
}
heapsize 64M
Corrects in various files the assumption uword == u64 and replaces 'u64' cast with 'pointer_to_uword' and 'uword_to_pointer' where appropriate.
256 CPUs may create an OOM when testing with small memory footprint ( heapsize 64M ), allows the number of VLIB_MAX_CPUS to be set in platforms/*.mk
vppinfra/vppinfra/longjmp.S:
ARM - copy r1 (1st parameter of the setjmp call) to r0 (return value)
vppinfra/vppinfra/time.h:
On ARMv7 in AArch32 mode, we can access to a 64bit register to retreive the cycles count.
gcc on rpi only declare ARM_ARCH 6. Override this info, and check if it is possible to use 'mrrc'.
/!\ the time function will NOT work without allowing the user mode access to the PMU.
You may download the source of the kmod here:
https://github.com/christophefontaine/arm_rdtsc
Change-Id: I8142606436d9671a184133b935398427f08a8bd2
Signed-off-by: Christophe Fontaine <christophe.fontaine@qosmos.com>
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Change-Id: Ib246f1fbfce93274020ee93ce461e3d8bd8b9f17
Signed-off-by: Ed Warnicke <eaw@cisco.com>
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