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path: root/test/test_ipip.py
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2022-03-10tests: fix test failure with parrallel testTianyu Li1-5/+5
2022-03-07ip: Fixes for IPv6 and MPLS fragmentationNeale Ranns1-0/+53
2021-01-07ipip: Support MPLS over IPNeale Ranns1-1/+149
2020-09-17teib: Add adj-fibs for peers/adjacencies on p2mp interfaceNeale Ranns1-2/+47
2020-02-21ipsec: IPSec protection for multi-point tunnel interfacesNeale Ranns1-4/+4
2020-02-04teib: Rename NHRP to TEIBNeale Ranns1-5/+5
2020-01-27ipip: Multi-point interfaceNeale Ranns1-0/+111
2020-01-27tunnel: Common types for IP tunnelsNeale Ranns1-16/+24
2019-12-03ipip: Tunnel flags controlling copying data to/from payload/encapNeale Ranns1-81/+539
2019-11-05misc: Fix python scripts shebang lineRenato Botelho do Couto1-1/+1
2019-11-05ip: Fragmentation fixesNeale Ranns1-4/+21
2019-06-18fib: fib api updatesNeale Ranns1-5/+5
2019-05-27IPIP tunnel: use address types on APINeale Ranns1-21/+25
2019-05-22stats: support multiple works for error countersOle Troan1-5/+5
2019-05-20reassembly: prevent long chain attackKlement Sekera1-0/+10
2019-04-10Tests Cleanup: Fix missing calls to setUpClass/tearDownClass.Paul Vinciguerra1-0/+8
2019-03-28Typos. A bunch of typos I've been collecting.Paul Vinciguerra1-1/+1
2019-03-06test framework: vpp_papi_provider.py - further cleanupOle Troan1-12/+12
2019-02-04VTL Cleanup: Fix missing calls to setUpClass/tearDownClass, fix numerous Type...Paul Vinciguerra1-0/+1
2018-12-10Test framework: StringIO fixes for Python3Ole Troan1-20/+6
2018-11-29Trivial: test/test_ipip.pyPaul Vinciguerra1-3/+3
2018-09-27IPIP and IPv6 fragmentationOle Troan1-19/+206
2018-09-17STATS: Dynamically mapped shared memory segmentOle Troan1-7/+9
2018-09-11GBP Endpoint UpdatesNeale Ranns1-1/+2
2018-09-02STATS: Python binding to access VPP statistics and counters.Ole Troan1-0/+10
2018-08-22IPIP and SIXRD tunnels create API needs table-IDs not fib-indexesNeale Ranns1-1/+13
2018-08-10IP fragmentation buffer chains, part 2.Ole Troan1-12/+54
2018-08-10IP fragmentation to handle buffer chains.Ole Troan1-0/+51
2018-05-25VPP-1277: IPIP - Copy TOS/TC from inner packet to outer.Ole Troan1-16/+19
2018-04-13Revert "MTU: Setting of MTU on software interface (instead of hardware interf...Damjan Marion1-64/+6
2018-04-13MTU: Setting of MTU on software interface (instead of hardware interface)Ole Troan1-6/+64
2018-03-15IPIP: Linter on test_*.pyOle Troan1-63/+30
2018-03-14IPIP: Add IP{v4,v6} over IP{v4,v6} configured tunnel support.Ole Troan1-0/+248
s="o">-1.0; } ratio = (float)miss_diff * (float)100 / (float)hits_diff; if (ratio < ci->branch_ratio_threshold) power_manager_scale_core_min(core); else power_manager_scale_core_max(core); g_active = 1; return ratio; } int add_core_to_monitor(int core) { struct core_info *ci; char proc_file[UNIX_PATH_MAX]; int ret; ci = get_core_info(); if (core < ci->core_count) { long setup; snprintf(proc_file, UNIX_PATH_MAX, "/dev/cpu/%d/msr", core); ci->cd[core].msr_fd = open(proc_file, O_RDWR | O_SYNC); if (ci->cd[core].msr_fd < 0) { RTE_LOG(ERR, POWER_MANAGER, "Error opening MSR file for core %d " "(is msr kernel module loaded?)\n", core); return -1; } /* * Set up branch counters */ setup = IA32_PERFEVT_BRANCH_HITS; ret = pwrite(ci->cd[core].msr_fd, &setup, sizeof(setup), IA32_PERFEVTSEL0); if (ret < 0) { RTE_LOG(ERR, POWER_MANAGER, "unable to set counter for core %u\n", core); return ret; } setup = IA32_PERFEVT_BRANCH_MISS; ret = pwrite(ci->cd[core].msr_fd, &setup, sizeof(setup), IA32_PERFEVTSEL1); if (ret < 0) { RTE_LOG(ERR, POWER_MANAGER, "unable to set counter for core %u\n", core); return ret; } /* * Close the file and re-open as read only so * as not to hog the resource */ close(ci->cd[core].msr_fd); ci->cd[core].msr_fd = open(proc_file, O_RDONLY); if (ci->cd[core].msr_fd < 0) { RTE_LOG(ERR, POWER_MANAGER, "Error opening MSR file for core %d " "(is msr kernel module loaded?)\n", core); return -1; } ci->cd[core].oob_enabled = 1; } return 0; } int remove_core_from_monitor(int core) { struct core_info *ci; char proc_file[UNIX_PATH_MAX]; int ret; ci = get_core_info(); if (ci->cd[core].oob_enabled) { long setup; /* * close the msr file, then reopen rw so we can * disable the counters */ if (ci->cd[core].msr_fd != 0) close(ci->cd[core].msr_fd); snprintf(proc_file, UNIX_PATH_MAX, "/dev/cpu/%d/msr", core); ci->cd[core].msr_fd = open(proc_file, O_RDWR | O_SYNC); if (ci->cd[core].msr_fd < 0) { RTE_LOG(ERR, POWER_MANAGER, "Error opening MSR file for core %d " "(is msr kernel module loaded?)\n", core); return -1; } setup = 0x0; /* clear event */ ret = pwrite(ci->cd[core].msr_fd, &setup, sizeof(setup), IA32_PERFEVTSEL0); if (ret < 0) { RTE_LOG(ERR, POWER_MANAGER, "unable to set counter for core %u\n", core); return ret; } setup = 0x0; /* clear event */ ret = pwrite(ci->cd[core].msr_fd, &setup, sizeof(setup), IA32_PERFEVTSEL1); if (ret < 0) { RTE_LOG(ERR, POWER_MANAGER, "unable to set counter for core %u\n", core); return ret; } close(ci->cd[core].msr_fd); ci->cd[core].msr_fd = 0; ci->cd[core].oob_enabled = 0; } return 0; } int branch_monitor_init(void) { return 0; } void run_branch_monitor(void) { struct core_info *ci; int print = 0; float ratio; int printed; int reads = 0; ci = get_core_info(); while (run_loop) { if (!run_loop) break; usleep(INTERVAL); int j; print++; printed = 0; for (j = 0; j < ci->core_count; j++) { if (ci->cd[j].oob_enabled) { ratio = apply_policy(j); if ((print > PRINT_LOOP_COUNT) && (g_active)) { printf(" %d: %.4f {%lu} {%d}", j, ratio, g_branches, reads); printed = 1; reads = 0; } else { reads++; } } } if (print > PRINT_LOOP_COUNT) { if (printed) printf("\n"); print = 0; } } }