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2016-10-13Add clib_mem_alloc_or_null(...)Dave Barach2-10/+32
Change-Id: I5177d6d3349384beb551b4f2f52b30b044ce335b Signed-off-by: Dave Barach <dave@barachs.net>
2016-10-11vppinfra: use crc32q instruction instead of xxhash in bihash_8_8Damjan Marion2-0/+11
xxhash calculation takes 10 clock cycles on Haswell so it makes sense to use crc32q insutrction when available. Change-Id: Iab5e7d9c8ec0125626bbcd067e5dc30574c8febc Signed-off-by: Damjan Marion <damarion@cisco.com>
2016-09-21A Protocol Independent Hierarchical FIB (VPP-352)Neale Ranns7-15/+40
Main Enhancements: - Protocol Independent FIB API - Hierarchical FIB entries. Dynamic recursive route resolution. - Extranet Support. - Integration of IP and MPLS forwarding. - Separation of FIB and Adjacency databases. - Data-Plane Object forwarding model. Change-Id: I52dc815c0d0aa8b493e3cf6b978568f3cc82296c Signed-off-by: Neale Ranns <nranns@cisco.com>
2016-09-06VPP-346 More VPP doc fixesChris Luke3-6/+6
- Fix issue in Doxy dependency check when nothing needs to be installed. 'set -e' and plain '[]' logic don't mix well. - Fix Makefile snafu when building Doxy output for a single file. - Include only one of vnet/vnet/buffer.c/dpdk_buffer.c in docs depending on DPDKness. This could do with some improvement in future, eg to properly align the pre-doxy steps with what Doxy does. - Fix rendering of 'inline' tag in Doxygen by having it interpret always_inline as "inline static". - Bunch of duplicate CLI command structure names that confused docs and may one day have caused debugging issues. - Several other Doxygen syntax issues fixed, like documenting non-existant parameters (usually just the wrong parameter name, typos, etc) Change-Id: Ia8cca545e5de9f8750602bffa3c4548acc8971aa Signed-off-by: Chris Luke <chrisy@flirble.org>
2016-09-01VPP-346 A swathe of doc fixesChris Luke2-4/+4
Fixes various Doxygen warnings and other structural defects. Note: This does not attempt to improve the content of the documentation; only to improve the syntax and structure of it and in some cases the consistency. Change-Id: Ib1915f33edbdbc4558c85565de80dce323193906 Signed-off-by: Chris Luke <chrisy@flirble.org>
2016-08-31VPP-189 Tweak hash_foreach_pair to avoid static warningChris Luke1-10/+21
Coverity doesn't like when an incrementing pointer is taken from the address of a singleton; it cries that this is a potential buffer overrun. Since the cases of this in hash_foreach_pair are based on items from a simple union used just to have different types point to the same location it's a simple matter of using the pointer to that location directly. Since we then aren't using the members of the union, we can change that to an opaque pointer (void *). This accounts for >60 issues in Coverity. Whilst here, convert some useful existing comments into a docblock. Change-Id: I114183ab7d7948d4a6a703451417f79fa37634eb Signed-off-by: Chris Luke <chrisy@flirble.org>
2016-08-17Coding standards cleanup - remove trailing whitespace, fixes VPP-332Damjan Marion1-1/+1
Change-Id: I649a17f8fa47599faf438b2e596f53761790d10c Signed-off-by: Damjan Marion <damarion@cisco.com>
2016-08-15VPP-327 Coding standards cleanup for vppinfraDave Barach147-8405/+11249
Fix additional a few additional deviations reported elsewhere by checkstyle Change-Id: I026a8ae1c5b1856bbe3c4a555e1b690e7501b045 Signed-off-by: Dave Barach <dave@barachs.net>
2016-08-15VPP-236 Support 64-bit vector lengths, shared memory segments >4 GBDave Barach4-36/+81
Change-Id: I02aee33e96e7ae32094b9f82f6a667d30bb52f59 Signed-off-by: Dave Barach <dave@barachs.net>
2016-08-12VPP-189 fix more coverity warningsDave Barach1-1/+1
Change-Id: If464a5f06ab15eead9eaf12e89792d3761796956 Signed-off-by: Dave Barach <dave@barachs.net>
2016-08-10VPP-189 Fix coverity warningsDave Barach2-3/+3
Change-Id: Iea6d338e60a95f7f30c10c2e751d4827e816f700 Signed-off-by: Dave Barach <dave@barachs.net>
2016-08-09VPP-189 Fix Coverity warningsDave Barach5-289/+8
Remove a bunch of historical SMP code that we're not using; clean up coverity warnings as a side-effect. Change-Id: Ic80d2f87c7fd4e654078cac23ad5ec287a1d7ffe Signed-off-by: Dave Barach <dave@barachs.net>
2016-08-08VPP-189 Clean up more coverity warningsDave Barach7-32/+17
Change-Id: If66713d79c545c762c385faf08cc809347741152 Signed-off-by: Dave Barach <dave@barachs.net>
2016-08-05VPP-223 Document vppinfra/bitmap.hDave Barach1-38/+210
Change-Id: I259a5b716bd8a7abdb0e6bf778432f034338ffdc Signed-off-by: Dave Barach <dave@barachs.net>
2016-08-05vpp-189 Clean up more coverity warningsDave Barach6-11/+31
Time to make the donuts Change-Id: I528937800f7daefce19723dda0216e58d857942c Signed-off-by: Dave Barach <dave@barachs.net>
2016-08-05VPP-189 Clean up more coverity warningsDave Barach2-1/+21
Change-Id: I1b971ab326dc334a4743fd7d4184cef106b0523d Signed-off-by: Dave Barach <dave@barachs.net>
2016-07-28VPP-223 Bounded-index extensible hash documentationDave Barach4-2/+166
Change-Id: If162252062014dbd8ef44f7f10649d54d9a288b0 Signed-off-by: Dave Barach <dave@barachs.net>
2016-07-26VPP-223 General documentation updatesChris Luke1-56/+71
Per the TWS session... - Some simple treatment of the contents of pool.h - Changing some \brief commands to @brief. (will do a more complete pass at this later.) Change-Id: I050ee69c59c4b572ac295b5f86940b7f4c934cd9 Signed-off-by: Chris Luke <chrisy@flirble.org>
2016-06-30Fix clang buildDamjan Marion1-3/+3
Change-Id: I678d7e0a7c91c7daf9feb3ec23a633b96fab56a7 Signed-off-by: Damjan Marion <damarion@cisco.com>
2016-06-25Doubly-linked list element poolsDave Barach4-1/+341
Change-Id: I96e7602be48dfb5bb3867ad1e9f15c543903b3d6 Signed-off-by: Dave Barach <dave@barachs.net>
2016-06-19VPP-152: mheap_alloc returns 0 when the requested heap size is too smallPierre Pfister2-1/+14
mheap_alloc allocates memory_size bytes of memory and returns a page-aligned memory space prefixed with a word-aligned header of type mheap_t. This header includes the actual usable space size, but when the requested size is too small, the computed size was incorrect (infinite). mheap_alloc now returns 0 in such cases. With help from Yoann Desmouceaux. Change-Id: I00af63d573d6939aca53dbe7ff612b726bd8f0df Signed-off-by: Pierre Pfister <ppfister@cisco.com>
2016-06-17Dynamically compute ip feature subgraph orderDave Barach4-1/+351
This change-set enables plugins to add themselves to the ip4/ip6 feature subgraphs without having to modify core vpp engine code at all. Add VNET_IP4/IP6_UNICAST/MULTICAST_FEATURE_INIT macros which express the required ordering constraints, and off you go. Along the way, added an implementation of Warshall's algorithm to vppinfra; to compute the positive transitive closure of a relation. In this case, the relation is "feature A runs before feature B." With that in hand, ip_feature_init_cast(...) computes a partial order across the set of configured feature subgraph nodes. In unit-testing, we discovered VPP-145 - ip4/6 inacl wiped out vnet_buffer(b)->ip>current_config_index, which exists in main. So, we fixed that by moving b->trace_index, adding b->current_config_index, and removing the ip opaque union current_config_index. Change-Id: Iff132116f66413dc6b31ac3377198c7a32d51f48 Signed-off-by: Dave Barach <dave@barachs.net>
2016-06-14Add dpdk per-interface startup config parameter to specify worker threadsDamjan Marion1-0/+2
New parameter allows specifying which worker threads will process rx queues. Parameter arguments is list of cores and number of worker specified must be equal to the number of rx queues configured (num-rx-queues). If num-rx-queues is not specified, it will be automatically set to number of workers. Sample config: dpdk { dev 0000:86:00.0 { workers 2,3 num-rx-queues 2 } } Change-Id: I88bc381e0e542eb02def09a726c6f04de3e1ae17 Signed-off-by: Damjan Marion <damarion@cisco.com>
2016-06-13Add worker-handoff nodeDamjan Marion1-0/+20
worker-handoff node is universal node which taakes packets from the input node and hands them over to worker threads. Currently it supports flow hashing based on ipv4, ipv6 and mpls headers. New cli: set interface handoff <intrerface-name> workers <list> e.g. set interface handoff TenGigabitEthernet2/0/0 workers 3-6,9-10 Change-Id: Iaf0df83e69bb0e84969865e0e1cdb000b0864cf5 Signed-off-by: Damjan Marion <damarion@cisco.com>
2016-06-09Add format_hexdump functionDamjan Marion2-0/+49
Function output is compatible with text2pcap tool Sample output: 00000: 54 68 65 20 71 75 69 63 6b 20 62 72 6f 77 6e 20 [The quick brown ] 00010: 66 6f 78 20 6a 75 6d 70 73 20 6f 76 65 72 20 74 [fox jumps over t] 00020: 68 65 20 6c 61 7a 79 20 64 6f 67 00 [he lazy dog.] Change-Id: If77ec7d91b77146df770698e0cf35fe2f6dd0821 Signed-off-by: Damjan Marion <damarion@cisco.com>
2016-05-19Add support for multiple microarchitectures in single binaryDamjan Marion2-6/+95
* compiler -march= parameter is changed from native to corei7 so code is always genereted with instructions which are available on the Nehalem microarchitecture (up to SSE4.2) * compiler -mtune= parameter is added so code is optimized for corei7-avx which equals to Sandy Bridge microarchitecture * set of macros is added which allows run-time detection of available cpu instructions (e.g. clib_cpu_supports_avx()) * set of macros is added which allows us to clone graph node funcitons where cloned function is optmized for different microarchitecture Those macros are using following attributes: __attribute__((flatten)) __attribute__((target("arch=core-avx2))) I.e. If applied to foo_node_fn() macro will generate cloned functions foo_node_fn_avx2() and foo_node_fn_avx512() (future) It will also generate function void * foo_node_fn_multiarch_select() which detects available instruction set and returns pointer to the best matching function clone. Change-Id: I2dce0ac92a5ede95fcb56f47f3d1f3c4c040bac0 Signed-off-by: Damjan Marion <damarion@cisco.com>
2016-05-17vppinfra - ARM: cycle count 64bits register is only available on ARMv8Christophe Fontaine1-2/+9
Change-Id: I7d622e591020a482af68667f4d1ed2056258d2c8 Signed-off-by: Christophe Fontaine <christophe.fontaine@qosmos.com>
2016-05-16VPP-58: Fix build on AMD OpteronDamjan Marion1-1/+1
Change-Id: Ib3e10fd4c27dde4f90b8d156f0c8547787ad46e2 Signed-off-by: Damjan Marion <damarion@cisco.com>
2016-05-16VPP-57 Add missing license headers in doc filesChris Luke3-0/+48
Change-Id: Icd1f8952f66d3cee027c59f3148c67f1839de306 Signed-off-by: Chris Luke <chrisy@flirble.org>
2016-05-13VPP-57 Add Doxygen to VPPChris Luke4-2/+11
- Configures Doxygen. - Adds a source filter to do magic on our use of the preprocessor to do constructor stuff to make Doxygen grok it better. - Adds a convenience helper to the root Makefile. - Adds a README.md to the root directory (and which Doxygem uses as its "mainpage". - Add several other documentative files. - Currently using SVG for call graphs, though this may have a load-time performance impact in browsers. Change-Id: I25fc6fb5bf634319dcb36a7f0e32031921c125ac Signed-off-by: Chris Luke <chrisy@flirble.org>
2016-04-26Make automake silent rules defaultDamjan Marion1-1/+1
Change-Id: Ia504ccdac1deac20f20cf7fb76f78b2d8c505474 Signed-off-by: Damjan Marion <damarion@cisco.com>
2016-04-22Add clib_memcpy macro based on DPDK rte_memcpy implementationDamjan Marion22-66/+683
Change-Id: I22cb443c4bd0bf298abb6f06e8e4ca65a44a2854 Signed-off-by: Damjan Marion <damarion@cisco.com>
2016-04-21Add Broadwell-EP/EX to the uarch listDamjan Marion1-0/+1
Change-Id: I2ab84846ac88d3170b8c847914749e2a728dfa2b Signed-off-by: Damjan Marion <damarion@cisco.com>
2016-04-18Add support for AArch32Christophe Fontaine10-14/+20
gcc version 4.9.2 (Raspbian 4.9.2-10) Tested on Linux raspberrypi 4.4.6-v7+ #875 SMP Tue Apr 12 16:33:02 BST 2016 armv7l GNU/Linux CPUs may be little or big endian, detect with gcc flags, not the processor architecture Add a new flag $(PLATFORM)_uses_openssl which allows to disable the link with openssl lib. vlib/vlib/threads.c: startup.conf must: - specify the heapsize as we don't have hugepages on raspbian cpu { main-core 3 } heapsize 64M Corrects in various files the assumption uword == u64 and replaces 'u64' cast with 'pointer_to_uword' and 'uword_to_pointer' where appropriate. 256 CPUs may create an OOM when testing with small memory footprint ( heapsize 64M ), allows the number of VLIB_MAX_CPUS to be set in platforms/*.mk vppinfra/vppinfra/longjmp.S: ARM - copy r1 (1st parameter of the setjmp call) to r0 (return value) vppinfra/vppinfra/time.h: On ARMv7 in AArch32 mode, we can access to a 64bit register to retreive the cycles count. gcc on rpi only declare ARM_ARCH 6. Override this info, and check if it is possible to use 'mrrc'. /!\ the time function will NOT work without allowing the user mode access to the PMU. You may download the source of the kmod here: https://github.com/christophefontaine/arm_rdtsc Change-Id: I8142606436d9671a184133b935398427f08a8bd2 Signed-off-by: Christophe Fontaine <christophe.fontaine@qosmos.com>
2016-04-14Fix vppinfra unit testsFlorin Coras3-5/+10
"make check" in build-root/build-$tag-$arch/vppinfra should now work on a machine with 3G of spare memory Change-Id: Ie6a22e8496b56b93aa90fdc81e3e0c10dc7514fb Signed-off-by: Florin Coras <fcoras@cisco.com>
2016-04-11Add configure option to enable building unit testsDamjan Marion2-1/+12
Same template should be used for other libs... Change-Id: Icc771cb6b243d215f30fb51c0dbc028e497a74c6 Signed-off-by: Damjan Marion <damarion@cisco.com>
2016-03-28event logger skeletons, improve debug CLIDave Barach2-1/+2
Change-Id: Ieb2e4043fc7bc3b4a5436a7a6aa35f573d8d4506 Signed-off-by: Dave Barach <dave@barachs.net>
2016-03-26Improve main-loop event-logsDave Barach2-3/+29
Change-Id: I984debeffe0dce36c9e7ab963f25d862cc7550cc Signed-off-by: Dave Barach <dave@barachs.net>
2016-03-18Make adjacencies shareableDave Barach1-0/+2
Change-Id: I620871ca715b751d2e487f37341b7118797c9176 Signed-off-by: Damjan Marion <damarion@cisco.com>
2016-03-14Declare node, hw_interface_class and device_class instances as externalDamjan Marion1-1/+1
This fixes issue observed on Ubuntu 16.04 where dynamic loader is not finding correct instance of specific structure. Change-Id: I618d0933c7e171b8a9b40495b36894785af7790a Signed-off-by: Damjan Marion <damarion@cisco.com>
2016-03-04vppinfra: remove generated config.h.inJean-Mickael Guerin1-62/+0
Change-Id: I04f53789bf1f39fdf16bc813280b24144fedd020 Signed-off-by: Jean-Mickael Guerin <jean-mickael.guerin@6wind.com>
2016-03-04Add CPU detection functionsDamjan Marion3-0/+134
Change-Id: Id7ea0410d6a789000c747c36a7e50076e31dc29a Signed-off-by: Damjan Marion <damarion@cisco.com>
2016-03-03Use CRC32 instruction only when build for SSE4.2 enabled platformsDamjan Marion1-1/+1
This fixes SIGILL crash observed on Penryn CPU Change-Id: I960878d88f0f088847d4d86605ef082f6600e2c7 Signed-off-by: Damjan Marion <damarion@cisco.com>
2016-02-29-O3 warnings be goneDave Barach1-1/+1
Note that compiling -O3 doesn't improve performance as of this writing, might as well clean up warnings in any event. Change-Id: Ic2f4982d12fbbf36f5324075183982731759dc94 Signed-off-by: Dave Barach <dave@barachs.net>
2016-02-16Increase number of per-cpu mheaps to 256Damjan Marion2-2/+4
It also includes check to ensure that number of per-cpu mheaps is not lower than number of cpus. Change-Id: Ibc68b34dda130f922243f9ea15b03e44bbcac269 Signed-off-by: Damjan Marion <damarion@cisco.com>
2016-02-16Remove vec_sort macroDamjan Marion1-27/+0
vec_sort macro was using gcc proprietary nested functions that require a executable stack and they are considered as unsafe. Also, nested functions are not supported by other compilers. vec_sort_with_function() should be used instead. Change-Id: I05959da63d222ec71c090ba63420b427ce10c79b Signed-off-by: Damjan Marion <damarion@cisco.com>
2016-02-11Use vppinfra bitmap for dpdk coremaskDamjan Marion1-1/+24
Change-Id: Iec5ebadf120f742f43a681c4d394aa97ad2ae1e1 Signed-off-by: Damjan Marion <damarion@cisco.com>
2016-01-22aarch64 CPU arch / ThunderX platform initial supportDave Barach9-14/+129
Change-Id: Ia2edd3cee2c25c26c7c47a9023744b97226434c7 Signed-off-by: Dave Barach <dave@barachs.net>
2016-01-21PowerPC64-be arch support. Qemu ("qppc") platform support.Dave Barach4-30/+52
Change-Id: Ib0a05f9d1b08bacef09f6d7c101391737031ee0d Signed-off-by: Dave Barach <dave@barachs.net>
2016-01-19Merge "Fix bitmap list parsing"Dave Barach1-0/+5