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CSIT-2001
=========

.. toctree::
    :maxdepth: 2
    :caption: Introduction

    introduction/report_history
    introduction/introduction
    introduction/test_scenarios_overview
    introduction/physical_testbeds
    introduction/methodology

.. toctree::
    :maxdepth: 2
    :caption: VPP Performance

    vpp_performance_tests/overview
    vpp_performance_tests/csit_release_notes
    vpp_performance_tests/packet_throughput_graphs/index
    vpp_performance_tests/throughput_speedup_multi_core/index
    vpp_performance_tests/packet_latency/index
    vpp_performance_tests/reconf_tests/index
    vpp_performance_tests/nf_service_density/index
    vpp_performance_tests/hoststack_testing/index
    vpp_performance_tests/comparisons/index
    vpp_performance_tests/throughput_trending
    vpp_performance_tests/test_environment
    vpp_performance_tests/documentation/index

..
    vpp_performance_tests/soak_tests/index

.. toctree::
    :maxdepth: 2
    :caption: DPDK Performance

    dpdk_performance_tests/overview
    dpdk_performance_tests/csit_release_notes
    dpdk_performance_tests/packet_throughput_graphs/index
    dpdk_performance_tests/packet_latency/index
    dpdk_performance_tests/comparisons/index
    dpdk_performance_tests/throughput_trending
    dpdk_performance_tests/test_environment
    dpdk_performance_tests/documentation

.. toctree::
    :maxdepth: 2
    :caption: VPP Device

    vpp_device_tests/overview
    vpp_device_tests/csit_release_notes
    vpp_device_tests/test_environment
    vpp_device_tests/documentation

.. toctree::
    :maxdepth: 2
    :caption: Detailed Results

    detailed_test_results/vpp_performance_results/index
    detailed_test_results/vpp_mrr_results/index
    detailed_test_results/dpdk_performance_results/index
    detailed_test_results/vpp_device_results_ubuntu/index

.. toctree::
    :maxdepth: 2
    :caption: Test Configuration

    test_configuration/vpp_performance_configuration/index
    test_configuration/vpp_mrr_configuration/index
    test_configuration/vpp_device_configuration_ubuntu/index

.. toctree::
    :maxdepth: 2
    :caption: Test Operational Data

    test_operational_data/vpp_performance_operational_data/index

.. toctree::
    :maxdepth: 2
    :caption: CSIT Framework Documentation

    csit_framework_documentation/csit_design
    csit_framework_documentation/csit_test_naming
    csit_framework_documentation/pal_lld
    csit_framework_documentation/csit_tag_description
id='n642' href='#n642'>642 643 644 645 646 647 648 649 650 651 652 653 654 655 656 657 658 659 660 661 662 663 664 665 666 667 668 669 670 671 672 673 674 675 676 677 678 679 680 681 682 683 684 685 686 687 688 689 690 691 692 693 694 695 696 697 698 699 700 701 702 703 704 705 706 707 708 709 710 711 712 713 714 715 716 717 718 719 720 721 722 723 724 725 726 727 728 729 730 731 732 733 734 735 736 737 738 739 740 741 742 743 744 745 746 747 748 749 750 751 752 753 754 755 756 757 758 759 760 761 762 763 764 765 766 767 768 769 770 771 772 773 774 775 776 777 778 779 780 781 782 783 784 785 786 787 788 789 790 791 792 793 794 795 796 797 798 799 800 801 802 803 804 805 806 807 808 809 810 811 812 813 814 815 816 817 818 819 820 821 822 823 824 825 826 827 828 829 830 831 832 833 834 835 836 837 838 839 840 841 842 843 844 845 846 847 848 849 850 851 852 853 854 855 856 857 858 859 860 861 862 863 864 865 866 867 868 869 870 871 872 873 874 875 876 877 878 879 880 881 882 883 884 885 886 887 888 889 890 891 892 893 894 895 896 897 898 899 900 901 902 903 904 905 906 907 908 909 910 911 912 913 914 915 916 917 918 919 920 921 922 923 924 925 926 927 928 929 930 931 932 933 934 935 936 937 938 939 940 941 942 943 944 945 946 947 948 949 950 951 952 953 954 955 956 957 958 959 960 961 962 963 964 965 966 967 968 969 970 971 972 973 974 975 976 977 978 979 980 981 982 983 984 985 986 987 988 989 990 991 992 993 994 995 996 997 998 999 1000 1001 1002 1003 1004 1005 1006 1007 1008 1009 1010 1011 1012 1013 1014 1015 1016 1017 1018 1019 1020 1021 1022 1023 1024 1025 1026 1027 1028 1029 1030 1031 1032 1033 1034 1035 1036 1037 1038 1039 1040 1041 1042 1043 1044 1045 1046 1047 1048 1049 1050 1051 1052 1053 1054 1055 1056 1057 1058 1059 1060 1061 1062 1063 1064 1065 1066 1067 1068 1069 1070 1071 1072 1073 1074 1075 1076 1077 1078 1079 1080 1081 1082 1083 1084 1085 1086 1087 1088 1089 1090 1091 1092 1093 1094 1095 1096 1097 1098 1099 1100 1101 1102 1103 1104 1105 1106 1107 1108 1109 1110 1111 1112 1113 1114 1115 1116 1117 1118 1119 1120 1121 1122 1123 1124 1125 1126 1127 1128 1129 1130 1131 1132 1133 1134 1135 1136 1137 1138 1139 1140 1141 1142 1143 1144 1145 1146 1147 1148 1149 1150 1151 1152 1153 1154 1155 1156 1157 1158 1159 1160 1161 1162 1163 1164 1165 1166 1167 1168 1169 1170 1171 1172 1173 1174 1175 1176 1177 1178 1179 1180 1181 1182 1183 1184 1185 1186 1187 1188 1189 1190 1191 1192 1193 1194 1195 1196 1197 1198 1199 1200 1201 1202 1203 1204 1205 1206 1207 1208 1209 1210 1211 1212 1213 1214 1215 1216 1217 1218 1219 1220 1221 1222 1223 1224 1225 1226 1227 1228 1229 1230 1231 1232 1233 1234 1235 1236 1237 1238 1239 1240 1241 1242 1243 1244 1245 1246 1247 1248 1249 1250 1251 1252 1253 1254 1255 1256 1257 1258 1259 1260 1261 1262 1263 1264 1265 1266 1267 1268 1269 1270 1271 1272 1273 1274 1275 1276 1277 1278 1279 1280 1281 1282 1283 1284 1285 1286 1287 1288 1289 1290 1291 1292 1293 1294 1295 1296 1297 1298 1299 1300 1301 1302 1303 1304 1305 1306 1307 1308 1309 1310 1311 1312 1313 1314 1315 1316 1317 1318 1319 1320 1321 1322 1323 1324 1325 1326 1327 1328 1329 1330 1331 1332 1333 1334 1335 1336 1337 1338 1339 1340 1341 1342 1343 1344 1345 1346 1347 1348 1349 1350 1351 1352 1353 1354 1355 1356 1357 1358 1359 1360 1361 1362 1363 1364 1365 1366 
#include <perfmon/perfmon_intel.h>

static perfmon_intel_pmc_cpu_model_t cpu_model_table[] = {
  {0x55, 0x05, 1},
  {0x55, 0x06, 1},
  {0x55, 0x07, 1},
  {0x55, 0x08, 1},
  {0x55, 0x09, 1},
  {0x55, 0x0A, 1},
  {0x55, 0x0B, 1},
  {0x55, 0x0C, 1},
  {0x55, 0x0D, 1},
  {0x55, 0x0E, 1},
  {0x55, 0x0F, 1},

};

static perfmon_intel_pmc_event_t event_table[] = {
  {
   .event_code = {0x00},
   .umask = 0x01,
   .event_name = "inst_retired.any",
   },
  {
   .event_code = {0x00},
   .umask = 0x02,
   .event_name = "cpu_clk_unhalted.thread",
   },
  {
   .event_code = {0x00},
   .umask = 0x02,
   .event_name = "cpu_clk_unhalted.thread_any",
   },
  {
   .event_code = {0x00},
   .umask = 0x03,
   .event_name = "cpu_clk_unhalted.ref_tsc",
   },
  {
   .event_code = {0x03},
   .umask = 0x02,
   .event_name = "ld_blocks.store_forward",
   },
  {
   .event_code = {0x03},
   .umask = 0x08,
   .event_name = "ld_blocks.no_sr",
   },
  {
   .event_code = {0x07},
   .umask = 0x01,
   .event_name = "ld_blocks_partial.address_alias",
   },
  {
   .event_code = {0x08},
   .umask = 0x01,
   .event_name = "dtlb_load_misses.miss_causes_a_walk",
   },
  {
   .event_code = {0x08},
   .umask = 0x02,
   .event_name = "dtlb_load_misses.walk_completed_4k",
   },
  {
   .event_code = {0x08},
   .umask = 0x04,
   .event_name = "dtlb_load_misses.walk_completed_2m_4m",
   },
  {
   .event_code = {0x08},
   .umask = 0x08,
   .event_name = "dtlb_load_misses.walk_completed_1g",
   },
  {
   .event_code = {0x08},
   .umask = 0x0E,
   .event_name = "dtlb_load_misses.walk_completed",
   },
  {
   .event_code = {0x08},
   .umask = 0x10,
   .event_name = "dtlb_load_misses.walk_pending",
   },
  {
   .event_code = {0x08},
   .umask = 0x20,
   .event_name = "dtlb_load_misses.stlb_hit",
   },
  {
   .event_code = {0x09},
   .umask = 0x01,
   .event_name = "memory_disambiguation.history_reset",
   },
  {
   .event_code = {0x0D},
   .umask = 0x01,
   .event_name = "int_misc.recovery_cycles",
   },
  {
   .event_code = {0x0D},
   .umask = 0x01,
   .event_name = "int_misc.recovery_cycles_any",
   },
  {
   .event_code = {0x0D},
   .umask = 0x80,
   .event_name = "int_misc.clear_resteer_cycles",
   },
  {
   .event_code = {0x0E},
   .umask = 0x01,
   .event_name = "uops_issued.stall_cycles",
   },
  {
   .event_code = {0x0E},
   .umask = 0x01,
   .event_name = "uops_issued.any",
   },
  {
   .event_code = {0x0E},
   .umask = 0x20,
   .event_name = "uops_issued.slow_lea",
   },
  {
   .event_code = {0x14},
   .umask = 0x01,
   .event_name = "arith.divider_active",
   },
  {
   .event_code = {0x24},
   .umask = 0x21,
   .event_name = "l2_rqsts.demand_data_rd_miss",
   },
  {
   .event_code = {0x24},
   .umask = 0x22,
   .event_name = "l2_rqsts.rfo_miss",
   },
  {
   .event_code = {0x24},
   .umask = 0x24,
   .event_name = "l2_rqsts.code_rd_miss",
   },
  {
   .event_code = {0x24},
   .umask = 0x27,
   .event_name = "l2_rqsts.all_demand_miss",
   },
  {
   .event_code = {0x24},
   .umask = 0x38,
   .event_name = "l2_rqsts.pf_miss",
   },
  {
   .event_code = {0x24},
   .umask = 0x3F,
   .event_name = "l2_rqsts.miss",
   },
  {
   .event_code = {0x24},
   .umask = 0xc1,
   .event_name = "l2_rqsts.demand_data_rd_hit",
   },
  {
   .event_code = {0x24},
   .umask = 0xc2,
   .event_name = "l2_rqsts.rfo_hit",
   },
  {
   .event_code = {0x24},
   .umask = 0xc4,
   .event_name = "l2_rqsts.code_rd_hit",
   },
  {
   .event_code = {0x24},
   .umask = 0xd8,
   .event_name = "l2_rqsts.pf_hit",
   },
  {
   .event_code = {0x24},
   .umask = 0xE1,
   .event_name = "l2_rqsts.all_demand_data_rd",
   },
  {
   .event_code = {0x24},
   .umask = 0xE2,
   .event_name = "l2_rqsts.all_rfo",
   },
  {
   .event_code = {0x24},
   .umask = 0xE4,
   .event_name = "l2_rqsts.all_code_rd",
   },
  {
   .event_code = {0x24},
   .umask = 0xe7,
   .event_name = "l2_rqsts.all_demand_references",
   },
  {
   .event_code = {0x24},
   .umask = 0xF8,
   .event_name = "l2_rqsts.all_pf",
   },
  {
   .event_code = {0x24},
   .umask = 0xFF,
   .event_name = "l2_rqsts.references",
   },
  {
   .event_code = {0x28},
   .umask = 0x07,
   .event_name = "core_power.lvl0_turbo_license",
   },
  {
   .event_code = {0x28},
   .umask = 0x18,
   .event_name = "core_power.lvl1_turbo_license",
   },
  {
   .event_code = {0x28},
   .umask = 0x20,
   .event_name = "core_power.lvl2_turbo_license",
   },
  {
   .event_code = {0x28},
   .umask = 0x40,
   .event_name = "core_power.throttle",
   },
  {
   .event_code = {0x2E},
   .umask = 0x41,
   .event_name = "longest_lat_cache.miss",
   },
  {
   .event_code = {0x2E},
   .umask = 0x4F,
   .event_name = "longest_lat_cache.reference",
   },
  {
   .event_code = {0x32},
   .umask = 0x01,
   .event_name = "sw_prefetch_access.nta",
   },
  {
   .event_code = {0x32},
   .umask = 0x02,
   .event_name = "sw_prefetch_access.t0",
   },
  {
   .event_code = {0x32},
   .umask = 0x04,
   .event_name = "sw_prefetch_access.t1_t2",
   },
  {
   .event_code = {0x32},
   .umask = 0x08,
   .event_name = "sw_prefetch_access.prefetchw",
   },
  {
   .event_code = {0x3C},
   .umask = 0x00,
   .event_name = "cpu_clk_unhalted.thread_p",
   },
  {
   .event_code = {0x3C},
   .umask = 0x00,
   .event_name = "cpu_clk_unhalted.thread_p_any",
   },
  {
   .event_code = {0x3C},
   .umask = 0x00,
   .event_name = "cpu_clk_unhalted.ring0_trans",
   },
  {
   .event_code = {0x3C},
   .umask = 0x01,
   .event_name = "cpu_clk_thread_unhalted.ref_xclk",
   },
  {
   .event_code = {0x3C},
   .umask = 0x01,
   .event_name = "cpu_clk_thread_unhalted.ref_xclk_any",
   },
  {
   .event_code = {0x3C},
   .umask = 0x01,
   .event_name = "cpu_clk_unhalted.ref_xclk_any",
   },
  {
   .event_code = {0x3C},
   .umask = 0x01,
   .event_name = "cpu_clk_unhalted.ref_xclk",
   },
  {
   .event_code = {0x3C},
   .umask = 0x02,
   .event_name = "cpu_clk_thread_unhalted.one_thread_active",
   },
  {
   .event_code = {0x48},
   .umask = 0x01,
   .event_name = "l1d_pend_miss.pending_cycles",
   },
  {
   .event_code = {0x48},
   .umask = 0x01,
   .event_name = "l1d_pend_miss.pending",
   },
  {
   .event_code = {0x48},
   .umask = 0x02,
   .event_name = "l1d_pend_miss.fb_full",
   },
  {
   .event_code = {0x49},
   .umask = 0x01,
   .event_name = "dtlb_store_misses.miss_causes_a_walk",
   },
  {
   .event_code = {0x49},
   .umask = 0x02,
   .event_name = "dtlb_store_misses.walk_completed_4k",
   },
  {
   .event_code = {0x49},
   .umask = 0x04,
   .event_name = "dtlb_store_misses.walk_completed_2m_4m",
   },
  {
   .event_code = {0x49},
   .umask = 0x08,
   .event_name = "dtlb_store_misses.walk_completed_1g",
   },
  {
   .event_code = {0x49},
   .umask = 0x0E,
   .event_name = "dtlb_store_misses.walk_completed",
   },
  {
   .event_code = {0x49},
   .umask = 0x10,
   .event_name = "dtlb_store_misses.walk_pending",
   },
  {
   .event_code = {0x49},
   .umask = 0x20,
   .event_name = "dtlb_store_misses.stlb_hit",
   },
  {
   .event_code = {0x4C},
   .umask = 0x01,
   .event_name = "load_hit_pre.sw_pf",
   },
  {
   .event_code = {0x4F},
   .umask = 0x10,
   .event_name = "ept.walk_pending",
   },
  {
   .event_code = {0x51},
   .umask = 0x01,
   .event_name = "l1d.replacement",
   },
  {
   .event_code = {0x54},
   .umask = 0x01,
   .event_name = "tx_mem.abort_conflict",
   },
  {
   .event_code = {0x54},
   .umask = 0x02,
   .event_name = "tx_mem.abort_capacity",
   },
  {
   .event_code = {0x54},
   .umask = 0x04,
   .event_name = "tx_mem.abort_hle_store_to_elided_lock",
   },
  {
   .event_code = {0x54},
   .umask = 0x08,
   .event_name = "tx_mem.abort_hle_elision_buffer_not_empty",
   },
  {
   .event_code = {0x54},
   .umask = 0x10,
   .event_name = "tx_mem.abort_hle_elision_buffer_mismatch",
   },
  {
   .event_code = {0x54},
   .umask = 0x20,
   .event_name = "tx_mem.abort_hle_elision_buffer_unsupported_alignment",
   },
  {
   .event_code = {0x54},
   .umask = 0x40,
   .event_name = "tx_mem.hle_elision_buffer_full",
   },
  {
   .event_code = {0x59},
   .umask = 0x01,
   .event_name = "partial_rat_stalls.scoreboard",
   },
  {
   .event_code = {0x5d},
   .umask = 0x01,
   .event_name = "tx_exec.misc1",
   },
  {
   .event_code = {0x5d},
   .umask = 0x02,
   .event_name = "tx_exec.misc2",
   },
  {
   .event_code = {0x5d},
   .umask = 0x04,
   .event_name = "tx_exec.misc3",
   },
  {
   .event_code = {0x5d},
   .umask = 0x08,
   .event_name = "tx_exec.misc4",
   },
  {
   .event_code = {0x5d},
   .umask = 0x10,
   .event_name = "tx_exec.misc5",
   },
  {
   .event_code = {0x5E},
   .umask = 0x01,
   .event_name = "rs_events.empty_end",
   },
  {
   .event_code = {0x5E},
   .umask = 0x01,
   .event_name = "rs_events.empty_cycles",
   },
  {
   .event_code = {0x60},
   .umask = 0x01,
   .event_name = "offcore_requests_outstanding.cycles_with_demand_data_rd",
   },
  {
   .event_code = {0x60},
   .umask = 0x01,
   .event_name = "offcore_requests_outstanding.demand_data_rd",
   },
  {
   .event_code = {0x60},
   .umask = 0x02,
   .event_name = "offcore_requests_outstanding.demand_code_rd",
   },
  {
   .event_code = {0x60},
   .umask = 0x02,
   .event_name = "offcore_requests_outstanding.cycles_with_demand_code_rd",
   },
  {
   .event_code = {0x60},
   .umask = 0x04,
   .event_name = "offcore_requests_outstanding.demand_rfo",
   },
  {
   .event_code = {0x60},
   .umask = 0x04,
   .event_name = "offcore_requests_outstanding.cycles_with_demand_rfo",
   },
  {
   .event_code = {0x60},
   .umask = 0x08,
   .event_name = "offcore_requests_outstanding.cycles_with_data_rd",
   },
  {
   .event_code = {0x60},
   .umask = 0x08,
   .event_name = "offcore_requests_outstanding.all_data_rd",
   },
  {
   .event_code = {0x60},
   .umask = 0x10,
   .event_name = "offcore_requests_outstanding.l3_miss_demand_data_rd",
   },
  {
   .event_code = {0x79},
   .umask = 0x04,
   .event_name = "idq.mite_cycles",
   },
  {
   .event_code = {0x79},
   .umask = 0x04,
   .event_name = "idq.mite_uops",
   },
  {
   .event_code = {0x79},
   .umask = 0x08,
   .event_name = "idq.dsb_cycles",
   },
  {
   .event_code = {0x79},
   .umask = 0x08,
   .event_name = "idq.dsb_uops",
   },
  {
   .event_code = {0x79},
   .umask = 0x10,
   .event_name = "idq.ms_dsb_cycles",
   },
  {
   .event_code = {0x79},
   .umask = 0x18,
   .event_name = "idq.all_dsb_cycles_any_uops",
   },
  {
   .event_code = {0x79},
   .umask = 0x18,
   .event_name = "idq.all_dsb_cycles_4_uops",
   },
  {
   .event_code = {0x79},
   .umask = 0x20,
   .event_name = "idq.ms_mite_uops",
   },
  {
   .event_code = {0x79},
   .umask = 0x24,
   .event_name = "idq.all_mite_cycles_any_uops",
   },
  {
   .event_code = {0x79},
   .umask = 0x24,
   .event_name = "idq.all_mite_cycles_4_uops",
   },
  {
   .event_code = {0x79},
   .umask = 0x30,
   .event_name = "idq.ms_cycles",
   },
  {
   .event_code = {0x79},
   .umask = 0x30,
   .event_name = "idq.ms_uops",
   },
  {
   .event_code = {0x79},
   .umask = 0x30,
   .event_name = "idq.ms_switches",
   },
  {
   .event_code = {0x80},
   .umask = 0x04,
   .event_name = "icache_16b.ifdata_stall",
   },
  {
   .event_code = {0x83},
   .umask = 0x01,
   .event_name = "icache_64b.iftag_hit",
   },
  {
   .event_code = {0x83},
   .umask = 0x02,
   .event_name = "icache_64b.iftag_miss",
   },
  {
   .event_code = {0x83},
   .umask = 0x04,
   .event_name = "icache_64b.iftag_stall",
   },
  {
   .event_code = {0x85},
   .umask = 0x01,
   .event_name = "itlb_misses.miss_causes_a_walk",
   },
  {
   .event_code = {0x85},
   .umask = 0x02,
   .event_name = "itlb_misses.walk_completed_4k",
   },
  {
   .event_code = {0x85},
   .umask = 0x04,
   .event_name = "itlb_misses.walk_completed_2m_4m",
   },
  {
   .event_code = {0x85},
   .umask = 0x08,
   .event_name = "itlb_misses.walk_completed_1g",
   },
  {
   .event_code = {0x85},
   .umask = 0x0E,
   .event_name = "itlb_misses.walk_completed",
   },
  {
   .event_code = {0x85},
   .umask = 0x10,
   .event_name = "itlb_misses.walk_pending",
   },
  {
   .event_code = {0x85},
   .umask = 0x10,
   .event_name = "itlb_misses.walk_active",
   },
  {
   .event_code = {0x85},
   .umask = 0x20,
   .event_name = "itlb_misses.stlb_hit",
   },
  {
   .event_code = {0x87},
   .umask = 0x01,
   .event_name = "ild_stall.lcp",
   },
  {
   .event_code = {0x9C},
   .umask = 0x01,
   .event_name = "idq_uops_not_delivered.cycles_fe_was_ok",
   },
  {
   .event_code = {0x9C},
   .umask = 0x01,
   .event_name = "idq_uops_not_delivered.cycles_le_3_uop_deliv.core",
   },
  {
   .event_code = {0x9C},
   .umask = 0x01,
   .event_name = "idq_uops_not_delivered.cycles_le_2_uop_deliv.core",
   },
  {
   .event_code = {0x9C},
   .umask = 0x01,
   .event_name = "idq_uops_not_delivered.cycles_le_1_uop_deliv.core",
   },
  {
   .event_code = {0x9C},
   .umask = 0x01,
   .event_name = "idq_uops_not_delivered.cycles_0_uops_deliv.core",
   },
  {
   .event_code = {0x9C},
   .umask = 0x01,
   .event_name = "idq_uops_not_delivered.core",
   },
  {
   .event_code = {0xA1},
   .umask = 0x01,
   .event_name = "uops_dispatched_port.port_0",
   },
  {
   .event_code = {0xA1},
   .umask = 0x02,
   .event_name = "uops_dispatched_port.port_1",
   },
  {
   .event_code = {0xA1},
   .umask = 0x04,
   .event_name = "uops_dispatched_port.port_2",
   },
  {
   .event_code = {0xA1},
   .umask = 0x08,
   .event_name = "uops_dispatched_port.port_3",
   },
  {
   .event_code = {0xA1},
   .umask = 0x10,
   .event_name = "uops_dispatched_port.port_4",
   },
  {
   .event_code = {0xA1},
   .umask = 0x20,
   .event_name = "uops_dispatched_port.port_5",
   },
  {
   .event_code = {0xA1},
   .umask = 0x40,
   .event_name = "uops_dispatched_port.port_6",
   },
  {
   .event_code = {0xA1},
   .umask = 0x80,
   .event_name = "uops_dispatched_port.port_7",
   },
  {
   .event_code = {0xa2},
   .umask = 0x01,
   .event_name = "resource_stalls.any",
   },
  {
   .event_code = {0xA2},
   .umask = 0x08,
   .event_name = "resource_stalls.sb",
   },
  {
   .event_code = {0xA3},
   .umask = 0x01,
   .event_name = "cycle_activity.cycles_l2_miss",
   },
  {
   .event_code = {0xA3},
   .umask = 0x04,
   .event_name = "cycle_activity.stalls_total",
   },
  {
   .event_code = {0xA3},
   .umask = 0x05,
   .event_name = "cycle_activity.stalls_l2_miss",
   },
  {
   .event_code = {0xA3},
   .umask = 0x08,
   .event_name = "cycle_activity.cycles_l1d_miss",
   },
  {
   .event_code = {0xA3},
   .umask = 0x0C,
   .event_name = "cycle_activity.stalls_l1d_miss",
   },
  {
   .event_code = {0xA3},
   .umask = 0x10,
   .event_name = "cycle_activity.cycles_mem_any",
   },
  {
   .event_code = {0xA3},
   .umask = 0x14,
   .event_name = "cycle_activity.stalls_mem_any",
   },
  {
   .event_code = {0xA6},
   .umask = 0x01,
   .event_name = "exe_activity.exe_bound_0_ports",
   },
  {
   .event_code = {0xA6},
   .umask = 0x02,
   .event_name = "exe_activity.1_ports_util",
   },
  {
   .event_code = {0xA6},
   .umask = 0x04,
   .event_name = "exe_activity.2_ports_util",
   },
  {
   .event_code = {0xA6},
   .umask = 0x08,
   .event_name = "exe_activity.3_ports_util",
   },
  {
   .event_code = {0xA6},
   .umask = 0x10,
   .event_name = "exe_activity.4_ports_util",
   },
  {
   .event_code = {0xA6},
   .umask = 0x40,
   .event_name = "exe_activity.bound_on_stores",
   },
  {
   .event_code = {0xA8},
   .umask = 0x01,
   .event_name = "lsd.uops",
   },
  {
   .event_code = {0xA8},
   .umask = 0x01,
   .event_name = "lsd.cycles_4_uops",
   },
  {
   .event_code = {0xA8},
   .umask = 0x01,
   .event_name = "lsd.cycles_active",
   },
  {
   .event_code = {0xAB},
   .umask = 0x02,
   .event_name = "dsb2mite_switches.penalty_cycles",
   },
  {
   .event_code = {0xAE},
   .umask = 0x01,
   .event_name = "itlb.itlb_flush",
   },
  {
   .event_code = {0xB0},
   .umask = 0x01,
   .event_name = "offcore_requests.demand_data_rd",
   },
  {
   .event_code = {0xB0},
   .umask = 0x02,
   .event_name = "offcore_requests.demand_code_rd",
   },
  {
   .event_code = {0xB0},
   .umask = 0x04,
   .event_name = "offcore_requests.demand_rfo",
   },
  {
   .event_code = {0xB0},
   .umask = 0x08,
   .event_name = "offcore_requests.all_data_rd",
   },
  {
   .event_code = {0xB0},
   .umask = 0x10,
   .event_name = "offcore_requests.l3_miss_demand_data_rd",
   },
  {
   .event_code = {0xB0},
   .umask = 0x80,
   .event_name = "offcore_requests.all_requests",
   },
  {
   .event_code = {0xB1},
   .umask = 0x01,
   .event_name = "uops_executed.cycles_ge_4_uops_exec",
   },
  {
   .event_code = {0xB1},
   .umask = 0x01,
   .event_name = "uops_executed.cycles_ge_3_uops_exec",
   },
  {
   .event_code = {0xB1},
   .umask = 0x01,
   .event_name = "uops_executed.cycles_ge_2_uops_exec",
   },
  {
   .event_code = {0xB1},
   .umask = 0x01,
   .event_name = "uops_executed.cycles_ge_1_uop_exec",
   },
  {
   .event_code = {0xB1},
   .umask = 0x01,
   .event_name = "uops_executed.stall_cycles",
   },
  {
   .event_code = {0xB1},
   .umask = 0x01,
   .event_name = "uops_executed.thread",
   },
  {
   .event_code = {0xB1},
   .umask = 0x02,
   .event_name = "uops_executed.core",
   },
  {
   .event_code = {0xB1},
   .umask = 0x02,
   .event_name = "uops_executed.core_cycles_none",
   },
  {
   .event_code = {0xB1},
   .umask = 0x02,
   .event_name = "uops_executed.core_cycles_ge_4",
   },
  {
   .event_code = {0xB1},
   .umask = 0x02,
   .event_name = "uops_executed.core_cycles_ge_3",
   },
  {
   .event_code = {0xB1},
   .umask = 0x02,
   .event_name = "uops_executed.core_cycles_ge_2",
   },
  {
   .event_code = {0xB1},
   .umask = 0x02,
   .event_name = "uops_executed.core_cycles_ge_1",
   },
  {
   .event_code = {0xB1},
   .umask = 0x10,
   .event_name = "uops_executed.x87",
   },
  {
   .event_code = {0xB2},
   .umask = 0x01,
   .event_name = "offcore_requests_buffer.sq_full",
   },
  {
   .event_code = {0xB7, 0xBB},
   .umask = 0x01,
   .event_name = "offcore_response",
   },
  {
   .event_code = {0xBD},
   .umask = 0x01,
   .event_name = "tlb_flush.dtlb_thread",
   },
  {
   .event_code = {0xBD},
   .umask = 0x20,
   .event_name = "tlb_flush.stlb_any",
   },
  {
   .event_code = {0xC0},
   .umask = 0x00,
   .event_name = "inst_retired.any_p",
   },
  {
   .event_code = {0xC0},
   .umask = 0x01,
   .event_name = "inst_retired.prec_dist",
   },
  {
   .event_code = {0xC0},
   .umask = 0x01,
   .event_name = "inst_retired.total_cycles_ps",
   },
  {
   .event_code = {0xC2},
   .umask = 0x02,
   .event_name = "uops_retired.total_cycles",
   },
  {
   .event_code = {0xC2},
   .umask = 0x02,
   .event_name = "uops_retired.stall_cycles",
   },
  {
   .event_code = {0xC2},
   .umask = 0x02,
   .event_name = "uops_retired.retire_slots",
   },
  {
   .event_code = {0xC3},
   .umask = 0x01,
   .event_name = "machine_clears.count",
   },
  {
   .event_code = {0xC3},
   .umask = 0x02,
   .event_name = "machine_clears.memory_ordering",
   },
  {
   .event_code = {0xC3},
   .umask = 0x04,
   .event_name = "machine_clears.smc",
   },
  {
   .event_code = {0xC4},
   .umask = 0x00,
   .event_name = "br_inst_retired.all_branches",
   },
  {
   .event_code = {0xC4},
   .umask = 0x01,
   .event_name = "br_inst_retired.conditional",
   },
  {
   .event_code = {0xC4},
   .umask = 0x02,
   .event_name = "br_inst_retired.near_call",
   },
  {
   .event_code = {0xC4},
   .umask = 0x04,
   .event_name = "br_inst_retired.all_branches_pebs",
   },
  {
   .event_code = {0xC4},
   .umask = 0x08,
   .event_name = "br_inst_retired.near_return",
   },
  {
   .event_code = {0xC4},
   .umask = 0x10,
   .event_name = "br_inst_retired.not_taken",
   },
  {
   .event_code = {0xC4},
   .umask = 0x20,
   .event_name = "br_inst_retired.near_taken",
   },
  {
   .event_code = {0xC4},
   .umask = 0x40,
   .event_name = "br_inst_retired.far_branch",
   },
  {
   .event_code = {0xC5},
   .umask = 0x00,
   .event_name = "br_misp_retired.all_branches",
   },
  {
   .event_code = {0xC5},
   .umask = 0x01,
   .event_name = "br_misp_retired.conditional",
   },
  {
   .event_code = {0xC5},
   .umask = 0x02,
   .event_name = "br_misp_retired.near_call",
   },
  {
   .event_code = {0xC5},
   .umask = 0x04,
   .event_name = "br_misp_retired.all_branches_pebs",
   },
  {
   .event_code = {0xC5},
   .umask = 0x20,
   .event_name = "br_misp_retired.near_taken",
   },
  {
   .event_code = {0xC7},
   .umask = 0x01,
   .event_name = "fp_arith_inst_retired.scalar_double",
   },
  {
   .event_code = {0xC7},
   .umask = 0x02,
   .event_name = "fp_arith_inst_retired.scalar_single",
   },
  {
   .event_code = {0xC7},
   .umask = 0x04,
   .event_name = "fp_arith_inst_retired.128b_packed_double",
   },
  {
   .event_code = {0xC7},
   .umask = 0x08,
   .event_name = "fp_arith_inst_retired.128b_packed_single",
   },
  {
   .event_code = {0xC7},
   .umask = 0x10,
   .event_name = "fp_arith_inst_retired.256b_packed_double",
   },
  {
   .event_code = {0xC7},
   .umask = 0x20,
   .event_name = "fp_arith_inst_retired.256b_packed_single",
   },
  {
   .event_code = {0xC7},
   .umask = 0x40,
   .event_name = "fp_arith_inst_retired.512b_packed_double",
   },
  {
   .event_code = {0xC7},
   .umask = 0x80,
   .event_name = "fp_arith_inst_retired.512b_packed_single",
   },
  {
   .event_code = {0xC8},
   .umask = 0x01,
   .event_name = "hle_retired.start",
   },
  {
   .event_code = {0xC8},
   .umask = 0x02,
   .event_name = "hle_retired.commit",
   },
  {
   .event_code = {0xC8},
   .umask = 0x04,
   .event_name = "hle_retired.aborted",
   },
  {
   .event_code = {0xC8},
   .umask = 0x08,
   .event_name = "hle_retired.aborted_mem",
   },
  {
   .event_code = {0xC8},
   .umask = 0x10,
   .event_name = "hle_retired.aborted_timer",
   },
  {
   .event_code = {0xC8},
   .umask = 0x20,
   .event_name = "hle_retired.aborted_unfriendly",
   },
  {
   .event_code = {0xC8},
   .umask = 0x40,
   .event_name = "hle_retired.aborted_memtype",
   },
  {
   .event_code = {0xC8},
   .umask = 0x80,
   .event_name = "hle_retired.aborted_events",
   },
  {
   .event_code = {0xC9},
   .umask = 0x01,
   .event_name = "rtm_retired.start",
   },
  {
   .event_code = {0xC9},
   .umask = 0x02,
   .event_name = "rtm_retired.commit",
   },
  {
   .event_code = {0xC9},
   .umask = 0x04,
   .event_name = "rtm_retired.aborted",
   },
  {
   .event_code = {0xC9},
   .umask = 0x08,
   .event_name = "rtm_retired.aborted_mem",
   },
  {
   .event_code = {0xC9},
   .umask = 0x10,
   .event_name = "rtm_retired.aborted_timer",
   },
  {
   .event_code = {0xC9},
   .umask = 0x20,
   .event_name = "rtm_retired.aborted_unfriendly",
   },
  {
   .event_code = {0xC9},
   .umask = 0x40,
   .event_name = "rtm_retired.aborted_memtype",
   },
  {
   .event_code = {0xC9},
   .umask = 0x80,
   .event_name = "rtm_retired.aborted_events",
   },
  {
   .event_code = {0xCA},
   .umask = 0x1E,
   .event_name = "fp_assist.any",
   },
  {
   .event_code = {0xCB},
   .umask = 0x01,
   .event_name = "hw_interrupts.received",
   },
  {
   .event_code = {0xCC},
   .umask = 0x20,
   .event_name = "rob_misc_events.lbr_inserts",
   },
  {
   .event_code = {0xCC},
   .umask = 0x40,
   .event_name = "rob_misc_events.pause_inst",
   },
  {
   .event_code = {0xD0},
   .umask = 0x11,
   .event_name = "mem_inst_retired.stlb_miss_loads",
   },
  {
   .event_code = {0xD0},
   .umask = 0x12,
   .event_name = "mem_inst_retired.stlb_miss_stores",
   },
  {
   .event_code = {0xD0},
   .umask = 0x21,
   .event_name = "mem_inst_retired.lock_loads",
   },
  {
   .event_code = {0xD0},
   .umask = 0x41,
   .event_name = "mem_inst_retired.split_loads",
   },
  {
   .event_code = {0xD0},
   .umask = 0x42,
   .event_name = "mem_inst_retired.split_stores",
   },
  {
   .event_code = {0xD0},
   .umask = 0x81,
   .event_name = "mem_inst_retired.all_loads",
   },
  {
   .event_code = {0xD0},
   .umask = 0x82,
   .event_name = "mem_inst_retired.all_stores",
   },
  {
   .event_code = {0xD1},
   .umask = 0x01,
   .event_name = "mem_load_retired.l1_hit",
   },
  {
   .event_code = {0xD1},
   .umask = 0x02,
   .event_name = "mem_load_retired.l2_hit",
   },
  {
   .event_code = {0xD1},
   .umask = 0x04,
   .event_name = "mem_load_retired.l3_hit",
   },
  {
   .event_code = {0xD1},
   .umask = 0x08,
   .event_name = "mem_load_retired.l1_miss",
   },
  {
   .event_code = {0xD1},
   .umask = 0x10,
   .event_name = "mem_load_retired.l2_miss",
   },
  {
   .event_code = {0xD1},
   .umask = 0x20,
   .event_name = "mem_load_retired.l3_miss",
   },
  {
   .event_code = {0xD1},
   .umask = 0x40,
   .event_name = "mem_load_retired.fb_hit",
   },
  {
   .event_code = {0xD1},
   .umask = 0x80,
   .event_name = "mem_load_retired.local_pmm",
   },
  {
   .event_code = {0xD2},
   .umask = 0x01,
   .event_name = "mem_load_l3_hit_retired.xsnp_miss",
   },
  {
   .event_code = {0xD2},
   .umask = 0x02,
   .event_name = "mem_load_l3_hit_retired.xsnp_hit",
   },
  {
   .event_code = {0xD2},
   .umask = 0x04,
   .event_name = "mem_load_l3_hit_retired.xsnp_hitm",
   },
  {
   .event_code = {0xD2},
   .umask = 0x08,
   .event_name = "mem_load_l3_hit_retired.xsnp_none",
   },
  {
   .event_code = {0xD3},
   .umask = 0x01,
   .event_name = "mem_load_l3_miss_retired.local_dram",
   },
  {
   .event_code = {0xD3},
   .umask = 0x02,
   .event_name = "mem_load_l3_miss_retired.remote_dram",
   },
  {
   .event_code = {0xD3},
   .umask = 0x04,
   .event_name = "mem_load_l3_miss_retired.remote_hitm",
   },
  {
   .event_code = {0xD3},
   .umask = 0x08,
   .event_name = "mem_load_l3_miss_retired.remote_fwd",
   },
  {
   .event_code = {0xD3},
   .umask = 0x10,
   .event_name = "mem_load_l3_miss_retired.remote_pmm",
   },
  {
   .event_code = {0xD4},
   .umask = 0x04,
   .event_name = "mem_load_misc_retired.uc",
   },
  {
   .event_code = {0xE6},
   .umask = 0x01,
   .event_name = "baclears.any",
   },
  {
   .event_code = {0xEF},
   .umask = 0x01,
   .event_name = "core_snoop_response.rsp_ihiti",
   },
  {
   .event_code = {0xEF},
   .umask = 0x02,
   .event_name = "core_snoop_response.rsp_ihitfse",
   },
  {
   .event_code = {0xEF},
   .umask = 0x04,
   .event_name = "core_snoop_response.rsp_shitfse",
   },
  {
   .event_code = {0xEF},
   .umask = 0x08,
   .event_name = "core_snoop_response.rsp_sfwdm",
   },
  {
   .event_code = {0xEF},
   .umask = 0x10,
   .event_name = "core_snoop_response.rsp_ifwdm",
   },
  {
   .event_code = {0xEF},
   .umask = 0x20,
   .event_name = "core_snoop_response.rsp_ifwdfe",
   },
  {
   .event_code = {0xEF},
   .umask = 0x40,
   .event_name = "core_snoop_response.rsp_sfwdfe",
   },
  {
   .event_code = {0xF0},
   .umask = 0x40,
   .event_name = "l2_trans.l2_wb",
   },
  {
   .event_code = {0xF1},
   .umask = 0x1F,
   .event_name = "l2_lines_in.all",
   },
  {
   .event_code = {0xF2},
   .umask = 0x01,
   .event_name = "l2_lines_out.silent",
   },
  {
   .event_code = {0xF2},
   .umask = 0x02,
   .event_name = "l2_lines_out.non_silent",
   },
  {
   .event_code = {0xF2},
   .umask = 0x04,
   .event_name = "l2_lines_out.useless_pref",
   },
  {
   .event_code = {0xF2},
   .umask = 0x04,
   .event_name = "l2_lines_out.useless_hwpf",
   },
  {
   .event_code = {0xF4},
   .umask = 0x10,
   .event_name = "sq_misc.split_lock",
   },
  {
   .event_code = {0xFE},
   .umask = 0x02,
   .event_name = "idi_misc.wb_upgrade",
   },
  {
   .event_code = {0xFE},
   .umask = 0x04,
   .event_name = "idi_misc.wb_downgrade",
   },
  {
   .event_name = 0,
   },
};

PERFMON_REGISTER_INTEL_PMC (cpu_model_table, event_table);