/*
 *------------------------------------------------------------------
 * map_api.c - vnet map api
 *
 * Copyright (c) 2016 Cisco and/or its affiliates.
 * Licensed under the Apache License, Version 2.0 (the "License");
 * you may not use this file except in compliance with the License.
 * You may obtain a copy of the License at:
 *
 *     http://www.apache.org/licenses/LICENSE-2.0
 *
 * Unless required by applicable law or agreed to in writing, software
 * distributed under the License is distributed on an "AS IS" BASIS,
 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 * See the License for the specific language governing permissions and
 * limitations under the License.
 *------------------------------------------------------------------
 */

#include <vnet/vnet.h>
#include <vlibmemory/api.h>

#include "map.h"
#include <vnet/api_errno.h>
#include <vnet/ip/ip.h>
#include <vnet/fib/fib_table.h>
#include <vnet/vnet_msg_enum.h>

#define vl_typedefs		/* define message structures */
#include <vnet/vnet_all_api_h.h>
#undef vl_typedefs

#define vl_endianfun		/* define message structures */
#include <vnet/vnet_all_api_h.h>
#undef vl_endianfun

/* instantiate all the print functions we know about */
#define vl_print(handle, ...) vlib_cli_output (handle, __VA_ARGS__)
#define vl_printfun
#include <vnet/vnet_all_api_h.h>
#undef vl_printfun

#include <vlibapi/api_helper_macros.h>

#define foreach_vpe_api_msg			\
_(MAP_ADD_DOMAIN, map_add_domain)		\
_(MAP_DEL_DOMAIN, map_del_domain)		\
_(MAP_ADD_DEL_RULE, map_add_del_rule)		\
_(MAP_DOMAIN_DUMP, map_domain_dump)		\
_(MAP_RULE_DUMP, map_rule_dump)			\
_(MAP_SUMMARY_STATS, map_summary_stats)

static void
vl_api_map_add_domain_t_handler (vl_api_map_add_domain_t * mp)
{
  vl_api_map_add_domain_reply_t *rmp;
  int rv = 0;
  u32 index;
  u8 flags = 0;

  if (mp->is_translation)
    flags |= MAP_DOMAIN_TRANSLATION;

  if (mp->is_rfc6052)
    flags |= MAP_DOMAIN_RFC6052;

  rv =
    map_create_domain ((ip4_address_t *) & mp->ip4_prefix, mp->ip4_prefix_len,
		       (ip6_address_t *) & mp->ip6_prefix, mp->ip6_prefix_len,
		       (ip6_address_t *) & mp->ip6_src,
		       mp->ip6_src_prefix_len, mp->ea_bits_len,
		       mp->psid_offset, mp->psid_length, &index,
		       ntohs (mp->mtu), flags);

  /* *INDENT-OFF* */
  REPLY_MACRO2(VL_API_MAP_ADD_DOMAIN_REPLY,
  ({
    rmp->index = ntohl(index);
  }));
  /* *INDENT-ON* */
}

static void
vl_api_map_del_domain_t_handler (vl_api_map_del_domain_t * mp)
{
  vl_api_map_del_domain_reply_t *rmp;
  int rv = 0;

  rv = map_delete_domain (ntohl (mp->index));

  REPLY_MACRO (VL_API_MAP_DEL_DOMAIN_REPLY);
}

static void
vl_api_map_add_del_rule_t_handler (vl_api_map_add_del_rule_t * mp)
{
  vl_api_map_del_domain_reply_t *rmp;
  int rv = 0;

  rv =
    map_add_del_psid (ntohl (mp->index), ntohs (mp->psid),
		      (ip6_address_t *) mp->ip6_dst, mp->is_add);

  REPLY_MACRO (VL_API_MAP_ADD_DEL_RULE_REPLY);
}

static void
vl_api_map_domain_dump_t_handler (vl_api_map_domain_dump_t * mp)
{
  vl_api_map_domain_details_t *rmp;
  map_main_t *mm = &map_main;
  map_domain_t *d;
  unix_shared_memory_queue_t *q;

  if (pool_elts (mm->domains) == 0)
    return;

  q = vl_api_client_index_to_input_queue (mp->client_index);
  if (q == 0)
    {
      return;
    }

  /* *INDENT-OFF* */
  pool_foreach(d, mm->domains,
  ({
    /* Make sure every field is initiated (or don't skip the memset()) */
    rmp = vl_msg_api_alloc (sizeof (*rmp));
    rmp->_vl_msg_id = ntohs(VL_API_MAP_DOMAIN_DETAILS);
    rmp->domain_index = htonl(d - mm->domains);
    rmp->ea_bits_len = d->ea_bits_len;
    rmp->psid_offset = d->psid_offset;
    rmp->psid_length = d->psid_length;
    clib_memcpy(rmp->ip4_prefix, &d->ip4_prefix, sizeof(rmp->ip4_prefix));
    rmp->ip4_prefix_len = d->ip4_prefix_len;
    clib_memcpy(rmp->ip6_prefix, &d->ip6_prefix, sizeof(rmp->ip6_prefix));
    rmp->ip6_prefix_len = d->ip6_prefix_len;
    clib_memcpy(rmp->ip6_src, &d->ip6_src, sizeof(rmp->ip6_src));
    rmp->ip6_src_len = d->ip6_src_len;
    rmp->mtu = htons(d->mtu);
    rmp->is_translation = (d->flags & MAP_DOMAIN_TRANSLATION);
    rmp->context = mp->context;

    vl_msg_api_send_shmem (q, (u8 *)&rmp);
  }));
  /* *INDENT-ON* */
}

static void
vl_api_map_rule_dump_t_handler (vl_api_map_rule_dump_t * mp)
{
  unix_shared_memory_queue_t *q;
  u16 i;
  ip6_address_t dst;
  vl_api_map_rule_details_t *rmp;
  map_main_t *mm = &map_main;
  u32 domain_index = ntohl (mp->domain_index);
  map_domain_t *d;

  if (pool_elts (mm->domains) == 0)
    return;

  d = pool_elt_at_index (mm->domains, domain_index);
  if (!d || !d->rules)
    {
      return;
    }

  q = vl_api_client_index_to_input_queue (mp->client_index);
  if (q == 0)
    {
      return;
    }

  for (i = 0; i < (0x1 << d->psid_length); i++)
    {
      dst = d->rules[i];
      if (dst.as_u64[0] == 0 && dst.as_u64[1] == 0)
	{
	  continue;
	}
      rmp = vl_msg_api_alloc (sizeof (*rmp));
      memset (rmp, 0, sizeof (*rmp));
      rmp->_vl_msg_id = ntohs (VL_API_MAP_RULE_DETAILS);
      rmp->psid = htons (i);
      clib_memcpy (rmp->ip6_dst, &dst, sizeof (rmp->ip6_dst));
      rmp->context = mp->context;
      vl_msg_api_send_shmem (q, (u8 *) & rmp);
    }
}

static void
vl_api_map_summary_stats_t_handler (vl_api_map_summary_stats_t * mp)
{
  vl_api_map_summary_stats_reply_t *rmp;
  vlib_combined_counter_main_t *cm;
  vlib_counter_t v;
  int i, which;
  u64 total_pkts[VLIB_N_RX_TX];
  u64 total_bytes[VLIB_N_RX_TX];
  map_main_t *mm = &map_main;
  unix_shared_memory_queue_t *q =
    vl_api_client_index_to_input_queue (mp->client_index);

  if (!q)
    return;

  rmp = vl_msg_api_alloc (sizeof (*rmp));
  rmp->_vl_msg_id = ntohs (VL_API_MAP_SUMMARY_STATS_REPLY);
  rmp->context = mp->context;
  rmp->retval = 0;

  if (pool_elts (mm->domains) == 0)
    {
      rmp->retval = -1;
      goto out;
    }

  memset (total_pkts, 0, sizeof (total_pkts));
  memset (total_bytes, 0, sizeof (total_bytes));

  map_domain_counter_lock (mm);
  vec_foreach (cm, mm->domain_counters)
  {
    which = cm - mm->domain_counters;

    for (i = 0; i < vlib_combined_counter_n_counters (cm); i++)
      {
	vlib_get_combined_counter (cm, i, &v
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#include <perfmon/perfmon_intel.h>

static perfmon_intel_pmc_cpu_model_t cpu_model_table[] = {
  {0x2A, 0x00, 0},

};

static perfmon_intel_pmc_event_t event_table[] = {
  {
   .event_code = {0x00},
   .umask = 0x03,
   .event_name = "cpu_clk_unhalted.ref_tsc",
   },
  {
   .event_code = {0x00},
   .umask = 0x01,
   .event_name = "inst_retired.any",
   },
  {
   .event_code = {0x00},
   .umask = 0x02,
   .event_name = "cpu_clk_unhalted.thread",
   },
  {
   .event_code = {0x00},
   .umask = 0x02,
   .event_name = "cpu_clk_unhalted.thread_any",
   },
  {
   .event_code = {0x03},
   .umask = 0x01,
   .event_name = "ld_blocks.data_unknown",
   },
  {
   .event_code = {0x03},
   .umask = 0x02,
   .event_name = "ld_blocks.store_forward",
   },
  {
   .event_code = {0x03},
   .umask = 0x08,
   .event_name = "ld_blocks.no_sr",
   },
  {
   .event_code = {0x03},
   .umask = 0x10,
   .event_name = "ld_blocks.all_block",
   },
  {
   .event_code = {0x05},
   .umask = 0x01,
   .event_name = "misalign_mem_ref.loads",
   },
  {
   .event_code = {0x05},
   .umask = 0x02,
   .event_name = "misalign_mem_ref.stores",
   },
  {
   .event_code = {0x07},
   .umask = 0x01,
   .event_name = "ld_blocks_partial.address_alias",
   },
  {
   .event_code = {0x07},
   .umask = 0x08,
   .event_name = "ld_blocks_partial.all_sta_block",
   },
  {
   .event_code = {0x08},
   .umask = 0x01,
   .event_name = "dtlb_load_misses.miss_causes_a_walk",
   },
  {
   .event_code = {0x08},
   .umask = 0x02,
   .event_name = "dtlb_load_misses.walk_completed",
   },
  {
   .event_code = {0x08},
   .umask = 0x04,
   .event_name = "dtlb_load_misses.walk_duration",
   },
  {
   .event_code = {0x08},
   .umask = 0x10,
   .event_name = "dtlb_load_misses.stlb_hit",
   },
  {
   .event_code = {0x0D},
   .umask = 0x03,
   .event_name = "int_misc.recovery_cycles",
   },
  {
   .event_code = {0x0D},
   .umask = 0x03,
   .event_name = "int_misc.recovery_stalls_count",
   },
  {
   .event_code = {0x0D},
   .umask = 0x03,
   .event_name = "int_misc.recovery_cycles_any",
   },
  {
   .event_code = {0x0D},
   .umask = 0x40,
   .event_name = "int_misc.rat_stall_cycles",
   },
  {
   .event_code = {0x0E},
   .umask = 0x01,
   .event_name = "uops_issued.any",
   },
  {
   .event_code = {0x0E},
   .umask = 0x01,
   .event_name = "uops_issued.stall_cycles",
   },
  {
   .event_code = {0x0E},
   .umask = 0x01,
   .event_name = "uops_issued.core_stall_cycles",
   },
  {
   .event_code = {0x10},
   .umask = 0x01,
   .event_name = "fp_comp_ops_exe.x87",
   },
  {
   .event_code = {0x10},
   .umask = 0x10,
   .event_name = "fp_comp_ops_exe.sse_packed_double",
   },
  {
   .event_code = {0x10},
   .umask = 0x20,
   .event_name = "fp_comp_ops_exe.sse_scalar_single",
   },
  {
   .event_code = {0x10},
   .umask = 0x40,
   .event_name = "fp_comp_ops_exe.sse_packed_single",
   },
  {
   .event_code = {0x10},
   .umask = 0x80,
   .event_name = "fp_comp_ops_exe.sse_scalar_double",
   },
  {
   .event_code = {0x11},
   .umask = 0x01,
   .event_name = "simd_fp_256.packed_single",
   },
  {
   .event_code = {0x11},
   .umask = 0x02,
   .event_name = "simd_fp_256.packed_double",
   },
  {
   .event_code = {0x14},
   .umask = 0x01,
   .event_name = "arith.fpu_div_active",
   },
  {
   .event_code = {0x14},
   .umask = 0x01,
   .event_name = "arith.fpu_div",
   },
  {
   .event_code = {0x17},
   .umask = 0x01,
   .event_name = "insts_written_to_iq.insts",
   },
  {
   .event_code = {0x24},
   .umask = 0x01,
   .event_name = "l2_rqsts.demand_data_rd_hit",
   },
  {
   .event_code = {0x24},
   .umask = 0x03,
   .event_name = "l2_rqsts.all_demand_data_rd",
   },
  {
   .event_code = {0x24},
   .umask = 0x04,
   .event_name = "l2_rqsts.rfo_hit",
   },
  {
   .event_code = {0x24},
   .umask = 0x08,
   .event_name = "l2_rqsts.rfo_miss",
   },
  {
   .event_code = {0x24},
   .umask = 0x0C,
   .event_name = "l2_rqsts.all_rfo",
   },
  {
   .event_code = {0x24},
   .umask = 0x10,
   .event_name = "l2_rqsts.code_rd_hit",
   },
  {
   .event_code = {0x24},
   .umask = 0x20,
   .event_name = "l2_rqsts.code_rd_miss",
   },
  {
   .event_code = {0x24},
   .umask = 0x30,
   .event_name = "l2_rqsts.all_code_rd",
   },
  {
   .event_code = {0x24},
   .umask = 0x40,
   .event_name = "l2_rqsts.pf_hit",
   },
  {
   .event_code = {0x24},
   .umask = 0x80,
   .event_name = "l2_rqsts.pf_miss",
   },
  {
   .event_code = {0x24},
   .umask = 0xC0,
   .event_name = "l2_rqsts.all_pf",
   },
  {
   .event_code = {0x27},
   .umask = 0x01,
   .event_name = "l2_store_lock_rqsts.miss",
   },
  {
   .event_code = {0x27},
   .umask = 0x04,
   .event_name = "l2_store_lock_rqsts.hit_e",
   },
  {
   .event_code = {0x27},
   .umask = 0x08,
   .event_name = "l2_store_lock_rqsts.hit_m",
   },
  {
   .event_code = {0x27},
   .umask = 0x0F,
   .event_name = "l2_store_lock_rqsts.all",
   },
  {
   .event_code = {0x28},
   .umask = 0x01,
   .event_name = "l2_l1d_wb_rqsts.miss",
   },
  {
   .event_code = {0x28},
   .umask = 0x02,
   .event_name = "l2_l1d_wb_rqsts.hit_s",
   },
  {
   .event_code = {0x28},
   .umask = 0x04,
   .event_name = "l2_l1d_wb_rqsts.hit_e",
   },
  {
   .event_code = {0x28},
   .umask = 0x08,
   .event_name = "l2_l1d_wb_rqsts.hit_m",
   },
  {
   .event_code = {0x28},
   .umask = 0x0F,
   .event_name = "l2_l1d_wb_rqsts.all",
   },
  {
   .event_code = {0x2E},
   .umask = 0x41,
   .event_name = "longest_lat_cache.miss",
   },
  {
   .event_code = {0x2E},
   .umask = 0x4F,
   .event_name = "longest_lat_cache.reference",
   },
  {
   .event_code = {0x3C},
   .umask = 0x00,
   .event_name = "cpu_clk_unhalted.thread_p",
   },
  {
   .event_code = {0x3C},
   .umask = 0x00,
   .event_name = "cpu_clk_unhalted.thread_p_any",
   },
  {
   .event_code = {0x3C},
   .umask = 0x01,
   .event_name = "cpu_clk_thread_unhalted.ref_xclk",
   },
  {
   .event_code = {0x3C},
   .umask = 0x02,
   .event_name = "cpu_clk_thread_unhalted.one_thread_active",
   },
  {
   .event_code = {0x48},
   .umask = 0x01,
   .event_name = "l1d_pend_miss.pending",
   },
  {
   .event_code = {0x48},
   .umask = 0x01,
   .event_name = "l1d_pend_miss.pending_cycles",
   },
  {
   .event_code = {0x49},
   .umask = 0x01,
   .event_name = "dtlb_store_misses.miss_causes_a_walk",
   },
  {
   .event_code = {0x49},
   .umask = 0x02,
   .event_name = "dtlb_store_misses.walk_completed",
   },
  {
   .event_code = {0x49},
   .umask = 0x04,
   .event_name = "dtlb_store_misses.walk_duration",
   },
  {
   .event_code = {0x49},
   .umask = 0x10,
   .event_name = "dtlb_store_misses.stlb_hit",
   },
  {
   .event_code = {0x4C},
   .umask = 0x01,
   .event_name = "load_hit_pre.sw_pf",
   },
  {
   .event_code = {0x4C},
   .umask = 0x02,
   .event_name = "load_hit_pre.hw_pf",
   },
  {
   .event_code = {0x4E},
   .umask = 0x02,
   .event_name = "hw_pre_req.dl1_miss",
   },
  {
   .event_code = {0x4F},
   .umask = 0x10,
   .event_name = "ept.walk_cycles",
   },
  {
   .event_code = {0x51},
   .umask = 0x01,
   .event_name = "l1d.replacement",
   },
  {
   .event_code = {0x51},
   .umask = 0x02,
   .event_name = "l1d.allocated_in_m",
   },
  {
   .event_code = {0x51},
   .umask = 0x04,
   .event_name = "l1d.eviction",
   },
  {
   .event_code = {0x51},
   .umask = 0x08,
   .event_name = "l1d.all_m_replacement",
   },
  {
   .event_code = {0x59},
   .umask = 0x20,
   .event_name = "partial_rat_stalls.flags_merge_uop",
   },
  {
   .event_code = {0x59},
   .umask = 0x20,
   .event_name = "partial_rat_stalls.flags_merge_uop_cycles",
   },
  {
   .event_code = {0x59},
   .umask = 0x40,
   .event_name = "partial_rat_stalls.slow_lea_window",
   },
  {
   .event_code = {0x59},
   .umask = 0x80,
   .event_name = "partial_rat_stalls.mul_single_uop",
   },
  {
   .event_code = {0x5B},
   .umask = 0x0C,
   .event_name = "resource_stalls2.all_fl_empty",
   },
  {
   .event_code = {0x5B},
   .umask = 0x0F,
   .event_name = "resource_stalls2.all_prf_control",
   },
  {
   .event_code = {0x5B},
   .umask = 0x40,
   .event_name = "resource_stalls2.bob_full",
   },
  {
   .event_code = {0x5B},
   .umask = 0x4F,
   .event_name = "resource_stalls2.ooo_rsrc",
   },
  {
   .event_code = {0x5C},
   .umask = 0x01,
   .event_name = "cpl_cycles.ring0",
   },
  {
   .event_code = {0x5C},
   .umask = 0x01,
   .event_name = "cpl_cycles.ring0_trans",
   },
  {
   .event_code = {0x5C},
   .umask = 0x02,
   .event_name = "cpl_cycles.ring123",
   },
  {
   .event_code = {0x5E},
   .umask = 0x01,
   .event_name = "rs_events.empty_cycles",
   },
  {
   .event_code = {0x5E},
   .umask = 0x01,
   .event_name = "rs_events.empty_end",
   },
  {
   .event_code = {0x60},
   .umask = 0x01,
   .event_name = "offcore_requests_outstanding.demand_data_rd",
   },
  {
   .event_code = {0x60},
   .umask = 0x01,
   .event_name = "offcore_requests_outstanding.cycles_with_demand_data_rd",
   },
  {
   .event_code = {0x60},
   .umask = 0x04,
   .event_name = "offcore_requests_outstanding.demand_rfo",
   },
  {
   .event_code = {0x60},
   .umask = 0x04,
   .event_name = "offcore_requests_outstanding.cycles_with_demand_rfo",
   },
  {
   .event_code = {0x60},
   .umask = 0x08,
   .event_name = "offcore_requests_outstanding.all_data_rd",
   },
  {
   .event_code = {0x60},
   .umask = 0x08,
   .event_name = "offcore_requests_outstanding.cycles_with_data_rd",
   },
  {
   .event_code = {0x63},
   .umask = 0x01,
   .event_name = "lock_cycles.split_lock_uc_lock_duration",
   },
  {
   .event_code = {0x63},
   .umask = 0x02,
   .event_name = "lock_cycles.cache_lock_duration",
   },
  {
   .event_code = {0x79},
   .umask = 0x02,
   .event_name = "idq.empty",
   },
  {
   .event_code = {0x79},
   .umask = 0x04,
   .event_name = "idq.mite_uops",
   },
  {
   .event_code = {0x79},
   .umask = 0x04,
   .event_name = "idq.mite_cycles",
   },
  {
   .event_code = {0x79},
   .umask = 0x08,
   .event_name = "idq.dsb_uops",
   },
  {
   .event_code = {0x79},
   .umask = 0x08,
   .event_name = "idq.dsb_cycles",
   },
  {
   .event_code = {0x79},
   .umask = 0x10,
   .event_name = "idq.ms_dsb_uops",
   },
  {
   .event_code = {0x79},
   .umask = 0x10,
   .event_name = "idq.ms_dsb_cycles",
   },
  {
   .event_code = {0x79},
   .umask = 0x10,
   .event_name = "idq.ms_dsb_occur",
   },
  {
   .event_code = {0x79},
   .umask = 0x18,
   .event_name = "idq.all_dsb_cycles_4_uops",
   },
  {
   .event_code = {0x79},
   .umask = 0x18,
   .event_name = "idq.all_dsb_cycles_any_uops",
   },
  {
   .event_code = {0x79},
   .umask = 0x20,
   .event_name = "idq.ms_mite_uops",
   },
  {
   .event_code = {0x79},
   .umask = 0x24,
   .event_name = "idq.all_mite_cycles_4_uops",
   },
  {
   .event_code = {0x79},
   .umask = 0x24,
   .event_name = "idq.all_mite_cycles_any_uops",
   },
  {
   .event_code = {0x79},
   .umask = 0x30,
   .event_name = "idq.ms_uops",
   },
  {
   .event_code = {0x79},
   .umask = 0x30,
   .event_name = "idq.ms_cycles",
   },
  {
   .event_code = {0x79},
   .umask = 0x30,
   .event_name = "idq.ms_switches",
   },
  {
   .event_code = {0x79},
   .umask = 0x3c,
   .event_name = "idq.mite_all_uops",
   },
  {
   .event_code = {0x80},
   .umask = 0x01,
   .event_name = "icache.hit",
   },
  {
   .event_code = {0x80},
   .umask = 0x02,
   .event_name = "icache.misses",
   },
  {
   .event_code = {0x85},
   .umask = 0x01,
   .event_name = "itlb_misses.miss_causes_a_walk",
   },
  {
   .event_code = {0x85},
   .umask = 0x02,
   .event_name = "itlb_misses.walk_completed",
   },
  {
   .event_code = {0x85},
   .umask = 0x04,
   .event_name = "itlb_misses.walk_duration",
   },
  {
   .event_code = {0x85},
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   .event_name = "itlb_misses.stlb_hit",
   },
  {
   .event_code = {0x87},
   .umask = 0x01,
   .event_name = "ild_stall.lcp",
   },
  {
   .event_code = {0x87},
   .umask = 0x04,
   .event_name = "ild_stall.iq_full",
   },
  {
   .event_code = {0x88},
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   .event_name = "br_inst_exec.nontaken_conditional",
   },
  {
   .event_code = {0x88},
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   .event_name = "br_inst_exec.taken_conditional",
   },
  {
   .event_code = {0x88},
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   .event_name = "br_inst_exec.taken_direct_jump",
   },
  {
   .event_code = {0x88},
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   .event_name = "br_inst_exec.taken_indirect_jump_non_call_ret",
   },
  {
   .event_code = {0x88},
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   .event_name = "br_inst_exec.taken_indirect_near_return",
   },
  {
   .event_code = {0x88},
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   .event_name = "br_inst_exec.taken_direct_near_call",
   },
  {
   .event_code = {0x88},
   .umask = 0xA0,
   .event_name = "br_inst_exec.taken_indirect_near_call",
   },
  {
   .event_code = {0x88},
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   .event_name = "br_inst_exec.all_conditional",
   },
  {
   .event_code = {0x88},
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   .event_name = "br_inst_exec.all_direct_jmp",
   },
  {
   .event_code = {0x88},
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   .event_name = "br_inst_exec.all_indirect_jump_non_call_ret",
   },
  {
   .event_code = {0x88},
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   .event_name = "br_inst_exec.all_indirect_near_return",
   },
  {
   .event_code = {0x88},
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   .event_name = "br_inst_exec.all_direct_near_call",
   },
  {
   .event_code = {0x88},
   .umask = 0xFF,
   .event_name = "br_inst_exec.all_branches",
   },
  {
   .event_code = {0x89},
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   .event_name = "br_misp_exec.nontaken_conditional",
   },
  {
   .event_code = {0x89},
   .umask = 0x81,
   .event_name = "br_misp_exec.taken_conditional",
   },
  {
   .event_code = {0x89},
   .umask = 0x84,
   .event_name = "br_misp_exec.taken_indirect_jump_non_call_ret",
   },
  {
   .event_code = {0x89},
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   .event_name = "br_misp_exec.taken_return_near",
   },
  {
   .event_code = {0x89},
   .umask = 0x90,
   .event_name = "br_misp_exec.taken_direct_near_call",
   },
  {
   .event_code = {0x89},
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   .event_name = "br_misp_exec.taken_indirect_near_call",
   },
  {
   .event_code = {0x89},
   .umask = 0xC1,
   .event_name = "br_misp_exec.all_conditional",
   },
  {
   .event_code = {0x89},
   .umask = 0xC4,
   .event_name = "br_misp_exec.all_indirect_jump_non_call_ret",
   },
  {
   .event_code = {0x89},
   .umask = 0xD0,
   .event_name = "br_misp_exec.all_direct_near_call",
   },
  {
   .event_code = {0x89},
   .umask = 0xFF,
   .event_name = "br_misp_exec.all_branches",
   },
  {
   .event_code = {0x9C},
   .umask = 0x01,
   .event_name = "idq_uops_not_delivered.core",
   },
  {
   .event_code = {0x9C},
   .umask = 0x01,
   .event_name = "idq_uops_not_delivered.cycles_0_uops_deliv.core",
   },
  {
   .event_code = {0x9C},
   .umask = 0x01,
   .event_name = "idq_uops_not_delivered.cycles_le_1_uop_deliv.core",
   },
  {
   .event_code = {0x9C},
   .umask = 0x01,
   .event_name = "idq_uops_not_delivered.cycles_le_2_uop_deliv.core",
   },
  {
   .event_code = {0x9C},
   .umask = 0x01,
   .event_name = "idq_uops_not_delivered.cycles_le_3_uop_deliv.core",
   },
  {
   .event_code = {0x9C},
   .umask = 0x01,
   .event_name = "idq_uops_not_delivered.cycles_ge_1_uop_deliv.core",
   },
  {
   .event_code = {0x9C},
   .umask = 0x01,
   .event_name = "idq_uops_not_delivered.cycles_fe_was_ok",
   },
  {
   .event_code = {0xA1},
   .umask = 0x01,
   .event_name = "uops_dispatched_port.port_0",
   },
  {
   .event_code = {0xA1},
   .umask = 0x01,
   .event_name = "uops_dispatched_port.port_0_core",
   },
  {
   .event_code = {0xA1},
   .umask = 0x02,
   .event_name = "uops_dispatched_port.port_1",
   },
  {
   .event_code = {0xA1},
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   .event_name = "uops_dispatched_port.port_1_core",
   },
  {
   .event_code = {0xA1},
   .umask = 0x0C,
   .event_name = "uops_dispatched_port.port_2",
   },
  {
   .event_code = {0xA1},
   .umask = 0x0C,
   .event_name = "uops_dispatched_port.port_2_core",
   },
  {
   .event_code = {0xA1},
   .umask = 0x30,
   .event_name = "uops_dispatched_port.port_3",
   },
  {
   .event_code = {0xA1},
   .umask = 0x30,
   .event_name = "uops_dispatched_port.port_3_core",
   },
  {
   .event_code = {0xA1},
   .umask = 0x40,
   .event_name = "uops_dispatched_port.port_4",
   },
  {
   .event_code = {0xA1},
   .umask = 0x40,
   .event_name = "uops_dispatched_port.port_4_core",
   },
  {
   .event_code = {0xA1},
   .umask = 0x80,
   .event_name = "uops_dispatched_port.port_5",
   },
  {
   .event_code = {0xA1},
   .umask = 0x80,
   .event_name = "uops_dispatched_port.port_5_core",
   },
  {
   .event_code = {0xA2},
   .umask = 0x01,
   .event_name = "resource_stalls.any",
   },
  {
   .event_code = {0xA2},
   .umask = 0x02,
   .event_name = "resource_stalls.lb",
   },
  {
   .event_code = {0xA2},
   .umask = 0x04,
   .event_name = "resource_stalls.rs",
   },
  {
   .event_code = {0xA2},
   .umask = 0x08,
   .event_name = "resource_stalls.sb",
   },
  {
   .event_code = {0xA2},
   .umask = 0x0A,
   .event_name = "resource_stalls.lb_sb",
   },
  {
   .event_code = {0xA2},
   .umask = 0x0E,
   .event_name = "resource_stalls.mem_rs",
   },
  {
   .event_code = {0xA2},
   .umask = 0x10,
   .event_name = "resource_stalls.rob",
   },
  {
   .event_code = {0xA2},
   .umask = 0xF0,
   .event_name = "resource_stalls.ooo_rsrc",
   },
  {
   .event_code = {0xA3},
   .umask = 0x01,
   .event_name = "cycle_activity.cycles_l2_pending",
   },
  {
   .event_code = {0xA3},
   .umask = 0x02,
   .event_name = "cycle_activity.cycles_l1d_pending",
   },
  {
   .event_code = {0xA3},
   .umask = 0x04,
   .event_name = "cycle_activity.cycles_no_dispatch",
   },
  {
   .event_code = {0xA3},
   .umask = 0x05,
   .event_name = "cycle_activity.stalls_l2_pending",
   },
  {
   .event_code = {0xA3},
   .umask = 0x06,
   .event_name = "cycle_activity.stalls_l1d_pending",
   },
  {
   .event_code = {0xA8},
   .umask = 0x01,
   .event_name = "lsd.uops",
   },
  {
   .event_code = {0xA8},
   .umask = 0x01,
   .event_name = "lsd.cycles_active",
   },
  {
   .event_code = {0xA8},
   .umask = 0x01,
   .event_name = "lsd.cycles_4_uops",
   },
  {
   .event_code = {0xAB},
   .umask = 0x01,
   .event_name = "dsb2mite_switches.count",
   },
  {
   .event_code = {0xAB},
   .umask = 0x02,
   .event_name = "dsb2mite_switches.penalty_cycles",
   },
  {
   .event_code = {0xAC},
   .umask = 0x02,
   .event_name = "dsb_fill.other_cancel",
   },
  {
   .event_code = {0xAC},
   .umask = 0x08,
   .event_name = "dsb_fill.exceed_dsb_lines",
   },
  {
   .event_code = {0xAC},
   .umask = 0x0A,
   .event_name = "dsb_fill.all_cancel",
   },
  {
   .event_code = {0xAE},
   .umask = 0x01,
   .event_name = "itlb.itlb_flush",
   },
  {
   .event_code = {0xB0},
   .umask = 0x01,
   .event_name = "offcore_requests.demand_data_rd",
   },
  {
   .event_code = {0xB0},
   .umask = 0x02,
   .event_name = "offcore_requests.demand_code_rd",
   },
  {
   .event_code = {0xB0},
   .umask = 0x04,
   .event_name = "offcore_requests.demand_rfo",
   },
  {
   .event_code = {0xB0},
   .umask = 0x08,
   .event_name = "offcore_requests.all_data_rd",
   },
  {
   .event_code = {0xB1},
   .umask = 0x01,
   .event_name = "uops_dispatched.thread",
   },
  {
   .event_code = {0xB1},
   .umask = 0x02,
   .event_name = "uops_dispatched.core",
   },
  {
   .event_code = {0xB2},
   .umask = 0x01,
   .event_name = "offcore_requests_buffer.sq_full",
   },
  {
   .event_code = {0xB6},
   .umask = 0x01,
   .event_name = "agu_bypass_cancel.count",
   },
  {
   .event_code = {0xBD},
   .umask = 0x01,
   .event_name = "tlb_flush.dtlb_thread",
   },
  {
   .event_code = {0xBD},
   .umask = 0x20,
   .event_name = "tlb_flush.stlb_any",
   },
  {
   .event_code = {0xBE},
   .umask = 0x01,
   .event_name = "page_walks.llc_miss",
   },
  {
   .event_code = {0xBF},
   .umask = 0x05,
   .event_name = "l1d_blocks.bank_conflict_cycles",
   },
  {
   .event_code = {0xC0},
   .umask = 0x00,
   .event_name = "inst_retired.any_p",
   },
  {
   .event_code = {0xC0},
   .umask = 0x01,
   .event_name = "inst_retired.prec_dist",
   },
  {
   .event_code = {0xC1},
   .umask = 0x02,
   .event_name = "other_assists.itlb_miss_retired",
   },
  {
   .event_code = {0xC1},
   .umask = 0x08,
   .event_name = "other_assists.avx_store",
   },
  {
   .event_code = {0xC1},
   .umask = 0x10,
   .event_name = "other_assists.avx_to_sse",
   },
  {
   .event_code = {0xC1},
   .umask = 0x20,
   .event_name = "other_assists.sse_to_avx",
   },
  {
   .event_code = {0xC2},
   .umask = 0x01,
   .event_name = "uops_retired.all",
   },
  {
   .event_code = {0xC2},
   .umask = 0x01,
   .event_name = "uops_retired.stall_cycles",
   },
  {
   .event_code = {0xC2},
   .umask = 0x01,
   .event_name = "uops_retired.total_cycles",
   },
  {
   .event_code = {0xC2},
   .umask = 0x01,
   .event_name = "uops_retired.core_stall_cycles",
   },
  {
   .event_code = {0xC2},
   .umask = 0x02,
   .event_name = "uops_retired.retire_slots",
   },
  {
   .event_code = {0xc3},
   .umask = 0x01,
   .event_name = "machine_clears.count",
   },
  {
   .event_code = {0xC3},
   .umask = 0x02,
   .event_name = "machine_clears.memory_ordering",
   },
  {
   .event_code = {0xC3},
   .umask = 0x04,
   .event_name = "machine_clears.smc",
   },
  {
   .event_code = {0xC3},
   .umask = 0x20,
   .event_name = "machine_clears.maskmov",
   },
  {
   .event_code = {0xC4},
   .umask = 0x00,
   .event_name = "br_inst_retired.all_branches",
   },
  {
   .event_code = {0xC4},
   .umask = 0x01,
   .event_name = "br_inst_retired.conditional",
   },
  {
   .event_code = {0xC4},
   .umask = 0x02,
   .event_name = "br_inst_retired.near_call",
   },
  {
   .event_code = {0xC4},
   .umask = 0x02,
   .event_name = "br_inst_retired.near_call_r3",
   },
  {
   .event_code = {0xC4},
   .umask = 0x04,
   .event_name = "br_inst_retired.all_branches_pebs",
   },
  {
   .event_code = {0xC4},
   .umask = 0x08,
   .event_name = "br_inst_retired.near_return",
   },
  {
   .event_code = {0xC4},
   .umask = 0x10,
   .event_name = "br_inst_retired.not_taken",
   },
  {
   .event_code = {0xC4},
   .umask = 0x20,
   .event_name = "br_inst_retired.near_taken",
   },
  {
   .event_code = {0xC4},
   .umask = 0x40,
   .event_name = "br_inst_retired.far_branch",
   },
  {
   .event_code = {0xC5},
   .umask = 0x00,
   .event_name = "br_misp_retired.all_branches",
   },
  {
   .event_code = {0xC5},
   .umask = 0x01,
   .event_name = "br_misp_retired.conditional",
   },
  {
   .event_code = {0xC5},
   .umask = 0x02,
   .event_name = "br_misp_retired.near_call",
   },
  {
   .event_code = {0xC5},
   .umask = 0x04,
   .event_name = "br_misp_retired.all_branches_pebs",
   },
  {
   .event_code = {0xC5},
   .umask = 0x10,
   .event_name = "br_misp_retired.not_taken",
   },
  {
   .event_code = {0xC5},
   .umask = 0x20,
   .event_name = "br_misp_retired.taken",
   },
  {
   .event_code = {0xCA},
   .umask = 0x02,
   .event_name = "fp_assist.x87_output",
   },
  {
   .event_code = {0xCA},
   .umask = 0x04,
   .event_name = "fp_assist.x87_input",
   },
  {
   .event_code = {0xCA},
   .umask = 0x08,
   .event_name = "fp_assist.simd_output",
   },
  {
   .event_code = {0xCA},
   .umask = 0x10,
   .event_name = "fp_assist.simd_input",
   },
  {
   .event_code = {0xCA},
   .umask = 0x1E,
   .event_name = "fp_assist.any",
   },
  {
   .event_code = {0xCC},
   .umask = 0x20,
   .event_name = "rob_misc_events.lbr_inserts",
   },
  {
   .event_code = {0xCD},
   .umask = 0x02,
   .event_name = "mem_trans_retired.precise_store",
   },
  {
   .event_code = {0xD0},
   .umask = 0x11,
   .event_name = "mem_uops_retired.stlb_miss_loads",
   },
  {
   .event_code = {0xD0},
   .umask = 0x12,
   .event_name = "mem_uops_retired.stlb_miss_stores",
   },
  {
   .event_code = {0xD0},
   .umask = 0x21,
   .event_name = "mem_uops_retired.lock_loads",
   },
  {
   .event_code = {0xD0},
   .umask = 0x41,
   .event_name = "mem_uops_retired.split_loads",
   },
  {
   .event_code = {0xD0},
   .umask = 0x42,
   .event_name = "mem_uops_retired.split_stores",
   },
  {
   .event_code = {0xD0},
   .umask = 0x81,
   .event_name = "mem_uops_retired.all_loads",
   },
  {
   .event_code = {0xD0},
   .umask = 0x82,
   .event_name = "mem_uops_retired.all_stores",
   },
  {
   .event_code = {0xD1},
   .umask = 0x01,
   .event_name = "mem_load_uops_retired.l1_hit",
   },
  {
   .event_code = {0xD1},
   .umask = 0x02,
   .event_name = "mem_load_uops_retired.l2_hit",
   },
  {
   .event_code = {0xD1},
   .umask = 0x04,
   .event_name = "mem_load_uops_retired.llc_hit",
   },
  {
   .event_code = {0xD1},
   .umask = 0x40,
   .event_name = "mem_load_uops_retired.hit_lfb",
   },
  {
   .event_code = {0xD2},
   .umask = 0x01,
   .event_name = "mem_load_uops_llc_hit_retired.xsnp_miss",
   },
  {
   .event_code = {0xD2},
   .umask = 0x02,
   .event_name = "mem_load_uops_llc_hit_retired.xsnp_hit",
   },
  {
   .event_code = {0xD2},
   .umask = 0x04,
   .event_name = "mem_load_uops_llc_hit_retired.xsnp_hitm",
   },
  {
   .event_code = {0xD2},
   .umask = 0x08,
   .event_name = "mem_load_uops_llc_hit_retired.xsnp_none",
   },
  {
   .event_code = {0xD4},
   .umask = 0x02,
   .event_name = "mem_load_uops_misc_retired.llc_miss",
   },
  {
   .event_code = {0xE6},
   .umask = 0x1F,
   .event_name = "baclears.any",
   },
  {
   .event_code = {0xF0},
   .umask = 0x01,
   .event_name = "l2_trans.demand_data_rd",
   },
  {
   .event_code = {0xF0},
   .umask = 0x02,
   .event_name = "l2_trans.rfo",
   },
  {
   .event_code = {0xF0},
   .umask = 0x04,
   .event_name = "l2_trans.code_rd",
   },
  {
   .event_code = {0xF0},
   .umask = 0x08,
   .event_name = "l2_trans.all_pf",
   },
  {
   .event_code = {0xF0},
   .umask = 0x10,
   .event_name = "l2_trans.l1d_wb",
   },
  {
   .event_code = {0xF0},
   .umask = 0x20,
   .event_name = "l2_trans.l2_fill",
   },
  {
   .event_code = {0xF0},
   .umask = 0x40,
   .event_name = "l2_trans.l2_wb",
   },
  {
   .event_code = {0xF0},
   .umask = 0x80,
   .event_name = "l2_trans.all_requests",
   },
  {
   .event_code = {0xF1},
   .umask = 0x01,
   .event_name = "l2_lines_in.i",
   },
  {
   .event_code = {0xF1},
   .umask = 0x02,
   .event_name = "l2_lines_in.s",
   },
  {
   .event_code = {0xF1},
   .umask = 0x04,
   .event_name = "l2_lines_in.e",
   },
  {
   .event_code = {0xF1},
   .umask = 0x07,
   .event_name = "l2_lines_in.all",
   },
  {
   .event_code = {0xF2},
   .umask = 0x01,
   .event_name = "l2_lines_out.demand_clean",
   },
  {
   .event_code = {0xF2},
   .umask = 0x02,
   .event_name = "l2_lines_out.demand_dirty",
   },
  {
   .event_code = {0xF2},
   .umask = 0x04,
   .event_name = "l2_lines_out.pf_clean",
   },
  {
   .event_code = {0xF2},
   .umask = 0x08,
   .event_name = "l2_lines_out.pf_dirty",
   },
  {
   .event_code = {0xF2},
   .umask = 0x0A,
   .event_name = "l2_lines_out.dirty_all",
   },
  {
   .event_code = {0xF4},
   .umask = 0x10,
   .event_name = "sq_misc.split_lock",
   },
  {
   .event_name = 0,
   },
};

PERFMON_REGISTER_INTEL_PMC (cpu_model_table, event_table);