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path: root/src/plugins/tlsopenssl/tls_openssl.c
blob: 596dba9977f71a5dd11a216556340a1daad0c653 (plain)
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/*
 * Copyright (c) 2018 Cisco and/or its affiliates.
 * Licensed under the Apache License, Version 2.0 (the "License");
 * you may not use this file except in compliance with the License.
 * You may obtain a copy of the License at:
 *
 *     http://www.apache.org/licenses/LICENSE-2.0
 *
 * Unless required by applicable law or agreed to in writing, software
 * distributed under the License is distributed on an "AS IS" BASIS,
 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 * See the License for the specific language governing permissions and
 * limitations under the License.
 */

#include <openssl/ssl.h>
#include <openssl/conf.h>
#include <openssl/err.h>
#include <vnet/plugin/plugin.h>
#include <vpp/app/version.h>
#include <vnet/tls/tls.h>

typedef struct tls_ctx_openssl_
{
  tls_ctx_t ctx;			/**< First */
  u32 openssl_ctx_index;
  SSL_CTX *ssl_ctx;
  SSL *ssl;
  BIO *rbio;
  BIO *wbio;
  X509 *srvcert;
  EVP_PKEY *pkey;
} openssl_ctx_t;

typedef struct openssl_main_
{
  openssl_ctx_t ***ctx_pool;
  X509_STORE *cert_store;
} openssl_main_t;

static openssl_main_t openssl_main;

static u32
openssl_ctx_alloc (void)
{
  u8 thread_index = vlib_get_thread_index ();
  openssl_main_t *tm = &openssl_main;
  openssl_ctx_t **ctx;

  pool_get (tm->ctx_pool[thread_index], ctx);
  if (!(*ctx))
    *ctx = clib_mem_alloc (sizeof (openssl_ctx_t));

  memset (*ctx, 0, sizeof (openssl_ctx_t));
  (*ctx)->ctx.c_thread_index = thread_index;
  (*ctx)->ctx.tls_ctx_engine = TLS_ENGINE_OPENSSL;
  (*ctx)->ctx.app_session_handle = SESSION_INVALID_HANDLE;
  (*ctx)->openssl_ctx_index = ctx - tm->ctx_pool[thread_index];
  return ((*ctx)->openssl_ctx_index);
}

static void
openssl_ctx_free (tls_ctx_t * ctx)
{
  openssl_ctx_t *oc = (openssl_ctx_t *) ctx;

  if (SSL_is_init_finished (oc->ssl) && !ctx->is_passive_close)
    SSL_shutdown (oc->ssl);

  if (SSL_is_server (oc->ssl))
    {
      X509_free (oc->srvcert);
      EVP_PKEY_free (oc->pkey);
    }
  SSL_free (oc->ssl);

  pool_put_index (openssl_main.ctx_pool[ctx->c_thread_index],
		  oc->openssl_ctx_index);
}

static tls_ctx_t *
openssl_ctx_get (u32 ctx_index)
{
  openssl_ctx_t **ctx;
  ctx = pool_elt_at_index (openssl_main.ctx_pool[vlib_get_thread_index ()],
			   ctx_index);
  return &(*ctx)->ctx;
}

static tls_ctx_t *
openssl_ctx_get_w_thread (u32 ctx_index, u8 thread_index)
{
  openssl_ctx_t **ctx;
  ctx = pool_elt_at_index (openssl_main.ctx_pool[thread_index], ctx_index);
  return &(*ctx)->ctx;
}

static int
openssl_try_handshake_read (openssl_ctx_t * oc,
			    stream_session_t * tls_session)
{
  u32 deq_max, deq_now;
  svm_fifo_t *f;
  int wrote, rv;

  f = tls_session->server_rx_fifo;
  deq_max = svm_fifo_max_dequeue (f);
  if (!deq_max)
    return 0;

  deq_now = clib_min (svm_fifo_max_read_chunk (f), deq_max);
  wrote = BIO_write (oc->wbio, svm_fifo_head (f), deq_now);
  if (wrote <= 0)
    return 0;

  svm_fifo_dequeue_drop (f, wrote);
  if (wrote < deq_max)
    {
      deq_now = clib_min (svm_fifo_max_read_chunk (f), deq_max - wrote);
      rv = BIO_write (oc->wbio, svm_fifo_head (f), deq_now);
      if (rv > 0)
	{
	  svm_fifo_dequeue_drop (f, rv);
	  wrote += rv;
	}
    }
  return wrote;
}

static int
openssl_try_handshake_write (openssl_ctx_t * oc,
			     stream_session_t * tls_session)
{
  u32 enq_max, deq_now;
  svm_fifo_t *f;
  int read, rv;

  if (BIO_ctrl_pending (oc->rbio) <= 0)
    return 0;

  f = tls_session->server_tx_fifo;
  enq_max = svm_fifo_max_enqueue (f);
  if (!enq_max)
    return 0;

  deq_now = clib_min (svm_fifo_max_write_chunk (f), enq_max);
  read = BIO_read (oc->rbio, svm_fifo_tail (f), deq_now);
  if (read <= 0)
    return 0;

  svm_fifo_enqueue_nocopy (f, read);
  tls_add_vpp_q_evt (f, FIFO_EVENT_APP_TX);

  if (read < enq_max)
    {
      deq_now = clib_min (svm_fifo_max_write_chunk (f), enq_max - read);
      rv = BIO_read (oc->rbio, svm_fifo_tail (f), deq_now);
      if (rv > 0)
	{
	  svm_fifo_enqueue_nocopy (f, rv);
	  read += rv;
	}
    }

  return read;
}

static int
openssl_ctx_handshake_rx (tls_ctx_t * ctx, stream_session_t * tls_session)
{
  openssl_ctx_t *oc = (openssl_ctx_t *) ctx;
  int rv = 0, err;
  while (SSL_in_init (oc->ssl))
    {
      if (!openssl_try_handshake_read (oc, tls_session))
	break;

      rv = SSL_do_handshake (oc->ssl);
      err = SSL_get_error (oc->ssl, rv);
      openssl_try_handshake_write (oc, tls_session);
      if (err != SSL_ERROR_WANT_WRITE)
	{
	  if (err == SSL_ERROR_SSL)
	    {
	      char buf[512];
	      ERR_error_string (ERR_get_error (), buf);
	      clib_warning ("Err: %s", buf);
	    }
	  break;
	}
    }
  TLS_DBG (2, "tls state for %u is %s", oc->openssl_ctx_index,
	   SSL_state_string_long (oc->ssl));

  if (SSL_in_init (oc->ssl))
    return 0;

  /*
   * Handshake complete
   */
  if (!SSL_is_server (oc->ssl))
    {
      /*
       * Verify server certificate
       */
      if ((rv = SSL_get_verify_result (oc->ssl)) != X509_V_OK)
	{
	  TLS_DBG (1, " failed verify: %s\n",
		   X509_verify_cert_error_string (rv));

	  /*
	   * Presence of hostname enforces strict certificate verification
	   */
	  if (ctx->srv_hostname)
	    {
	      tls_notify_app_connected (ctx, /* is failed */ 0);
	      return -1;
	    }
	}
      tls_notify_app_connected (ctx, /* is failed */ 0);
    }
  else
    {
      tls_notify_app_accept (ctx);
    }

  TLS_DBG (1, "Handshake for %u complete. TLS cipher is %s",
	   oc->openssl_ctx_index, SSL_get_cipher (oc->ssl));
  return rv;
}

static inline int
openssl_ctx_write (tls_ctx_t * ctx, stream_session_t * app_session)
{
  openssl_ctx_t *oc = (openssl_ctx_t *) ctx;
  int wrote = 0, rv, read, max_buf = 100 * TLS_CHUNK_SIZE, max_space;
  u32 enq_max, deq_max, deq_now, to_write;
  stream_session_t *tls_session;
  svm_fifo_t *f;

  f = app_session->server_tx_fifo;
  deq_max = svm_fifo_max_dequeue (f);
  if (!deq_max)
    goto check_tls_fifo;

  max_space = max_buf - BIO_ctrl_pending (oc->rbio);
  max_space = (max_space < 0) ? 0 : max_space;
  deq_now = clib_min (deq_max, (u32) max_space);
  to_write = clib_min (svm_fifo_max_read_chunk (f), deq_now);
  wrote = SSL_write (oc->ssl, svm_fifo_head (f), to_write);
  if (wrote <= 0)
    {
      tls_add_vpp_q_evt (app_session->server_tx_fifo, FIFO_EVENT_APP_TX);
      goto check_tls_fifo;
    }
  svm_fifo_dequeue_drop (app_session->server_tx_fifo, wrote);
  if (wrote < deq_now)
    {
      to_write = clib_min (svm_fifo_max_read_chunk (f), deq_now - wrote);
      rv = SSL_write (oc->ssl, svm_fifo_head (f), to_write);
      if (rv > 0)
	{
	  svm_fifo_dequeue_drop (app_session->server_tx_fifo, rv);
	  wrote += rv;
	}
    }

  if (deq_now < deq_max)
    tls_add_vpp_q_evt (app_session->server_tx_fifo, FIFO_EVENT_APP_TX);

check_tls_fifo:

  if (BIO_ctrl_pending (oc->rbio) <= 0)
    return wrote;

  tls_session = session_get_from_handle (ctx->tls_session_handle);
  f = tls_session->server_tx_fifo;
  enq_max = svm_fifo_max_enqueue (f);
  if (!enq_max)
    {
      tls_add_vpp_q_evt (app_session->server_tx_fifo, FIFO_EVENT_APP_TX);
      return wrote;
    }

  deq_now = clib_min (svm_fifo_max_write_chunk (f), enq_max);
  read = BIO_read (oc->rbio, svm_fifo_tail (f), deq_now);
  if (read <= 0)
    {
      tls_add_vpp_q_evt (app_session->server_tx_fifo, FIFO_EVENT_APP_TX);
      return wrote;
    }

  svm_fifo_enqueue_nocopy (f, read);
  tls_add_vpp_q_evt (f, FIFO_EVENT_APP_TX);

  if (read < enq_max && BIO_ctrl_pending (oc->rbio) > 0)
    {
      deq_now = clib_min (svm_fifo_max_write_chunk (f), enq_max - read);
      read = BIO_read (oc->rbio, svm_fifo_tail (f), deq_now);
      if (read > 0)
	svm_fifo_enqueue_nocopy (f, read);
    }

  if (BIO_ctrl_pending (oc->rbio) > 0)
    tls_add_vpp_q_evt (app_session->server_tx_fifo, FIFO_EVENT_APP_TX);

  return wrote;
}

static inline int
openssl_ctx_read (tls_ctx_t * ctx, stream_session_t * tls_session)
{
  int read, wrote = 0, max_space, max_buf = 100 * TLS_CHUNK_SIZE, rv;
  openssl_ctx_t *oc = (openssl_ctx_t *) ctx;
  u32 deq_max, enq_max, deq_now, to_read;
  stream_session_t *app_session;
  svm_fifo_t *f;

  if (PREDICT_FALSE (SSL_in_init (oc->ssl)))
    {
      openssl_ctx_handshake_rx (ctx, tls_session);
      return 0;
    }

  f = tls_session->server_rx_fifo;
  deq_max = svm_fifo_max_dequeue (f);
  max_space = max_buf - BIO_ctrl_pending (oc->wbio);
  max_space = max_space < 0 ? 0 : max_space;
  deq_now = clib_min (deq_max, max_space);
  if (!deq_now)
    goto check_app_fifo;

  to_read = clib_min (svm_fifo_max_read_chunk (f), deq_now);
  wrote = BIO_write (oc->wbio, svm_fifo_head (f), to_read);
  if (wrote <= 0)
    {
      tls_add_vpp_q_evt (tls_session->server_rx_fifo, FIFO_EVENT_BUILTIN_RX);
      goto check_app_fifo;
    }
  svm_fifo_dequeue_drop (f, wrote);
  if (wrote < deq_now)
    {
      to_read = clib_min (svm_fifo_max_read_chunk (f), deq_now - wrote);
      rv = BIO_write (oc->wbio, svm_fifo_head (f), to_read);
      if (rv > 0)
	{
	  svm_fifo_dequeue_drop (f, rv);
	  wrote += rv;
	}
    }
  if (svm_fifo_max_dequeue (f))
    tls_add_vpp_q_evt (tls_session->server_rx_fifo, FIFO_EVENT_BUILTIN_RX);

check_app_fifo:

  if (BIO_ctrl_pending (oc->wbio) <= 0)
    return wrote;

  app_session = session_get_from_handle (ctx->app_session_handle);
  f = app_session->server_rx_fifo;
  enq_max = svm_fifo_max_enqueue (f);
  if (!enq_max)
    {
      tls_add_vpp_q_evt (tls_session->server_rx_fifo, FIFO_EVENT_BUILTIN_RX);
      return wrote;
    }

  deq_now = clib_min (svm_fifo_max_write_chunk (f), enq_max);
  read = SSL_read (oc->ssl, svm_fifo_tail (f), deq_now);
  if (read <= 0)
    {
      tls_add_vpp_q_evt (tls_session->server_rx_fifo, FIFO_EVENT_BUILTIN_RX);
      return wrote;
    }
  svm_fifo_enqueue_nocopy (f, read);
  if (read < enq_max && BIO_ctrl_pending (oc->wbio) > 0)
    {
      deq_now = clib_min (svm_fifo_max_write_chunk (f), enq_max - read);
      read = SSL_read (oc->ssl, svm_fifo_tail (f), deq_now);
      if (read > 0)
	svm_fifo_enqueue_nocopy (f, read);
    }

  tls_notify_app_enqueue (ctx, app_session);
  if (BIO_ctrl_pending (oc->wbio) > 0)
    tls_add_vpp_q_evt (tls_session->server_rx_fifo, FIFO_EVENT_BUILTIN_RX);

  return wrote;
}

static int
openssl_ctx_init_client (tls_ctx_t * ctx)
{
  char *ciphers = "ALL:!ADH:!LOW:!EXP:!MD5:!RC4-SHA:!DES-CBC3-SHA:@STRENGTH";
  long flags = SSL_OP_NO_SSLv2 | SSL_OP_NO_SSLv3 | SSL_OP_NO_COMPRESSION;
  openssl_ctx_t *oc = (openssl_ctx_t *) ctx;
  openssl_main_t *om = &openssl_main;
  stream_session_t *tls_session;
  const SSL_METHOD *method;
  int rv, err;

  method = SSLv23_client_method ();
  if (method == NULL)
    {
      TLS_DBG (1, "SSLv23_method returned null");
      return -1;
    }

  oc->ssl_ctx = SSL_CTX_new (method);
  if (oc->ssl_ctx == NULL)
    {
      TLS_DBG (1, "SSL_CTX_new returned null");
      return -1;
    }

  SSL_CTX_set_ecdh_auto (oc->ssl_ctx, 1);
  SSL_CTX_set_mode (oc->ssl_ctx, SSL_MODE_ENABLE_PARTIAL_WRITE);
  rv = SSL_CTX_set_cipher_list (oc->ssl_ctx, (const char *) ciphers);
  if (rv != 1)
    {
      TLS_DBG (1, "Couldn't set cipher");
      return -1;
    }

  SSL_CTX_set_options (oc->ssl_ctx, flags);
  SSL_CTX_set_cert_store (oc->ssl_ctx, om->cert_store);

  oc->ssl = SSL_new (oc->ssl_ctx);
  if (oc->ssl == NULL)
    {
      TLS_DBG (1, "Couldn't initialize ssl struct");
      return -1;
    }

  oc->rbio = BIO_new (BIO_s_mem ());
  oc->wbio = BIO_new (BIO_s_mem ());

  BIO_set_mem_eof_return (oc->rbio, -1);
  BIO_set_mem_eof_return (oc->wbio, -1);

  SSL_set_bio (oc->ssl, oc->wbio, oc->rbio);
  SSL_set_connect_state (oc->ssl);

  rv = SSL_set_tlsext_host_name (oc->ssl, ctx->srv_hostname);
  if (rv != 1)
    {
      TLS_DBG (1, "Couldn't set hostname");
      return -1;
    }

  /*
   * 2. Do the first steps in the handshake.
   */
  TLS_DBG (1, "Initiating handshake for [%u]%u", ctx->c_thread_index,
	   oc->openssl_ctx_index);

  tls_session = session_get_from_handle (ctx->tls_session_handle);
  while (1)
    {
      rv = SSL_do_handshake (oc->ssl);
      err = SSL_get_error (oc->ssl, rv);
      openssl_try_handshake_write (oc, tls_session);
      if (err != SSL_ERROR_WANT_WRITE)
	break;
    }

  TLS_DBG (2, "tls state for [%u]%u is su", ctx->c_thread_index,
	   oc->openssl_ctx_index, SSL_state_string_long (oc->ssl));
  return 0;
}

static int
openssl_ctx_init_server (tls_ctx_t * ctx)
{
  char *ciphers = "ALL:!ADH:!LOW:!EXP:!MD5:!RC4-SHA:!DES-CBC3-SHA:@STRENGTH";
  long flags = SSL_OP_NO_SSLv2 | SSL_OP_NO_SSLv3 | SSL_OP_NO_COMPRESSION;
  openssl_ctx_t *oc = (openssl_ctx_t *) ctx;
  stream_session_t *tls_session;
  const SSL_METHOD *method;
  application_t *app;
  int rv, err;
  BIO *cert_bio;

  app = application_get (ctx->parent_app_index);
  if (!app->tls_cert || !app->tls_key)
    {
      TLS_DBG (1, "tls cert and/or key not configured %d",
	       ctx->parent_app_index);
      return -1;
    }

  method = SSLv23_method ();
  oc->ssl_ctx = SSL_CTX_new (method);
  if (!oc->ssl_ctx)
    {
      clib_warning ("Unable to create SSL context");
      return -1;
    }

  SSL_CTX_set_mode (oc->ssl_ctx, SSL_MODE_ENABLE_PARTIAL_WRITE);
  SSL_CTX_set_options (oc->ssl_ctx, flags);
  SSL_CTX_set_ecdh_auto (oc->ssl_ctx, 1);

  rv = SSL_CTX_set_cipher_list (oc->ssl_ctx, (const char *) ciphers);
  if (rv != 1)
    {
      TLS_DBG (1, "Couldn't set cipher");
      return -1;
    }

  /*
   * Set the key and cert
   */
  cert_bio = BIO_new (BIO_s_mem ());
  BIO_write (cert_bio, app->tls_cert, vec_len (app->tls_cert));
  oc->srvcert = PEM_read_bio_X509 (cert_bio, NULL, NULL, NULL);
  if (!oc->srvcert)
    {
      clib_warning ("unable to parse certificate");
      return -1;
    }
  SSL_CTX_use_certificate (oc->ssl_ctx, oc->srvcert);
  BIO_free (cert_bio);
  cert_bio = BIO_new (BIO_s_mem ());
  BIO_write (cert_bio, app->tls_key, vec_len (app->tls_key));
  oc->pkey = PEM_read_bio_PrivateKey (cert_bio, NULL, NULL, NULL);
  if (!oc->pkey)
    {
      clib_warning ("unable to parse pkey");
      return -1;
    }

  SSL_CTX_use_PrivateKey (oc->ssl_ctx, oc->pkey);
  BIO_free (cert_bio);

  oc->ssl = SSL_new (oc->ssl_ctx);
  if (oc->ssl == NULL)
    {
      TLS_DBG (1, "Couldn't initialize ssl struct");
      return -1;
    }

  oc->rbio = BIO_new (BIO_s_mem ());
  oc->wbio = BIO_new (BIO_s_mem ());

  BIO_set_mem_eof_return (oc->rbio, -1);
  BIO_set_mem_eof_return (oc->wbio, -1);

  SSL_set_bio (oc->ssl, oc->wbio, oc->rbio);
  SSL_set_accept_state (oc->ssl);

  TLS_DBG (1, "Initiating handshake for [%u]%u", ctx->c_thread_index,
	   oc->openssl_ctx_index);

  tls_session = session_get_from_handle (ctx->tls_session_handle);
  while (1)
    {
      rv = SSL_do_handshake (oc->ssl);
      err = SSL_get_error (oc->ssl, rv);
      openssl_try_handshake_write (oc, tls_session);
      if (err != SSL_ERROR_WANT_WRITE)
	break;
    }

  TLS_DBG (2, "tls state for [%u]%u is su", ctx->c_thread_index,
	   oc->openssl_ctx_index, SSL_state_string_long (oc->ssl));
  return 0;
}

static u8
openssl_handshake_is_over (tls_ctx_t * ctx)
{
  openssl_ctx_t *mc = (openssl_ctx_t *) ctx;
  if (!mc->ssl)
    return 0;
  return SSL_is_init_finished (mc->ssl);
}

const static tls_engine_vft_t openssl_engine = {
  .ctx_alloc = openssl_ctx_alloc,
  .ctx_free = openssl_ctx_free,
  .ctx_get = openssl_ctx_get,
  .ctx_get_w_thread = openssl_ctx_get_w_thread,
  .ctx_init_server = openssl_ctx_init_server,
  .ctx_init_client = openssl_ctx_init_client,
  .ctx_write = openssl_ctx_write,
  .ctx_read = openssl_ctx_read,
  .ctx_handshake_is_over = openssl_handshake_is_over,
};

int
tls_init_ca_chain (void)
{
  openssl_main_t *om = &openssl_main;
  tls_main_t *tm = vnet_tls_get_main ();
  BIO *cert_bio;
  X509 *testcert;
  int rv;

  if (access (tm->ca_cert_path, F_OK | R_OK) == -1)
    {
      clib_warning ("Could not initialize TLS CA certificates");
      return -1;
    }

  if (!(om->cert_store = X509_STORE_new ()))
    {
      clib_warning ("failed to create cert store");
      return -1;
    }

  rv = X509_STORE_load_locations (om->cert_store, tm->ca_cert_path, 0);
  if (rv < 0)
    {
      clib_warning ("failed to load ca certificate");
    }

  if (tm->use_test_cert_in_ca)
    {
      cert_bio = BIO_new (BIO_s_mem ());
      BIO_write (cert_bio, test_srv_crt_rsa, test_srv_crt_rsa_len);
      testcert = PEM_read_bio_X509 (cert_bio, NULL, NULL, NULL);
      if (!testcert)
	{
	  clib_warning ("unable to parse certificate");
	  return -1;
	}
      X509_STORE_add_cert (om->cert_store, testcert);
      rv = 0;
    }
  return (rv < 0 ? -1 : 0);
}

static clib_error_t *
tls_openssl_init (vlib_main_t * vm)
{
  vlib_thread_main_t *vtm = vlib_get_thread_main ();
  openssl_main_t *om = &openssl_main;
  clib_error_t *error;
  u32 num_threads;

  num_threads = 1 /* main thread */  + vtm->n_threads;

  if ((error = vlib_call_init_function (vm, tls_init)))
    return error;

  SSL_library_init ();
  SSL_load_error_strings ();

  if (tls_init_ca_chain ())
    {
      clib_warning ("failed to initialize TLS CA chain");
      return 0;
    }

  vec_validate (om->ctx_pool, num_threads - 1);

  tls_register_engine (&openssl_engine, TLS_ENGINE_OPENSSL);
  return 0;
}

VLIB_INIT_FUNCTION (tls_openssl_init);

/* *INDENT-OFF* */
VLIB_PLUGIN_REGISTER () = {
    .version = VPP_BUILD_VER,
    .description = "openssl based TLS Engine",
};
/* *INDENT-ON* */

/*
 * fd.io coding-style-patch-verification: ON
 *
 * Local Variables:
 * eval: (c-set-style "gnu")
 * End:
 */
an>) { xd->interface_name_suffix = format (0, "%u", i - last_pci_addr_port); } else { last_pci_addr.as_u32 = ~0; } } else last_pci_addr.as_u32 = ~0; clib_memcpy (&xd->tx_conf, &dev_info.default_txconf, sizeof (struct rte_eth_txconf)); if (dev_info.rx_offload_capa & DEV_RX_OFFLOAD_IPV4_CKSUM) { xd->port_conf.rxmode.offloads |= DEV_RX_OFFLOAD_IPV4_CKSUM; xd->flags |= DPDK_DEVICE_FLAG_RX_IP4_CKSUM; } if (dm->conf->enable_tcp_udp_checksum) { if (dev_info.rx_offload_capa & DEV_RX_OFFLOAD_UDP_CKSUM) xd->port_conf.rxmode.offloads |= DEV_RX_OFFLOAD_UDP_CKSUM; if (dev_info.rx_offload_capa & DEV_RX_OFFLOAD_TCP_CKSUM) xd->port_conf.rxmode.offloads |= DEV_RX_OFFLOAD_TCP_CKSUM; } if (dm->conf->no_multi_seg) { xd->port_conf.txmode.offloads &= ~DEV_TX_OFFLOAD_MULTI_SEGS; xd->port_conf.rxmode.offloads &= ~DEV_RX_OFFLOAD_JUMBO_FRAME; xd->port_conf.rxmode.offloads &= ~DEV_RX_OFFLOAD_SCATTER; } else { xd->port_conf.txmode.offloads |= DEV_TX_OFFLOAD_MULTI_SEGS; xd->port_conf.rxmode.offloads |= DEV_RX_OFFLOAD_JUMBO_FRAME; xd->port_conf.rxmode.offloads |= DEV_RX_OFFLOAD_SCATTER; xd->flags |= DPDK_DEVICE_FLAG_MAYBE_MULTISEG; } xd->tx_q_used = clib_min (dev_info.max_tx_queues, tm->n_vlib_mains); if (devconf->num_tx_queues > 0 && devconf->num_tx_queues < xd->tx_q_used) xd->tx_q_used = clib_min (xd->tx_q_used, devconf->num_tx_queues); if (devconf->num_rx_queues > 1 && dev_info.max_rx_queues >= devconf->num_rx_queues) { xd->rx_q_used = devconf->num_rx_queues; xd->port_conf.rxmode.mq_mode = ETH_MQ_RX_RSS; if (devconf->rss_fn == 0) xd->port_conf.rx_adv_conf.rss_conf.rss_hf = ETH_RSS_IP | ETH_RSS_UDP | ETH_RSS_TCP; else { u64 unsupported_bits; xd->port_conf.rx_adv_conf.rss_conf.rss_hf = devconf->rss_fn; unsupported_bits = xd->port_conf.rx_adv_conf.rss_conf.rss_hf; unsupported_bits &= ~dev_info.flow_type_rss_offloads; if (unsupported_bits) dpdk_log_warn ("Unsupported RSS hash functions: %U", format_dpdk_rss_hf_name, unsupported_bits); } xd->port_conf.rx_adv_conf.rss_conf.rss_hf &= dev_info.flow_type_rss_offloads; } else xd->rx_q_used = 1; vec_validate_aligned (xd->rx_queues, xd->rx_q_used - 1, CLIB_CACHE_LINE_BYTES); xd->flags |= DPDK_DEVICE_FLAG_PMD; /* workaround for drivers not setting driver_name */ if ((!dev_info.driver_name) && (pci_dev)) dev_info.driver_name = pci_dev->driver->driver.name; ASSERT (dev_info.driver_name); if (!xd->pmd) { #define _(s,f) else if (dev_info.driver_name && \ !strcmp(dev_info.driver_name, s)) \ xd->pmd = VNET_DPDK_PMD_##f; if (0) ; foreach_dpdk_pmd #undef _ else xd->pmd = VNET_DPDK_PMD_UNKNOWN; xd->port_type = VNET_DPDK_PORT_TYPE_UNKNOWN; xd->nb_rx_desc = DPDK_NB_RX_DESC_DEFAULT; xd->nb_tx_desc = DPDK_NB_TX_DESC_DEFAULT; switch (xd->pmd) { /* Drivers with valid speed_capa set */ case VNET_DPDK_PMD_I40E: xd->flags |= DPDK_DEVICE_FLAG_INT_UNMASKABLE; case VNET_DPDK_PMD_E1000EM: case VNET_DPDK_PMD_IGB: case VNET_DPDK_PMD_IGC: case VNET_DPDK_PMD_IXGBE: case VNET_DPDK_PMD_ICE: xd->port_type = port_type_from_speed_capa (&dev_info); xd->supported_flow_actions = VNET_FLOW_ACTION_MARK | VNET_FLOW_ACTION_REDIRECT_TO_NODE | VNET_FLOW_ACTION_REDIRECT_TO_QUEUE | VNET_FLOW_ACTION_BUFFER_ADVANCE | VNET_FLOW_ACTION_COUNT | VNET_FLOW_ACTION_DROP | VNET_FLOW_ACTION_RSS; if (dm->conf->no_tx_checksum_offload == 0) { xd->port_conf.txmode.offloads |= DEV_TX_OFFLOAD_TCP_CKSUM; xd->port_conf.txmode.offloads |= DEV_TX_OFFLOAD_UDP_CKSUM; xd->flags |= DPDK_DEVICE_FLAG_TX_OFFLOAD | DPDK_DEVICE_FLAG_INTEL_PHDR_CKSUM; } xd->port_conf.intr_conf.rxq = 1; break; case VNET_DPDK_PMD_CXGBE: case VNET_DPDK_PMD_MLX4: case VNET_DPDK_PMD_MLX5: case VNET_DPDK_PMD_QEDE: case VNET_DPDK_PMD_BNXT: xd->port_type = port_type_from_speed_capa (&dev_info); break; /* SR-IOV VFs */ case VNET_DPDK_PMD_I40EVF: xd->flags |= DPDK_DEVICE_FLAG_INT_UNMASKABLE; case VNET_DPDK_PMD_IGBVF: case VNET_DPDK_PMD_IXGBEVF: xd->port_type = VNET_DPDK_PORT_TYPE_ETH_VF; if (dm->conf->no_tx_checksum_offload == 0) { xd->port_conf.txmode.offloads |= DEV_TX_OFFLOAD_TCP_CKSUM; xd->port_conf.txmode.offloads |= DEV_TX_OFFLOAD_UDP_CKSUM; xd->flags |= DPDK_DEVICE_FLAG_TX_OFFLOAD | DPDK_DEVICE_FLAG_INTEL_PHDR_CKSUM; } /* DPDK bug in multiqueue... */ /* xd->port_conf.intr_conf.rxq = 1; */ break; /* iAVF */ case VNET_DPDK_PMD_IAVF: xd->flags |= DPDK_DEVICE_FLAG_INT_UNMASKABLE; xd->port_type = VNET_DPDK_PORT_TYPE_ETH_VF; xd->supported_flow_actions = VNET_FLOW_ACTION_MARK | VNET_FLOW_ACTION_REDIRECT_TO_NODE | VNET_FLOW_ACTION_REDIRECT_TO_QUEUE | VNET_FLOW_ACTION_BUFFER_ADVANCE | VNET_FLOW_ACTION_COUNT | VNET_FLOW_ACTION_DROP | VNET_FLOW_ACTION_RSS; if (dm->conf->no_tx_checksum_offload == 0) { xd->port_conf.txmode.offloads |= DEV_TX_OFFLOAD_TCP_CKSUM; xd->port_conf.txmode.offloads |= DEV_TX_OFFLOAD_UDP_CKSUM; xd->flags |= DPDK_DEVICE_FLAG_TX_OFFLOAD | DPDK_DEVICE_FLAG_INTEL_PHDR_CKSUM; } /* DPDK bug in multiqueue... */ /* xd->port_conf.intr_conf.rxq = 1; */ break; case VNET_DPDK_PMD_THUNDERX: xd->port_type = VNET_DPDK_PORT_TYPE_ETH_VF; if (dm->conf->no_tx_checksum_offload == 0) { xd->port_conf.txmode.offloads |= DEV_TX_OFFLOAD_TCP_CKSUM; xd->port_conf.txmode.offloads |= DEV_TX_OFFLOAD_UDP_CKSUM; xd->flags |= DPDK_DEVICE_FLAG_TX_OFFLOAD; } break; case VNET_DPDK_PMD_ENA: xd->port_type = VNET_DPDK_PORT_TYPE_ETH_VF; xd->port_conf.rxmode.offloads &= ~DEV_RX_OFFLOAD_SCATTER; xd->port_conf.intr_conf.rxq = 1; break; case VNET_DPDK_PMD_DPAA2: xd->port_type = VNET_DPDK_PORT_TYPE_ETH_10G; break; /* Cisco VIC */ case VNET_DPDK_PMD_ENIC: { struct rte_eth_link l; rte_eth_link_get_nowait (i, &l); xd->port_type = port_type_from_link_speed (l.link_speed); if (dm->conf->enable_tcp_udp_checksum) dpdk_enable_l4_csum_offload (xd); } break; /* Intel Red Rock Canyon */ case VNET_DPDK_PMD_FM10K: xd->port_type = VNET_DPDK_PORT_TYPE_ETH_SWITCH; break; /* virtio */ case VNET_DPDK_PMD_VIRTIO: xd->port_conf.rxmode.mq_mode = ETH_MQ_RX_NONE; xd->port_type = VNET_DPDK_PORT_TYPE_ETH_1G; xd->nb_rx_desc = DPDK_NB_RX_DESC_VIRTIO; xd->nb_tx_desc = DPDK_NB_TX_DESC_VIRTIO; /* * Enable use of RX interrupts if supported. * * There is no device flag or capability for this, so * use the same check that the virtio driver does. */ if (pci_dev && rte_intr_cap_multiple (&pci_dev->intr_handle)) xd->port_conf.intr_conf.rxq = 1; break; /* vmxnet3 */ case VNET_DPDK_PMD_VMXNET3: xd->port_type = VNET_DPDK_PORT_TYPE_ETH_1G; xd->port_conf.txmode.offloads |= DEV_TX_OFFLOAD_MULTI_SEGS; break; case VNET_DPDK_PMD_AF_PACKET: xd->port_type = VNET_DPDK_PORT_TYPE_AF_PACKET; xd->af_packet_instance_num = af_packet_instance_num++; break; case VNET_DPDK_PMD_VIRTIO_USER: xd->port_type = VNET_DPDK_PORT_TYPE_VIRTIO_USER; break; case VNET_DPDK_PMD_VHOST_ETHER: xd->port_type = VNET_DPDK_PORT_TYPE_VHOST_ETHER; break; case VNET_DPDK_PMD_LIOVF_ETHER: xd->port_type = VNET_DPDK_PORT_TYPE_ETH_VF; break; case VNET_DPDK_PMD_FAILSAFE: xd->port_type = VNET_DPDK_PORT_TYPE_FAILSAFE; xd->port_conf.intr_conf.lsc = 1; break; case VNET_DPDK_PMD_NETVSC: { struct rte_eth_link l; rte_eth_link_get_nowait (i, &l); xd->port_type = VNET_DPDK_PORT_TYPE_ETH_VF; } break; default: xd->port_type = VNET_DPDK_PORT_TYPE_UNKNOWN; } if (devconf->num_rx_desc) xd->nb_rx_desc = devconf->num_rx_desc; else { /* If num_rx_desc is not specified by VPP user, the current CPU is working with 2M page and has no L3 cache, default num_rx_desc is changed to 512 from original 1024 to help reduce TLB misses. */ if ((clib_mem_get_default_hugepage_size () == 2 << 20) && check_l3cache() == 0) xd->nb_rx_desc = 512; } if (devconf->num_tx_desc) xd->nb_tx_desc = devconf->num_tx_desc; else { /* If num_tx_desc is not specified by VPP user, the current CPU is working with 2M page and has no L3 cache, default num_tx_desc is changed to 512 from original 1024 to help reduce TLB misses. */ if ((clib_mem_get_default_hugepage_size () == 2 << 20) && check_l3cache() == 0) xd->nb_tx_desc = 512; } } if (xd->pmd == VNET_DPDK_PMD_AF_PACKET) { f64 now = vlib_time_now (vm); u32 rnd; rnd = (u32) (now * 1e6); rnd = random_u32 (&rnd); clib_memcpy (addr + 2, &rnd, sizeof (rnd)); addr[0] = 2; addr[1] = 0xfe; } else rte_eth_macaddr_get (i, (void *) addr); xd->port_id = i; xd->device_index = xd - dm->devices; xd->per_interface_next_index = ~0; /* assign interface to input thread */ int q; error = ethernet_register_interface (dm->vnet_main, dpdk_device_class.index, xd->device_index, /* ethernet address */ addr, &xd->hw_if_index, dpdk_flag_change); if (error) return error; /* * Ensure default mtu is not > the mtu read from the hardware. * Otherwise rte_eth_dev_configure() will fail and the port will * not be available. * Calculate max_frame_size and mtu supported by NIC */ if (ETHERNET_MAX_PACKET_BYTES > dev_info.max_rx_pktlen) { /* * This device does not support the platforms's max frame * size. Use it's advertised mru instead. */ max_rx_frame = dev_info.max_rx_pktlen; mtu = dev_info.max_rx_pktlen - sizeof (ethernet_header_t); } else { /* VPP treats MTU and max_rx_pktlen both equal to * ETHERNET_MAX_PACKET_BYTES, if dev_info.max_rx_pktlen >= * ETHERNET_MAX_PACKET_BYTES + sizeof(ethernet_header_t) */ if (dev_info.max_rx_pktlen >= (ETHERNET_MAX_PACKET_BYTES + sizeof (ethernet_header_t))) { mtu = ETHERNET_MAX_PACKET_BYTES; max_rx_frame = ETHERNET_MAX_PACKET_BYTES; /* * Some platforms do not account for Ethernet FCS (4 bytes) in * MTU calculations. To interop with them increase mru but only * if the device's settings can support it. */ if (dpdk_port_crc_strip_enabled (xd) && (dev_info.max_rx_pktlen >= (ETHERNET_MAX_PACKET_BYTES + sizeof (ethernet_header_t) + 4))) { max_rx_frame += 4; } } else { max_rx_frame = ETHERNET_MAX_PACKET_BYTES; mtu = ETHERNET_MAX_PACKET_BYTES - sizeof (ethernet_header_t); if (dpdk_port_crc_strip_enabled (xd) && (dev_info.max_rx_pktlen >= (ETHERNET_MAX_PACKET_BYTES + 4))) { max_rx_frame += 4; } } } if (xd->pmd == VNET_DPDK_PMD_FAILSAFE) { /* failsafe device numerables are reported with active device only, * need to query the mtu for current device setup to overwrite * reported value. */ uint16_t dev_mtu; if (!rte_eth_dev_get_mtu (i, &dev_mtu)) { mtu = dev_mtu; max_rx_frame = mtu + sizeof (ethernet_header_t); if (dpdk_port_crc_strip_enabled (xd)) { max_rx_frame += 4; } } } /*Set port rxmode config */ xd->port_conf.rxmode.max_rx_pkt_len = max_rx_frame; sw = vnet_get_hw_sw_interface (dm->vnet_main, xd->hw_if_index); xd->sw_if_index = sw->sw_if_index; vnet_hw_if_set_input_node (dm->vnet_main, xd->hw_if_index, dpdk_input_node.index); if (devconf->workers) { int i; q = 0; clib_bitmap_foreach (i, devconf->workers) { dpdk_rx_queue_t *rxq = vec_elt_at_index (xd->rx_queues, q); rxq->queue_index = vnet_hw_if_register_rx_queue ( dm->vnet_main, xd->hw_if_index, q++, vdm->first_worker_thread_index + i); } } else for (q = 0; q < xd->rx_q_used; q++) { dpdk_rx_queue_t *rxq = vec_elt_at_index (xd->rx_queues, q); rxq->queue_index = vnet_hw_if_register_rx_queue ( dm->vnet_main, xd->hw_if_index, q, VNET_HW_IF_RXQ_THREAD_ANY); } vnet_hw_if_update_runtime_data (dm->vnet_main, xd->hw_if_index); /*Get vnet hardware interface */ hi = vnet_get_hw_interface (dm->vnet_main, xd->hw_if_index); /*Override default max_packet_bytes and max_supported_bytes set in * ethernet_register_interface() above*/ if (hi) { hi->max_packet_bytes = mtu; hi->max_supported_packet_bytes = max_rx_frame; hi->numa_node = xd->cpu_socket; /* Indicate ability to support L3 DMAC filtering and * initialize interface to L3 non-promisc mode */ hi->caps |= VNET_HW_INTERFACE_CAP_SUPPORTS_MAC_FILTER; ethernet_set_flags (dm->vnet_main, xd->hw_if_index, ETHERNET_INTERFACE_FLAG_DEFAULT_L3); } if (dm->conf->no_tx_checksum_offload == 0) if (xd->flags & DPDK_DEVICE_FLAG_TX_OFFLOAD && hi != NULL) { hi->caps |= VNET_HW_INTERFACE_CAP_SUPPORTS_TX_IP4_CKSUM | VNET_HW_INTERFACE_CAP_SUPPORTS_TX_TCP_CKSUM | VNET_HW_INTERFACE_CAP_SUPPORTS_TX_UDP_CKSUM; } if (devconf->tso == DPDK_DEVICE_TSO_ON && hi != NULL) { /*tcp_udp checksum must be enabled*/ if ((dm->conf->enable_tcp_udp_checksum) && (hi->caps & VNET_HW_INTERFACE_CAP_SUPPORTS_TX_CKSUM)) { hi->caps |= VNET_HW_INTERFACE_CAP_SUPPORTS_TCP_GSO | VNET_HW_INTERFACE_CAP_SUPPORTS_UDP_GSO; xd->port_conf.txmode.offloads |= DEV_TX_OFFLOAD_TCP_TSO | DEV_TX_OFFLOAD_UDP_TSO; } else clib_warning ("%s: TCP/UDP checksum offload must be enabled", hi->name); } dpdk_device_setup (xd); /* rss queues should be configured after dpdk_device_setup() */ if ((hi != NULL) && (devconf->rss_queues != NULL)) { if (vnet_hw_interface_set_rss_queues (vnet_get_main (), hi, devconf->rss_queues)) { clib_warning ("%s: Failed to set rss queues", hi->name); } } if (vec_len (xd->errors)) dpdk_log_err ("setup failed for device %U. Errors:\n %U", format_dpdk_device_name, i, format_dpdk_device_errors, xd); /* * A note on Cisco VIC (PMD_ENIC) and VLAN: * * With Cisco VIC vNIC, every ingress packet is tagged. On a * trunk vNIC (C series "standalone" server), packets on no VLAN * are tagged with vlan 0. On an access vNIC (standalone or B * series "blade" server), packets on the default/native VLAN * are tagged with that vNIC's VLAN. VPP expects these packets * to be untagged, and previously enabled VLAN strip on VIC by * default. But it also broke vlan sub-interfaces. * * The VIC adapter has "untag default vlan" ingress VLAN rewrite * mode, which removes tags from these packets. VPP now includes * a local patch for the enic driver to use this untag mode, so * enabling vlan stripping is no longer needed. In future, the * driver + dpdk will have an API to set the mode after * rte_eal_init. Then, this note and local patch will be * removed. */ /* * VLAN stripping: default to VLAN strip disabled, unless specified * otherwise in the startup config. */ vlan_off = rte_eth_dev_get_vlan_offload (xd->port_id); if (devconf->vlan_strip_offload == DPDK_DEVICE_VLAN_STRIP_ON) { vlan_off |= ETH_VLAN_STRIP_OFFLOAD; if (rte_eth_dev_set_vlan_offload (xd->port_id, vlan_off) >= 0) dpdk_log_info ("VLAN strip enabled for interface\n"); else dpdk_log_warn ("VLAN strip cannot be supported by interface\n"); xd->port_conf.rxmode.offloads |= DEV_RX_OFFLOAD_VLAN_STRIP; } else { if (vlan_off & ETH_VLAN_STRIP_OFFLOAD) { vlan_off &= ~ETH_VLAN_STRIP_OFFLOAD; if (rte_eth_dev_set_vlan_offload (xd->port_id, vlan_off) >= 0) dpdk_log_warn ("set VLAN offload failed\n"); } xd->port_conf.rxmode.offloads &= ~DEV_RX_OFFLOAD_VLAN_STRIP; } if (hi) hi->max_packet_bytes = xd->port_conf.rxmode.max_rx_pkt_len - sizeof (ethernet_header_t); else dpdk_log_warn ("hi NULL"); if (dm->conf->no_multi_seg) mtu = mtu > ETHER_MAX_LEN ? ETHER_MAX_LEN : mtu; rte_eth_dev_set_mtu (xd->port_id, mtu); } /* *INDENT-ON* */ return 0; } static void dpdk_bind_devices_to_uio (dpdk_config_main_t * conf) { vlib_main_t *vm = vlib_get_main (); clib_error_t *error; u8 *pci_addr = 0; int num_whitelisted = vec_len (conf->dev_confs); vlib_pci_device_info_t *d = 0; vlib_pci_addr_t *addr = 0, *addrs; int i; addrs = vlib_pci_get_all_dev_addrs (); /* *INDENT-OFF* */ vec_foreach (addr, addrs) { dpdk_device_config_t * devconf = 0; vec_reset_length (pci_addr); pci_addr = format (pci_addr, "%U%c", format_vlib_pci_addr, addr, 0); if (d) { vlib_pci_free_device_info (d); d = 0; } d = vlib_pci_get_device_info (vm, addr, &error); if (error) { vlib_log_warn (dpdk_main.log_default, "%U", format_clib_error, error); clib_error_free (error); continue; } if (d->device_class != PCI_CLASS_NETWORK_ETHERNET && d->device_class != PCI_CLASS_PROCESSOR_CO) continue; if (num_whitelisted) { uword * p = hash_get (conf->device_config_index_by_pci_addr, addr->as_u32); if (!p) { skipped_pci: continue; } devconf = pool_elt_at_index (conf->dev_confs, p[0]); } /* Enforce Device blacklist by vendor and device */ for (i = 0; i < vec_len (conf->blacklist_by_pci_vendor_and_device); i++) { u16 vendor, device; vendor = (u16)(conf->blacklist_by_pci_vendor_and_device[i] >> 16); device = (u16)(conf->blacklist_by_pci_vendor_and_device[i] & 0xFFFF); if (d->vendor_id == vendor && d->device_id == device) { /* * Expected case: device isn't whitelisted, * so blacklist it... */ if (devconf == 0) { /* Device is blacklisted */ pool_get (conf->dev_confs, devconf); hash_set (conf->device_config_index_by_pci_addr, addr->as_u32, devconf - conf->dev_confs); devconf->pci_addr.as_u32 = addr->as_u32; devconf->dev_addr_type = VNET_DEV_ADDR_PCI; devconf->is_blacklisted = 1; goto skipped_pci; } else /* explicitly whitelisted, ignore the device blacklist */ break; } } /* virtio */ if (d->vendor_id == 0x1af4 && (d->device_id == VIRTIO_PCI_LEGACY_DEVICEID_NET || d->device_id == VIRTIO_PCI_MODERN_DEVICEID_NET)) ; /* vmxnet3 */ else if (d->vendor_id == 0x15ad && d->device_id == 0x07b0) { /* * For vmxnet3 PCI, unless it is explicitly specified in the whitelist, * the default is to put it in the blacklist. */ if (devconf == 0) { pool_get (conf->dev_confs, devconf); hash_set (conf->device_config_index_by_pci_addr, addr->as_u32, devconf - conf->dev_confs); devconf->pci_addr.as_u32 = addr->as_u32; devconf->is_blacklisted = 1; } } /* all Intel network devices */ else if (d->vendor_id == 0x8086 && d->device_class == PCI_CLASS_NETWORK_ETHERNET) ; /* all Intel QAT devices VFs */ else if (d->vendor_id == 0x8086 && d->device_class == PCI_CLASS_PROCESSOR_CO && (d->device_id == 0x0443 || d->device_id == 0x18a1 || d->device_id == 0x19e3 || d->device_id == 0x37c9 || d->device_id == 0x6f55)) ; /* Cisco VIC */ else if (d->vendor_id == 0x1137 && (d->device_id == 0x0043 || d->device_id == 0x0071)) ; /* Chelsio T4/T5 */ else if (d->vendor_id == 0x1425 && (d->device_id & 0xe000) == 0x4000) ; /* Amazon Elastic Network Adapter */ else if (d->vendor_id == 0x1d0f && d->device_id >= 0xec20 && d->device_id <= 0xec21) ; /* Cavium Network Adapter */ else if (d->vendor_id == 0x177d && d->device_id == 0x9712) ; /* Cavium FastlinQ QL41000 Series */ else if (d->vendor_id == 0x1077 && d->device_id >= 0x8070 && d->device_id <= 0x8090) ; /* Mellanox CX3, CX3VF */ else if (d->vendor_id == 0x15b3 && d->device_id >= 0x1003 && d->device_id <= 0x1004) { continue; } /* Mellanox CX4, CX4VF, CX4LX, CX4LXVF, CX5, CX5VF, CX5EX, CX5EXVF */ else if (d->vendor_id == 0x15b3 && d->device_id >= 0x1013 && d->device_id <= 0x101a) { continue; } /* Mellanox CX6, CX6VF, CX6DX, CX6DXVF */ else if (d->vendor_id == 0x15b3 && d->device_id >= 0x101b && d->device_id <= 0x101e) { continue; } /* Broadcom NetXtreme S, and E series only */ else if (d->vendor_id == 0x14e4 && ((d->device_id >= 0x16c0 && d->device_id != 0x16c6 && d->device_id != 0x16c7 && d->device_id != 0x16dd && d->device_id != 0x16f7 && d->device_id != 0x16fd && d->device_id != 0x16fe && d->device_id != 0x170d && d->device_id != 0x170c && d->device_id != 0x170e && d->device_id != 0x1712 && d->device_id != 0x1713) || (d->device_id == 0x1604 || d->device_id == 0x1605 || d->device_id == 0x1614 || d->device_id == 0x1606 || d->device_id == 0x1609 || d->device_id == 0x1614))) ; else { dpdk_log_warn ("Unsupported PCI device 0x%04x:0x%04x found " "at PCI address %s\n", (u16) d->vendor_id, (u16) d->device_id, pci_addr); continue; } error = vlib_pci_bind_to_uio (vm, addr, (char *) conf->uio_driver_name); if (error) { if (devconf == 0) { pool_get (conf->dev_confs, devconf); hash_set (conf->device_config_index_by_pci_addr, addr->as_u32, devconf - conf->dev_confs); devconf->pci_addr.as_u32 = addr->as_u32; } devconf->dev_addr_type = VNET_DEV_ADDR_PCI; devconf->is_blacklisted = 1; clib_error_report (error); } } /* *INDENT-ON* */ vec_free (pci_addr); vlib_pci_free_device_info (d); } static void dpdk_bind_vmbus_devices_to_uio (dpdk_config_main_t * conf) { clib_error_t *error; vlib_vmbus_addr_t *addrs, *addr = 0; int num_whitelisted = vec_len (conf->dev_confs); int i; addrs = vlib_vmbus_get_all_dev_addrs (); /* *INDENT-OFF* */ vec_foreach (addr, addrs) { dpdk_device_config_t *devconf = 0; if (num_whitelisted) { uword *p = mhash_get (&conf->device_config_index_by_vmbus_addr, addr); if (!p) { /* No devices blacklisted, but have whitelisted. blacklist all * non-whitelisted */ pool_get (conf->dev_confs, devconf); mhash_set (&conf->device_config_index_by_vmbus_addr, addr, devconf - conf->dev_confs, 0); devconf->vmbus_addr = *addr; devconf->dev_addr_type = VNET_DEV_ADDR_VMBUS; devconf->is_blacklisted = 1; skipped_vmbus: continue; } devconf = pool_elt_at_index (conf->dev_confs, p[0]); } /* Enforce Device blacklist by vmbus_addr */ for (i = 0; i < vec_len (conf->blacklist_by_vmbus_addr); i++) { vlib_vmbus_addr_t *a1 = &conf->blacklist_by_vmbus_addr[i]; vlib_vmbus_addr_t *a2 = addr; if (memcmp (a1, a2, sizeof (vlib_vmbus_addr_t)) == 0) { if (devconf == 0) { /* Device not whitelisted */ pool_get (conf->dev_confs, devconf); mhash_set (&conf->device_config_index_by_vmbus_addr, addr, devconf - conf->dev_confs, 0); devconf->vmbus_addr = *addr; devconf->dev_addr_type = VNET_DEV_ADDR_VMBUS; devconf->is_blacklisted = 1; goto skipped_vmbus; } else { break; } } } error = vlib_vmbus_bind_to_uio (addr); if (error) { if (devconf == 0) { pool_get (conf->dev_confs, devconf); mhash_set (&conf->device_config_index_by_vmbus_addr, addr, devconf - conf->dev_confs, 0); devconf->vmbus_addr = *addr; } devconf->dev_addr_type = VNET_DEV_ADDR_VMBUS; devconf->is_blacklisted = 1; clib_error_report (error); } } /* *INDENT-ON* */ } uword unformat_max_simd_bitwidth (unformat_input_t *input, va_list *va) { uword *max_simd_bitwidth = va_arg (*va, uword *); while (unformat_check_input (input) != UNFORMAT_END_OF_INPUT) { if (!unformat (input, "%u", max_simd_bitwidth)) goto error; if (*max_simd_bitwidth != DPDK_MAX_SIMD_BITWIDTH_256 && *max_simd_bitwidth != DPDK_MAX_SIMD_BITWIDTH_512) goto error; } return 1; error: return 0; } static clib_error_t * dpdk_device_config (dpdk_config_main_t *conf, void *addr, dpdk_device_addr_type_t addr_type, unformat_input_t *input, u8 is_default) { clib_error_t *error = 0; uword *p; dpdk_device_config_t *devconf = 0; unformat_input_t sub_input; if (is_default) { devconf = &conf->default_devconf; } else if (addr_type == VNET_DEV_ADDR_PCI) { p = hash_get (conf->device_config_index_by_pci_addr, ((vlib_pci_addr_t *) (addr))->as_u32); if (!p) { pool_get (conf->dev_confs, devconf); hash_set (conf->device_config_index_by_pci_addr, ((vlib_pci_addr_t *) (addr))->as_u32, devconf - conf->dev_confs); } else return clib_error_return (0, "duplicate configuration for PCI address %U", format_vlib_pci_addr, addr); } else if (addr_type == VNET_DEV_ADDR_VMBUS) { p = mhash_get (&conf->device_config_index_by_vmbus_addr, (vlib_vmbus_addr_t *) (addr)); if (!p) { pool_get (conf->dev_confs, devconf); mhash_set (&conf->device_config_index_by_vmbus_addr, addr, devconf - conf->dev_confs, 0); } else return clib_error_return ( 0, "duplicate configuration for VMBUS address %U", format_vlib_vmbus_addr, addr); } if (addr_type == VNET_DEV_ADDR_PCI) { devconf->pci_addr.as_u32 = ((vlib_pci_addr_t *) (addr))->as_u32; devconf->tso = DPDK_DEVICE_TSO_DEFAULT; devconf->dev_addr_type = VNET_DEV_ADDR_PCI; } else if (addr_type == VNET_DEV_ADDR_VMBUS) { devconf->vmbus_addr = *((vlib_vmbus_addr_t *) (addr)); devconf->tso = DPDK_DEVICE_TSO_DEFAULT; devconf->dev_addr_type = VNET_DEV_ADDR_VMBUS; } if (!input) return 0; unformat_skip_white_space (input); while (unformat_check_input (input) != UNFORMAT_END_OF_INPUT) { if (unformat (input, "num-rx-queues %u", &devconf->num_rx_queues)) ; else if (unformat (input, "num-tx-queues %u", &devconf->num_tx_queues)) ; else if (unformat (input, "num-rx-desc %u", &devconf->num_rx_desc)) ; else if (unformat (input, "num-tx-desc %u", &devconf->num_tx_desc)) ; else if (unformat (input, "name %s", &devconf->name)) ; else if (unformat (input, "workers %U", unformat_bitmap_list, &devconf->workers)) ; else if (unformat (input, "rss %U", unformat_vlib_cli_sub_input, &sub_input)) { error = unformat_rss_fn (&sub_input, &devconf->rss_fn); if (error) break; } else if (unformat (input, "vlan-strip-offload off")) devconf->vlan_strip_offload = DPDK_DEVICE_VLAN_STRIP_OFF; else if (unformat (input, "vlan-strip-offload on")) devconf->vlan_strip_offload = DPDK_DEVICE_VLAN_STRIP_ON; else if (unformat (input, "tso on")) { devconf->tso = DPDK_DEVICE_TSO_ON; } else if (unformat (input, "tso off")) { devconf->tso = DPDK_DEVICE_TSO_OFF; } else if (unformat (input, "devargs %s", &devconf->devargs)) ; else if (unformat (input, "rss-queues %U", unformat_bitmap_list, &devconf->rss_queues)) ; else { error = clib_error_return (0, "unknown input `%U'", format_unformat_error, input); break; } } if (error) return error; if (devconf->workers && devconf->num_rx_queues == 0) devconf->num_rx_queues = clib_bitmap_count_set_bits (devconf->workers); else if (devconf->workers && clib_bitmap_count_set_bits (devconf->workers) != devconf->num_rx_queues) error = clib_error_return (0, "%U: number of worker threads must be " "equal to number of rx queues", format_vlib_pci_addr, addr); return error; } static clib_error_t * dpdk_log_read_ready (clib_file_t * uf) { unformat_input_t input; u8 *line, *s = 0; int n, n_try; n = n_try = 4096; while (n == n_try) { uword len = vec_len (s); vec_resize (s, len + n_try); n = read (uf->file_descriptor, s + len, n_try); if (n < 0 && errno != EAGAIN) return clib_error_return_unix (0, "read"); _vec_len (s) = len + (n < 0 ? 0 : n); } unformat_init_vector (&input, s); while (unformat_user (&input, unformat_line, &line)) { dpdk_log_notice ("%v", line); vec_free (line); } unformat_free (&input); return 0; } static clib_error_t * dpdk_config (vlib_main_t * vm, unformat_input_t * input) { clib_error_t *error = 0; dpdk_config_main_t *conf = &dpdk_config_main; vlib_thread_main_t *tm = vlib_get_thread_main (); dpdk_device_config_t *devconf; vlib_pci_addr_t pci_addr = { 0 }; vlib_vmbus_addr_t vmbus_addr = { 0 }; unformat_input_t sub_input; uword default_hugepage_sz, x; u8 *s, *tmp = 0; int ret, i; int num_whitelisted = 0; int eal_no_hugetlb = 0; u8 no_pci = 0; u8 no_vmbus = 0; u8 file_prefix = 0; u8 *socket_mem = 0; u8 *huge_dir_path = 0; u32 vendor, device, domain, bus, func; huge_dir_path = format (0, "%s/hugepages%c", vlib_unix_get_runtime_dir (), 0); conf->device_config_index_by_pci_addr = hash_create (0, sizeof (uword)); mhash_init (&conf->device_config_index_by_vmbus_addr, sizeof (uword), sizeof (vlib_vmbus_addr_t)); while (unformat_check_input (input) != UNFORMAT_END_OF_INPUT) { /* Prime the pump */ if (unformat (input, "no-hugetlb")) { vec_add1 (conf->eal_init_args, (u8 *) "--no-huge"); eal_no_hugetlb = 1; } else if (unformat (input, "telemetry")) conf->enable_telemetry = 1; else if (unformat (input, "enable-tcp-udp-checksum")) conf->enable_tcp_udp_checksum = 1; else if (unformat (input, "no-tx-checksum-offload")) conf->no_tx_checksum_offload = 1; else if (unformat (input, "decimal-interface-names")) conf->interface_name_format_decimal = 1; else if (unformat (input, "no-multi-seg")) conf->no_multi_seg = 1; else if (unformat (input, "max-simd-bitwidth %U", unformat_max_simd_bitwidth, &conf->max_simd_bitwidth)) ; else if (unformat (input, "dev default %U", unformat_vlib_cli_sub_input, &sub_input)) { error = dpdk_device_config (conf, 0, VNET_DEV_ADDR_ANY, &sub_input, 1); if (error) return error; } else if (unformat (input, "dev %U %U", unformat_vlib_pci_addr, &pci_addr, unformat_vlib_cli_sub_input, &sub_input)) { error = dpdk_device_config (conf, &pci_addr, VNET_DEV_ADDR_PCI, &sub_input, 0); if (error) return error; num_whitelisted++; } else if (unformat (input, "dev %U", unformat_vlib_pci_addr, &pci_addr)) { error = dpdk_device_config (conf, &pci_addr, VNET_DEV_ADDR_PCI, 0, 0); if (error) return error; num_whitelisted++; } else if (unformat (input, "dev %U %U", unformat_vlib_vmbus_addr, &vmbus_addr, unformat_vlib_cli_sub_input, &sub_input)) { error = dpdk_device_config (conf, &vmbus_addr, VNET_DEV_ADDR_VMBUS, &sub_input, 0); if (error) return error; num_whitelisted++; } else if (unformat (input, "dev %U", unformat_vlib_vmbus_addr, &vmbus_addr)) { error = dpdk_device_config (conf, &vmbus_addr, VNET_DEV_ADDR_VMBUS, 0, 0); if (error) return error; num_whitelisted++; } else if (unformat (input, "num-mem-channels %d", &conf->nchannels)) conf->nchannels_set_manually = 0; else if (unformat (input, "num-crypto-mbufs %d", &conf->num_crypto_mbufs)) ; else if (unformat (input, "uio-driver %s", &conf->uio_driver_name)) ; else if (unformat (input, "socket-mem %s", &socket_mem)) ; else if (unformat (input, "no-pci")) { no_pci = 1; tmp = format (0, "--no-pci%c", 0); vec_add1 (conf->eal_init_args, tmp); } else if (unformat (input, "blacklist %U", unformat_vlib_vmbus_addr, &vmbus_addr)) { vec_add1 (conf->blacklist_by_vmbus_addr, vmbus_addr); } else if (unformat (input, "blacklist %x:%x:%x.%x", &domain, &bus, &device, &func)) { tmp = format (0, "-b%c", 0); vec_add1 (conf->eal_init_args, tmp); tmp = format (0, "%04x:%02x:%02x.%x%c", domain, bus, device, func, 0); vec_add1 (conf->eal_init_args, tmp); } else if (unformat (input, "blacklist %x:%x", &vendor, &device)) { u32 blacklist_entry; if (vendor > 0xFFFF) return clib_error_return (0, "blacklist PCI vendor out of range"); if (device > 0xFFFF) return clib_error_return (0, "blacklist PCI device out of range"); blacklist_entry = (vendor << 16) | (device & 0xffff); vec_add1 (conf->blacklist_by_pci_vendor_and_device, blacklist_entry); } else if (unformat (input, "no-vmbus")) { no_vmbus = 1; tmp = format (0, "--no-vmbus%c", 0); vec_add1 (conf->eal_init_args, tmp); } #define _(a) \ else if (unformat(input, #a)) \ { \ tmp = format (0, "--%s%c", #a, 0); \ vec_add1 (conf->eal_init_args, tmp); \ } foreach_eal_double_hyphen_predicate_arg #undef _ #define _(a) \ else if (unformat(input, #a " %s", &s)) \ { \ if (!strncmp(#a, "file-prefix", 11)) \ file_prefix = 1; \ tmp = format (0, "--%s%c", #a, 0); \ vec_add1 (conf->eal_init_args, tmp); \ vec_add1 (s, 0); \ if (!strncmp(#a, "vdev", 4)) \ if (strstr((char*)s, "af_packet")) \ clib_warning ("af_packet obsoleted. Use CLI 'create host-interface'."); \ vec_add1 (conf->eal_init_args, s); \ } foreach_eal_double_hyphen_arg #undef _ #define _(a,b) \ else if (unformat(input, #a " %s", &s)) \ { \ tmp = format (0, "-%s%c", #b, 0); \ vec_add1 (conf->eal_init_args, tmp); \ vec_add1 (s, 0); \ vec_add1 (conf->eal_init_args, s); \ } foreach_eal_single_hyphen_arg #undef _ #define _(a,b) \ else if (unformat(input, #a " %s", &s)) \ { \ tmp = format (0, "-%s%c", #b, 0); \ vec_add1 (conf->eal_init_args, tmp); \ vec_add1 (s, 0); \ vec_add1 (conf->eal_init_args, s); \ conf->a##_set_manually = 1; \ } foreach_eal_single_hyphen_mandatory_arg #undef _ else if (unformat (input, "default")) ; else if (unformat_skip_white_space (input)) ; else { error = clib_error_return (0, "unknown input `%U'", format_unformat_error, input); goto done; } } if (!conf->uio_driver_name) conf->uio_driver_name = format (0, "auto%c", 0); if (eal_no_hugetlb == 0) { vec_add1 (conf->eal_init_args, (u8 *) "--in-memory"); default_hugepage_sz = clib_mem_get_default_hugepage_size (); /* *INDENT-OFF* */ clib_bitmap_foreach (x, tm->cpu_socket_bitmap) { clib_error_t *e; uword n_pages; /* preallocate at least 16MB of hugepages per socket, if more is needed it is up to consumer to preallocate more */ n_pages = round_pow2 ((uword) 16 << 20, default_hugepage_sz); n_pages /= default_hugepage_sz; if ((e = clib_sysfs_prealloc_hugepages(x, 0, n_pages))) clib_error_report (e); } /* *INDENT-ON* */ } /* on/off dpdk's telemetry thread */ if (conf->enable_telemetry == 0) { vec_add1 (conf->eal_init_args, (u8 *) "--no-telemetry"); } if (!file_prefix) { tmp = format (0, "--file-prefix%c", 0); vec_add1 (conf->eal_init_args, tmp); tmp = format (0, "vpp%c", 0); vec_add1 (conf->eal_init_args, tmp); } if (error) return error; /* I'll bet that -c and -n must be the first and second args... */ if (!conf->coremask_set_manually) { vlib_thread_registration_t *tr; uword *coremask = 0; int i; /* main thread core */ coremask = clib_bitmap_set (coremask, tm->main_lcore, 1); for (i = 0; i < vec_len (tm->registrations); i++) { tr = tm->registrations[i]; coremask = clib_bitmap_or (coremask, tr->coremask); } vec_insert (conf->eal_init_args, 2, 1); conf->eal_init_args[1] = (u8 *) "-c"; tmp = format (0, "%U%c", format_bitmap_hex, coremask, 0); conf->eal_init_args[2] = tmp; clib_bitmap_free (coremask); } if (!conf->nchannels_set_manually) { vec_insert (conf->eal_init_args, 2, 3); conf->eal_init_args[3] = (u8 *) "-n"; tmp = format (0, "%d", conf->nchannels); vec_terminate_c_string (tmp); conf->eal_init_args[4] = tmp; } if (no_pci == 0 && geteuid () == 0) dpdk_bind_devices_to_uio (conf); if (no_vmbus == 0 && geteuid () == 0) dpdk_bind_vmbus_devices_to_uio (conf); #define _(x) \ if (devconf->x == 0 && conf->default_devconf.x > 0) \ devconf->x = conf->default_devconf.x ; /* *INDENT-OFF* */ pool_foreach (devconf, conf->dev_confs) { /* default per-device config items */ foreach_dpdk_device_config_item /* copy vlan_strip config from default device */ _ (vlan_strip_offload) /* copy tso config from default device */ _ (tso) /* copy tso config from default device */ _ (devargs) /* copy rss_queues config from default device */ _ (rss_queues) /* add DPDK EAL whitelist/blacklist entry */ if (num_whitelisted > 0 && devconf->is_blacklisted == 0 && devconf->dev_addr_type == VNET_DEV_ADDR_PCI) { tmp = format (0, "-a%c", 0); vec_add1 (conf->eal_init_args, tmp); if (devconf->devargs) { tmp = format (0, "%U,%s%c", format_vlib_pci_addr, &devconf->pci_addr, devconf->devargs, 0); } else { tmp = format (0, "%U%c", format_vlib_pci_addr, &devconf->pci_addr, 0); } vec_add1 (conf->eal_init_args, tmp); } else if (num_whitelisted == 0 && devconf->is_blacklisted != 0 && devconf->dev_addr_type == VNET_DEV_ADDR_PCI) { tmp = format (0, "-b%c", 0); vec_add1 (conf->eal_init_args, tmp); tmp = format (0, "%U%c", format_vlib_pci_addr, &devconf->pci_addr, 0); vec_add1 (conf->eal_init_args, tmp); } } /* *INDENT-ON* */ #undef _ /* set master-lcore */ tmp = format (0, "--main-lcore%c", 0); vec_add1 (conf->eal_init_args, tmp); tmp = format (0, "%u%c", tm->main_lcore, 0); vec_add1 (conf->eal_init_args, tmp); if (socket_mem) clib_warning ("socket-mem argument is deprecated"); /* NULL terminate the "argv" vector, in case of stupidity */ vec_add1 (conf->eal_init_args, 0); _vec_len (conf->eal_init_args) -= 1; /* Set up DPDK eal and packet mbuf pool early. */ int log_fds[2] = { 0 }; if (pipe (log_fds) == 0) { if (fcntl (log_fds[1], F_SETFL, O_NONBLOCK) == 0) { FILE *f = fdopen (log_fds[1], "a"); if (f && rte_openlog_stream (f) == 0) { clib_file_t t = { 0 }; t.read_function = dpdk_log_read_ready; t.file_descriptor = log_fds[0]; t.description = format (0, "DPDK logging pipe"); clib_file_add (&file_main, &t); } } else { close (log_fds[0]); close (log_fds[1]); } } vm = vlib_get_main (); /* make copy of args as rte_eal_init tends to mess up with arg array */ for (i = 1; i < vec_len (conf->eal_init_args); i++) conf->eal_init_args_str = format (conf->eal_init_args_str, "%s ", conf->eal_init_args[i]); vec_terminate_c_string (conf->eal_init_args_str); dpdk_log_notice ("EAL init args: %s", conf->eal_init_args_str); ret = rte_eal_init (vec_len (conf->eal_init_args), (char **) conf->eal_init_args); /* enable the AVX-512 vPMDs in DPDK */ if (clib_cpu_supports_avx512_bitalg () && conf->max_simd_bitwidth == DPDK_MAX_SIMD_BITWIDTH_DEFAULT) rte_vect_set_max_simd_bitwidth (RTE_VECT_SIMD_512); else if (conf->max_simd_bitwidth != DPDK_MAX_SIMD_BITWIDTH_DEFAULT) rte_vect_set_max_simd_bitwidth (conf->max_simd_bitwidth == DPDK_MAX_SIMD_BITWIDTH_256 ? RTE_VECT_SIMD_256 : RTE_VECT_SIMD_512); /* lazy umount hugepages */ umount2 ((char *) huge_dir_path, MNT_DETACH); rmdir ((char *) huge_dir_path); vec_free (huge_dir_path); if (ret < 0) return clib_error_return (0, "rte_eal_init returned %d", ret); /* main thread 1st */ if ((error = dpdk_buffer_pools_create (vm))) return error; done: return error; } VLIB_CONFIG_FUNCTION (dpdk_config, "dpdk"); void dpdk_update_link_state (dpdk_device_t * xd, f64 now) { vnet_main_t *vnm = vnet_get_main (); struct rte_eth_link prev_link = xd->link; u32 hw_flags = 0; u8 hw_flags_chg = 0; /* only update link state for PMD interfaces */ if ((xd->flags & DPDK_DEVICE_FLAG_PMD) == 0) return; xd->time_last_link_update = now ? now : xd->time_last_link_update; clib_memset (&xd->link, 0, sizeof (xd->link)); rte_eth_link_get_nowait (xd->port_id, &xd->link); if (LINK_STATE_ELOGS) { ELOG_TYPE_DECLARE (e) = { .format = "update-link-state: sw_if_index %d, admin_up %d," "old link_state %d new link_state %d",.format_args = "i4i1i1i1",}; struct { u32 sw_if_index; u8 admin_up; u8 old_link_state; u8 new_link_state; } *ed; ed = ELOG_DATA (&vlib_global_main.elog_main, e); ed->sw_if_index = xd->sw_if_index; ed->admin_up = (xd->flags & DPDK_DEVICE_FLAG_ADMIN_UP) != 0; ed->old_link_state = (u8) vnet_hw_interface_is_link_up (vnm, xd->hw_if_index); ed->new_link_state = (u8) xd->link.link_status; } if ((xd->link.link_duplex != prev_link.link_duplex)) { hw_flags_chg = 1; switch (xd->link.link_duplex) { case ETH_LINK_HALF_DUPLEX: hw_flags |= VNET_HW_INTERFACE_FLAG_HALF_DUPLEX; break; case ETH_LINK_FULL_DUPLEX: hw_flags |= VNET_HW_INTERFACE_FLAG_FULL_DUPLEX; break; default: break; } } if (xd->link.link_speed != prev_link.link_speed) vnet_hw_interface_set_link_speed (vnm, xd->hw_if_index, xd->link.link_speed * 1000); if (xd->link.link_status != prev_link.link_status) { hw_flags_chg = 1; if (xd->link.link_status) hw_flags |= VNET_HW_INTERFACE_FLAG_LINK_UP; } if (hw_flags_chg) { if (LINK_STATE_ELOGS) { ELOG_TYPE_DECLARE (e) = { .format = "update-link-state: sw_if_index %d, new flags %d",.format_args = "i4i4",}; struct { u32 sw_if_index; u32 flags; } *ed; ed = ELOG_DATA (&vlib_global_main.elog_main, e); ed->sw_if_index = xd->sw_if_index; ed->flags = hw_flags; } vnet_hw_interface_set_flags (vnm, xd->hw_if_index, hw_flags); } } static uword dpdk_process (vlib_main_t * vm, vlib_node_runtime_t * rt, vlib_frame_t * f) { clib_error_t *error; dpdk_main_t *dm = &dpdk_main; dpdk_device_t *xd; vlib_thread_main_t *tm = vlib_get_thread_main (); error = dpdk_lib_init (dm); if (error) clib_error_report (error); if (dpdk_cryptodev_init) { error = dpdk_cryptodev_init (vm); if (error) { vlib_log_warn (dpdk_main.log_cryptodev, "%U", format_clib_error, error); clib_error_free (error); } } tm->worker_thread_release = 1; f64 now = vlib_time_now (vm); vec_foreach (xd, dm->devices) { dpdk_update_link_state (xd, now); } while (1) { /* * check each time through the loop in case intervals are changed */ f64 min_wait = dm->link_state_poll_interval < dm->stat_poll_interval ? dm->link_state_poll_interval : dm->stat_poll_interval; vlib_process_wait_for_event_or_clock (vm, min_wait); if (dm->admin_up_down_in_progress) /* skip the poll if an admin up down is in progress (on any interface) */ continue; vec_foreach (xd, dm->devices) { f64 now = vlib_time_now (vm); if ((now - xd->time_last_stats_update) >= dm->stat_poll_interval) dpdk_update_counters (xd, now); if ((now - xd->time_last_link_update) >= dm->link_state_poll_interval) dpdk_update_link_state (xd, now); } } return 0; } /* *INDENT-OFF* */ VLIB_REGISTER_NODE (dpdk_process_node,static) = { .function = dpdk_process, .type = VLIB_NODE_TYPE_PROCESS, .name = "dpdk-process", .process_log2_n_stack_bytes = 17, }; /* *INDENT-ON* */ static clib_error_t * dpdk_init (vlib_main_t * vm) { dpdk_main_t *dm = &dpdk_main; clib_error_t *error = 0; /* verify that structs are cacheline aligned */ STATIC_ASSERT (offsetof (dpdk_device_t, cacheline0) == 0, "Cache line marker must be 1st element in dpdk_device_t"); STATIC_ASSERT (offsetof (dpdk_device_t, cacheline1) == CLIB_CACHE_LINE_BYTES, "Data in cache line 0 is bigger than cache line size"); STATIC_ASSERT (offsetof (frame_queue_trace_t, cacheline0) == 0, "Cache line marker must be 1st element in frame_queue_trace_t"); STATIC_ASSERT (RTE_CACHE_LINE_SIZE == 1 << CLIB_LOG2_CACHE_LINE_BYTES, "DPDK RTE CACHE LINE SIZE does not match with 1<<CLIB_LOG2_CACHE_LINE_BYTES"); dpdk_cli_reference (); dm->vlib_main = vm; dm->vnet_main = vnet_get_main (); dm->conf = &dpdk_config_main; dm->conf->nchannels = 4; vec_add1 (dm->conf->eal_init_args, (u8 *) "vnet"); /* Default vlib_buffer_t flags, DISABLES tcp/udp checksumming... */ dm->buffer_flags_template = (VLIB_BUFFER_TOTAL_LENGTH_VALID | VLIB_BUFFER_EXT_HDR_VALID | VNET_BUFFER_F_L4_CHECKSUM_COMPUTED | VNET_BUFFER_F_L4_CHECKSUM_CORRECT); dm->stat_poll_interval = DPDK_STATS_POLL_INTERVAL; dm->link_state_poll_interval = DPDK_LINK_POLL_INTERVAL; dm->log_default = vlib_log_register_class ("dpdk", 0); dm->log_cryptodev = vlib_log_register_class ("dpdk", "cryptodev"); dm->log_ipsec = vlib_log_register_class ("dpdk", "ipsec"); return error; } VLIB_INIT_FUNCTION (dpdk_init); /* * fd.io coding-style-patch-verification: ON * * Local Variables: * eval: (c-set-style "gnu") * End: */