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/*
 * Copyright (c) 2015 Cisco and/or its affiliates.
 * Licensed under the Apache License, Version 2.0 (the "License");
 * you may not use this file except in compliance with the License.
 * You may obtain a copy of the License at:
 *
 *     http://www.apache.org/licenses/LICENSE-2.0
 *
 * Unless required by applicable law or agreed to in writing, software
 * distributed under the License is distributed on an "AS IS" BASIS,
 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 * See the License for the specific language governing permissions and
 * limitations under the License.
 */
/*
 * trace_funcs.h: VLIB trace buffer.
 *
 * Copyright (c) 2008 Eliot Dresselhaus
 *
 * Permission is hereby granted, free of charge, to any person obtaining
 * a copy of this software and associated documentation files (the
 * "Software"), to deal in the Software without restriction, including
 * without limitation the rights to use, copy, modify, merge, publish,
 * distribute, sublicense, and/or sell copies of the Software, and to
 * permit persons to whom the Software is furnished to do so, subject to
 * the following conditions:
 *
 * The above copyright notice and this permission notice shall be
 * included in all copies or substantial portions of the Software.
 *
 *  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
 *  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
 *  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
 *  NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
 *  LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
 *  OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
 *  WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 */

#ifndef included_vlib_trace_funcs_h
#define included_vlib_trace_funcs_h

extern u8 *vnet_trace_dummy;

always_inline void
vlib_validate_trace (vlib_trace_main_t * tm, vlib_buffer_t * b)
{
  /*
   * this assert seems right, but goes off constantly.
   * disabling it appears to make the pain go away
   */
  ASSERT (1 || b->flags & VLIB_BUFFER_IS_TRACED);
  ASSERT (!pool_is_free_index (tm->trace_buffer_pool, b->trace_index));
}

always_inline void *
vlib_add_trace (vlib_main_t * vm,
		vlib_node_runtime_t * r, vlib_buffer_t * b, u32 n_data_bytes)
{
  vlib_trace_main_t *tm = &vm->trace_main;
  vlib_trace_header_t *h;
  u32 n_data_words;

  ASSERT (vnet_trace_dummy);

  if (PREDICT_FALSE (tm->trace_enable == 0))
    {
      ASSERT (vec_len (vnet_trace_dummy) >= n_data_bytes + sizeof (*h));
      return vnet_trace_dummy;
    }

  vlib_validate_trace (tm, b);

  n_data_bytes = round_pow2 (n_data_bytes, sizeof (h[0]));
  n_data_words = n_data_bytes / sizeof (h[0]);
  vec_add2_aligned (tm->trace_buffer_pool[b->trace_index], h,
		    1 + n_data_words, sizeof (h[0]));

  h->time = vm->cpu_time_last_node_dispatch;
  h->n_data = n_data_words;
  h->node_index = r->node_index;

  return h->data;
}

always_inline vlib_trace_header_t *
vlib_trace_header_next (vlib_trace_header_t * h)
{
  return h + 1 + h->n_data;
}

always_inline void
vlib_free_trace (vlib_main_t * vm, vlib_buffer_t * b)
{
  vlib_trace_main_t *tm = &vm->trace_main;
  vlib_validate_trace (tm, b);
  _vec_len (tm->trace_buffer_pool[b->trace_index]) = 0;
  pool_put_index (tm->trace_buffer_pool, b->trace_index);
}

always_inline void
vlib_trace_next_frame (vlib_main_t * vm,
		       vlib_node_runtime_t * r, u32 next_index)
{
  vlib_next_frame_t *nf;
  nf = vlib_node_runtime_get_next_frame (vm, r, next_index);
  nf->flags |= VLIB_FRAME_TRACE;
}

void trace_apply_filter (vlib_main_t * vm);

/* Mark buffer as traced and allocate trace buffer. */
always_inline void
vlib_trace_buffer (vlib_main_t * vm,
		   vlib_node_runtime_t * r,
		   u32 next_index, vlib_buffer_t * b, int follow_chain)
{
  vlib_trace_main_t *tm = &vm->trace_main;
  vlib_trace_header_t **h;

  if (PREDICT_FALSE (tm->trace_enable == 0))
    return;

  /*
   * Apply filter to existing traces to keep number of allocated traces low.
   * Performed each time around the main loop.
   */
  if (tm->last_main_loop_count != vm->main_loop_count)
    {
      tm->last_main_loop_count = vm->main_loop_count;
      trace_apply_filter (vm);
    }

  vlib_trace_next_frame (vm, r, next_index);

  pool_get (tm->trace_buffer_pool, h);

  do
    {
      b->flags |= VLIB_BUFFER_IS_TRACED;
      b->trace_index = h - tm->trace_buffer_pool;
    }
  while (follow_chain && (b = vlib_get_next_buffer (vm, b)));
}

always_inline void
vlib_buffer_copy_trace_flag (vlib_main_t * vm, vlib_buffer_t * b,
			     u32 bi_target)
{
  vlib_buffer_t *b_target = vlib_get_buffer (vm, bi_target);
  b_target->flags |= b->flags & VLIB_BUFFER_IS_TRACED;
  b_target->trace_index = b->trace_index;
}

always_inline u32
vlib_get_trace_count (vlib_main_t * vm, vlib_node_runtime_t * rt)
{
  vlib_trace_main_t *tm = &vm->trace_main;
  vlib_trace_node_t *tn;
  int n;

  if (rt->node_index >= vec_len (tm->nodes))
    return 0;
  tn = tm->nodes + rt->node_index;
  n = tn->limit - tn->count;
  ASSERT (n >= 0);

  return n;
}

always_inline void
vlib_set_trace_count (vlib_main_t * vm, vlib_node_runtime_t * rt, u32 count)
{
  vlib_trace_main_t *tm = &vm->trace_main;
  vlib_trace_node_t *tn = vec_elt_at_index (tm->nodes, rt->node_index);

  ASSERT (count <= tn->limit);
  tn->count = tn->limit - count;
}

/* Helper function for nodes which only trace buffer data. */
void
vlib_trace_frame_buffers_only (vlib_main_t * vm,
			       vlib_node_runtime_t * node,
			       u32 * buffers,
			       uword n_buffers,
			       uword next_buffer_stride,
			       uword n_buffer_data_bytes_in_trace);

#endif /* included_vlib_trace_funcs_h */

/*
 * fd.io coding-style-patch-verification: ON
 *
 * Local Variables:
 * eval: (c-set-style "gnu")
 * End:
 */
ass="n">hosts_by_pg_idx[dst_if.sw_if_index]) src_host = random.choice(self.hosts_by_pg_idx[src_if.sw_if_index]) pkt_info = self.create_packet_info(src_if, dst_if) payload = self.info_to_payload(pkt_info) p = (Ether(dst=dst_host.mac, src=src_host.mac) / IP(src=src_host.ip4, dst=dst_host.ip4) / UDP(sport=1234, dport=1234) / Raw(payload)) pkt_info.data = p.copy() if do_dot1 and hasattr(src_if, 'sub_if'): p = src_if.sub_if.add_dot1_layer(p) size = random.choice(packet_sizes) self.extend_packet(p, size) return p def _add_tag(self, packet, vlan, tag_type): payload = packet.payload inner_type = packet.type packet.remove_payload() packet.add_payload(Dot1Q(vlan=vlan) / payload) packet.payload.type = inner_type packet.payload.vlan = vlan packet.type = tag_type return packet def _remove_tag(self, packet, vlan=None, tag_type=None): if tag_type: self.assertEqual(packet.type, tag_type) payload = packet.payload if vlan: self.assertEqual(payload.vlan, vlan) inner_type = payload.type payload = payload.payload packet.remove_payload() packet.add_payload(payload) packet.type = inner_type def add_tags(self, packet, tags): for t in reversed(tags): self._add_tag(packet, t.vlan, t.dot1) def remove_tags(self, packet, tags): for t in tags: self._remove_tag(packet, t.vlan, t.dot1) def vtr_test(self, swif, tags): p = self.create_packet(swif, self.pg0) swif.add_stream(p) self.pg_enable_capture(self.pg_interfaces) self.pg_start() rx = self.pg0.get_capture(1) if tags: self.remove_tags(rx[0], tags) self.assertTrue(Dot1Q not in rx[0]) if not tags: return i = VppDot1QSubint(self, self.pg0, tags[0].vlan) self.vapi.sw_interface_set_l2_bridge(rx_sw_if_index=i.sw_if_index, bd_id=self.bd_id, enable=1) i.admin_up() p = self.create_packet(self.pg0, swif, do_dot1=False) self.add_tags(p, tags) self.pg0.add_stream(p) self.pg_enable_capture(self.pg_interfaces) self.pg_start() rx = swif.get_capture(1) swif.sub_if.remove_dot1_layer(rx[0]) self.assertTrue(Dot1Q not in rx[0]) self.vapi.sw_interface_set_l2_bridge(rx_sw_if_index=i.sw_if_index, bd_id=self.bd_id, enable=0) i.remove_vpp_config() def test_1ad_vtr_pop_1(self): """ 1AD VTR pop 1 test """ self.pg1.sub_if.set_vtr(L2_VTR_OP.L2_POP_1) self.vtr_test(self.pg1, [Tag(dot1=DOT1Q, vlan=100)]) def test_1ad_vtr_pop_2(self): """ 1AD VTR pop 2 test """ self.pg1.sub_if.set_vtr(L2_VTR_OP.L2_POP_2) self.vtr_test(self.pg1, []) def test_1ad_vtr_push_1ad(self): """ 1AD VTR push 1 1AD test """ self.pg1.sub_if.set_vtr(L2_VTR_OP.L2_PUSH_1, tag=300) self.vtr_test(self.pg1, [Tag(dot1=DOT1AD, vlan=300), Tag(dot1=DOT1AD, vlan=200), Tag(dot1=DOT1Q, vlan=100)]) def test_1ad_vtr_push_2ad(self): """ 1AD VTR push 2 1AD test """ self.pg1.sub_if.set_vtr(L2_VTR_OP.L2_PUSH_2, outer=400, inner=300) self.vtr_test(self.pg1, [Tag(dot1=DOT1AD, vlan=400), Tag(dot1=DOT1Q, vlan=300), Tag(dot1=DOT1AD, vlan=200), Tag(dot1=DOT1Q, vlan=100)]) def test_1ad_vtr_push_1q(self): """ 1AD VTR push 1 1Q test """ self.pg1.sub_if.set_vtr(L2_VTR_OP.L2_PUSH_1, tag=300, push1q=1) self.vtr_test(self.pg1, [Tag(dot1=DOT1Q, vlan=300), Tag(dot1=DOT1AD, vlan=200), Tag(dot1=DOT1Q, vlan=100)]) def test_1ad_vtr_push_2q(self): """ 1AD VTR push 2 1Q test """ self.pg1.sub_if.set_vtr(L2_VTR_OP.L2_PUSH_2, outer=400, inner=300, push1q=1) self.vtr_test(self.pg1, [Tag(dot1=DOT1Q, vlan=400), Tag(dot1=DOT1Q, vlan=300), Tag(dot1=DOT1AD, vlan=200), Tag(dot1=DOT1Q, vlan=100)]) def test_1ad_vtr_translate_1_1ad(self): """ 1AD VTR translate 1 -> 1 1AD test """ self.pg1.sub_if.set_vtr(L2_VTR_OP.L2_TRANSLATE_1_1, tag=300) self.vtr_test(self.pg1, [Tag(dot1=DOT1AD, vlan=300), Tag(dot1=DOT1Q, vlan=100)]) def test_1ad_vtr_translate_1_2ad(self): """ 1AD VTR translate 1 -> 2 1AD test """ self.pg1.sub_if.set_vtr( L2_VTR_OP.L2_TRANSLATE_1_2, inner=300, outer=400) self.vtr_test(self.pg1, [Tag(dot1=DOT1AD, vlan=400), Tag(dot1=DOT1Q, vlan=300), Tag(dot1=DOT1Q, vlan=100)]) def test_1ad_vtr_translate_2_1ad(self): """ 1AD VTR translate 2 -> 1 1AD test """ self.pg1.sub_if.set_vtr(L2_VTR_OP.L2_TRANSLATE_2_1, tag=300) self.vtr_test(self.pg1, [Tag(dot1=DOT1AD, vlan=300)]) def test_1ad_vtr_translate_2_2ad(self): """ 1AD VTR translate 2 -> 2 1AD test """ self.pg1.sub_if.set_vtr( L2_VTR_OP.L2_TRANSLATE_2_2, inner=300, outer=400) self.vtr_test(self.pg1, [Tag(dot1=DOT1AD, vlan=400), Tag(dot1=DOT1Q, vlan=300)]) def test_1ad_vtr_translate_1_1q(self): """ 1AD VTR translate 1 -> 1 1Q test """ self.pg1.sub_if.set_vtr(L2_VTR_OP.L2_TRANSLATE_1_1, tag=300, push1q=1) self.vtr_test(self.pg1, [Tag(dot1=DOT1Q, vlan=300), Tag(dot1=DOT1Q, vlan=100)]) def test_1ad_vtr_translate_1_2q(self): """ 1AD VTR translate 1 -> 2 1Q test """ self.pg1.sub_if.set_vtr( L2_VTR_OP.L2_TRANSLATE_1_2, inner=300, outer=400, push1q=1) self.vtr_test(self.pg1, [Tag(dot1=DOT1Q, vlan=400), Tag(dot1=DOT1Q, vlan=300), Tag(dot1=DOT1Q, vlan=100)]) def test_1ad_vtr_translate_2_1q(self): """ 1AD VTR translate 2 -> 1 1Q test """ self.pg1.sub_if.set_vtr(L2_VTR_OP.L2_TRANSLATE_2_1, tag=300, push1q=1) self.vtr_test(self.pg1, [Tag(dot1=DOT1Q, vlan=300)]) def test_1ad_vtr_translate_2_2q(self): """ 1AD VTR translate 2 -> 2 1Q test """ self.pg1.sub_if.set_vtr( L2_VTR_OP.L2_TRANSLATE_2_2, inner=300, outer=400, push1q=1) self.vtr_test(self.pg1, [Tag(dot1=DOT1Q, vlan=400), Tag(dot1=DOT1Q, vlan=300)]) def test_1q_vtr_pop_1(self): """ 1Q VTR pop 1 test """ self.pg2.sub_if.set_vtr(L2_VTR_OP.L2_POP_1) self.vtr_test(self.pg2, []) def test_1q_vtr_push_1(self): """ 1Q VTR push 1 test """ self.pg2.sub_if.set_vtr(L2_VTR_OP.L2_PUSH_1, tag=300) self.vtr_test(self.pg2, [Tag(dot1=DOT1AD, vlan=300), Tag(dot1=DOT1Q, vlan=200)]) def test_1q_vtr_push_2(self): """ 1Q VTR push 2 test """ self.pg2.sub_if.set_vtr(L2_VTR_OP.L2_PUSH_2, outer=400, inner=300) self.vtr_test(self.pg2, [Tag(dot1=DOT1AD, vlan=400), Tag(dot1=DOT1Q, vlan=300), Tag(dot1=DOT1Q, vlan=200)]) def test_1q_vtr_translate_1_1(self): """ 1Q VTR translate 1 -> 1 test """ self.pg2.sub_if.set_vtr(L2_VTR_OP.L2_TRANSLATE_1_1, tag=300) self.vtr_test(self.pg2, [Tag(dot1=DOT1AD, vlan=300)]) def test_1q_vtr_translate_1_2(self): """ 1Q VTR translate 1 -> 2 test """ self.pg2.sub_if.set_vtr( L2_VTR_OP.L2_TRANSLATE_1_2, inner=300, outer=400) self.vtr_test(self.pg2, [Tag(dot1=DOT1AD, vlan=400), Tag(dot1=DOT1Q, vlan=300)]) def test_if_vtr_disable(self): """ Disable VTR on non-sub-interfaces """ # First set the VTR fields to junk self.vapi.l2_interface_vlan_tag_rewrite( sw_if_index=self.pg0.sw_if_index, vtr_op=L2_VTR_OP.L2_PUSH_2, push_dot1q=1, tag1=19, tag2=630) if_state = self.vapi.sw_interface_dump( sw_if_index=self.pg0.sw_if_index) self.assertEqual(if_state[0].sw_if_index, self.pg0.sw_if_index) self.assertNotEqual(if_state[0].vtr_op, L2_VTR_OP.L2_DISABLED) # Then ensure that a request to disable VTR is honored. self.vapi.l2_interface_vlan_tag_rewrite( sw_if_index=self.pg0.sw_if_index, vtr_op=L2_VTR_OP.L2_DISABLED) if_state = self.vapi.sw_interface_dump( sw_if_index=self.pg0.sw_if_index) self.assertEqual(if_state[0].sw_if_index, self.pg0.sw_if_index) self.assertEqual(if_state[0].vtr_op, L2_VTR_OP.L2_DISABLED) def test_if_vtr_push_1q(self): """ 1Q VTR push 1 on non-sub-interfaces """ self.vapi.l2_interface_vlan_tag_rewrite( sw_if_index=self.pg0.sw_if_index, vtr_op=L2_VTR_OP.L2_PUSH_1, push_dot1q=1, tag1=150) if_state = self.vapi.sw_interface_dump( sw_if_index=self.pg0.sw_if_index) self.assertEqual(if_state[0].sw_if_index, self.pg0.sw_if_index) self.assertEqual(if_state[0].vtr_op, L2_VTR_OP.L2_PUSH_1) self.assertEqual(if_state[0].vtr_tag1, 150) self.assertNotEqual(if_state[0].vtr_push_dot1q, 0) def test_if_vtr_push_2ad(self): """ 1AD VTR push 2 on non-sub-interfaces """ self.vapi.l2_interface_vlan_tag_rewrite( sw_if_index=self.pg0.sw_if_index, vtr_op=L2_VTR_OP.L2_PUSH_2, push_dot1q=0, tag1=450, tag2=350) if_state = self.vapi.sw_interface_dump( sw_if_index=self.pg0.sw_if_index) self.assertEqual(if_state[0].sw_if_index, self.pg0.sw_if_index) self.assertEqual(if_state[0].vtr_op, L2_VTR_OP.L2_PUSH_2) self.assertEqual(if_state[0].vtr_tag1, 450) # outer self.assertEqual(if_state[0].vtr_tag2, 350) # inner self.assertEqual(if_state[0].vtr_push_dot1q, 0) if __name__ == '__main__': unittest.main(testRunner=VppTestRunner)