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authorMaciek Konstantynowicz <mkonstan@cisco.com>2020-12-16 13:07:42 +0000
committerMaciek Konstantynowicz <mkonstan@cisco.com>2020-12-16 13:07:42 +0000
commita28e97a231fbddc2cc04f073dd8b402c29cc5aaf (patch)
treece3673429ce3e0c6927477cfbaa42f43934fa057 /docs/report/introduction/physical_testbeds.rst
parent810b48dd48c8cfd6c3e6d0a0c6099846977709a9 (diff)
report: added report static content for new testbed type AMD EPYC Zen2 7532
Change-Id: I9099cce7c4da15a1b3a9aafd37825b284c5ed7fe Signed-off-by: Maciek Konstantynowicz <mkonstan@cisco.com>
Diffstat (limited to 'docs/report/introduction/physical_testbeds.rst')
-rw-r--r--docs/report/introduction/physical_testbeds.rst44
1 files changed, 43 insertions, 1 deletions
diff --git a/docs/report/introduction/physical_testbeds.rst b/docs/report/introduction/physical_testbeds.rst
index 3776c03d72..1c6bc1c267 100644
--- a/docs/report/introduction/physical_testbeds.rst
+++ b/docs/report/introduction/physical_testbeds.rst
@@ -29,7 +29,8 @@ the following processor architectures:
- Intel Xeon: Skylake Platinum 8180, Haswell-SP E5-2699v3,
Cascade Lake Platinum 8280, Cascade Lake 6252N.
- Intel Atom: Denverton C3858.
-- ARM: TaiShan 2280, hip07-d05.
+- Arm: TaiShan 2280, hip07-d05.
+- AMD EPYC: Zen2 7532.
Server SUT performance depends on server and processor type, hence
results for testbeds based on different servers must be reported
@@ -41,6 +42,47 @@ https://git.fd.io/csit/tree/docs/lab/testbed_specifications.md.
Following is the description of existing production testbeds.
+2-Node AMD EPYC Zen2 (2n-zn2)
+-----------------------------
+
+One 2n-zn2 testbed in in operation in FD.io labs. It is built based on
+two SuperMicro SuperMicro AS-1114S-WTRT servers, with SUT and TG servers
+equipped with one AMD EPYC Zen2 7532 processor each (256 MB Cache, 2.40
+GHz, 32 cores). 2n-zn2 physical topology is shown below.
+
+.. only:: latex
+
+ .. raw:: latex
+
+ \begin{figure}[H]
+ \centering
+ \graphicspath{{../_tmp/src/introduction/}}
+ \includegraphics[width=0.90\textwidth]{testbed-2n-zn2}
+ \label{fig:testbed-2n-zn2}
+ \end{figure}
+
+.. only:: html
+
+ .. figure:: testbed-2n-zn2.svg
+ :alt: testbed-2n-zn2
+ :align: center
+
+SUT server is populated with the following NIC models:
+
+#. NIC-1: x710-DA4 4p10GE Intel.
+#. NIC-2: xxv710-DA2 2p25GE Intel.
+#. NIC-3: cx556a-edat ConnectX5 2p100GE Mellanox.
+
+TG server runs TRex application and is populated with the following
+NIC models:
+
+#. NIC-1: x710-DA4 4p10GE Intel.
+#. NIC-2: xxv710-DA2 2p25GE Intel.
+#. NIC-3: cx556a-edat ConnectX5 2p100GE Mellanox.
+
+All AMD EPYC Zen2 7532 servers run with AMD SMT enabled, doubling the
+number of logical cores exposed to Linux.
+
2-Node Xeon Cascade Lake (2n-clx)
---------------------------------