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authorTibor Frank <tifrank@cisco.com>2020-02-17 07:43:20 +0100
committerTibor Frank <tifrank@cisco.com>2020-02-17 08:32:47 +0100
commit997a634a6658d3d07ff84fc54e156ebd805fec74 (patch)
tree6133df0034fb3dc6da03efd59ce1dc45ac338e90 /docs/report/introduction/test_environment_intro.rst
parent35bbc3657be85c9653f3cbf6e73e722588c392ea (diff)
PAL: Fix pdf
Change-Id: I8dfb53c8b6231663a600bd0ec81f7915d8db09f0 Signed-off-by: Tibor Frank <tifrank@cisco.com>
Diffstat (limited to 'docs/report/introduction/test_environment_intro.rst')
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diff --git a/docs/report/introduction/test_environment_intro.rst b/docs/report/introduction/test_environment_intro.rst
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@@ -37,16 +37,16 @@ as impacting data plane performance tests. Calibrating those parameters
is part of FD.io CSIT pre-test activities, and includes measuring and
reporting following:
-#. System level core jitter – measure duration of core interrupts by
+#. System level core jitter - measure duration of core interrupts by
Linux in clock cycles and how often interrupts happen. Using
`CPU core jitter tool <https://git.fd.io/pma_tools/tree/jitter>`_.
-#. Memory bandwidth – measure bandwidth with `Intel MLC tool
+#. Memory bandwidth - measure bandwidth with `Intel MLC tool
<https://software.intel.com/en-us/articles/intelr-memory-latency-checker>`_.
-#. Memory latency – measure memory latency with Intel MLC tool.
+#. Memory latency - measure memory latency with Intel MLC tool.
-#. Cache latency at all levels (L1, L2, and Last Level Cache) – measure
+#. Cache latency at all levels (L1, L2, and Last Level Cache) - measure
cache latency with Intel MLC tool.
Measured values of listed parameters are especially important for