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| author |   Tibor Frank <tifrank@cisco.com> | 2018-11-05 15:01:37 +0100 |
|---|---|---|
| committer | Tibor Frank <tifrank@cisco.com> | 2018-11-05 15:01:37 +0100 |
| commit | b641b5bf12a0d1b63ac9afb7c89133297d3b63fe (patch) | |
| tree | 88342914639827399e40c68bf6c029f9e53cea3b /docs/report/vpp_performance_tests/packet_throughput_graphs/ip4_tunnels.rst | |
| parent | 312e541e0cc53a10429c40b41ad7f22ae4b8adc2 (diff) | |
CSIT-1342: Edit the static content for CSIT-1810 report
Change-Id: I44abd4ad646813cc70e9fa2b46b51ee7613dc501
Signed-off-by: Tibor Frank <tifrank@cisco.com>
Diffstat (limited to 'docs/report/vpp_performance_tests/packet_throughput_graphs/ip4_tunnels.rst')
| -rw-r--r-- | docs/report/vpp_performance_tests/packet_throughput_graphs/ip4_tunnels.rst | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/docs/report/vpp_performance_tests/packet_throughput_graphs/ip4_tunnels.rst b/docs/report/vpp_performance_tests/packet_throughput_graphs/ip4_tunnels.rst index 4f24afe2b4..7a818d91c7 100644 --- a/docs/report/vpp_performance_tests/packet_throughput_graphs/ip4_tunnels.rst +++ b/docs/report/vpp_performance_tests/packet_throughput_graphs/ip4_tunnels.rst @@ -40,6 +40,10 @@ data plane thread(s), and their physical CPU core(s) placement. CSIT source code for the test cases used for plots can be found in `CSIT git repository <https://git.fd.io/csit/tree/tests/vpp/perf/ip4_tunnels?h=rls1810>`_. +.. raw:: latex + + \clearpage + 3n-hsw-x520 ~~~~~~~~~~~ |