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| author |   Tibor Frank <tifrank@cisco.com> | 2019-08-19 15:25:47 +0200 |
|---|---|---|
| committer | Tibor Frank <tifrank@cisco.com> | 2019-08-26 09:14:50 +0200 |
| commit | 33cfe1217cb2d6bc9655b01f200b0ec8d5ccb466 (patch) | |
| tree | 374ac3120edb635caab74d21b6a09c7401e3068e /docs/report/vpp_performance_tests/throughput_speedup_multi_core/ipsec.rst | |
| parent | ff820e3d53434889aacde2373314c3be8d00f765 (diff) | |
Report: Select tests by name, specifications
Change-Id: Ibcc5e67d49fba9c02b07af462a74d2a062412979
Signed-off-by: Tibor Frank <tifrank@cisco.com>
Diffstat (limited to 'docs/report/vpp_performance_tests/throughput_speedup_multi_core/ipsec.rst')
| -rw-r--r-- | docs/report/vpp_performance_tests/throughput_speedup_multi_core/ipsec.rst | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/docs/report/vpp_performance_tests/throughput_speedup_multi_core/ipsec.rst b/docs/report/vpp_performance_tests/throughput_speedup_multi_core/ipsec.rst index d612a8acce..2b6f4f4d2d 100644 --- a/docs/report/vpp_performance_tests/throughput_speedup_multi_core/ipsec.rst +++ b/docs/report/vpp_performance_tests/throughput_speedup_multi_core/ipsec.rst @@ -17,8 +17,9 @@ VPP worker thread(s), a.k.a. VPP data plane thread(s), and their physical CPU core(s) placement. CSIT source code for the test cases used for plots can be found in -`CSIT git repository <https://git.fd.io/csit/tree/tests/vpp/perf/crypto?h=rls1901>`_. +`CSIT git repository <https://git.fd.io/csit/tree/tests/vpp/perf/crypto?h=rls1908>`_. .. toctree:: + ipsec-3n-skx-xxv710 ipsec-3n-hsw-xl710 |