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| author |   Tibor Frank <tifrank@cisco.com> | 2022-10-18 10:06:06 +0200 |
|---|---|---|
| committer | Tibor Frank <tifrank@cisco.com> | 2022-10-18 10:06:06 +0200 |
| commit | 4b246a2bf50fd42ec3343dc317e7828d8b0d82da (patch) | |
| tree | 517cdf5699c729641cc8416da1723e6ca6132732 /docs/report/vpp_performance_tests/throughput_speedup_multi_core/ipsec.rst | |
| parent | 3c84a95372474fd32202e1b3d1fd8b0eb821b0b6 (diff) | |
Report: Add 3n-snr dpdk tests
Signed-off-by: Tibor Frank <tifrank@cisco.com>
Change-Id: I6b1f9d50bbaa8f0a632e96cba510d6b53900892a
Diffstat (limited to 'docs/report/vpp_performance_tests/throughput_speedup_multi_core/ipsec.rst')
| -rw-r--r-- | docs/report/vpp_performance_tests/throughput_speedup_multi_core/ipsec.rst | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/docs/report/vpp_performance_tests/throughput_speedup_multi_core/ipsec.rst b/docs/report/vpp_performance_tests/throughput_speedup_multi_core/ipsec.rst index fac15f394d..9ed4df8ce1 100644 --- a/docs/report/vpp_performance_tests/throughput_speedup_multi_core/ipsec.rst +++ b/docs/report/vpp_performance_tests/throughput_speedup_multi_core/ipsec.rst @@ -17,7 +17,7 @@ VPP worker thread(s), a.k.a. VPP data plane thread(s), and their physical CPU core(s) placement. CSIT source code for the test cases used for plots can be found in -`CSIT git repository <https://git.fd.io/csit/tree/tests/vpp/perf/crypto?h=rls2206>`_. +`CSIT git repository <https://git.fd.io/csit/tree/tests/vpp/perf/crypto?h=rls2210>`_. .. toctree:: |