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| author |   Tibor Frank <tifrank@cisco.com> | 2019-02-11 12:28:21 +0100 |
|---|---|---|
| committer | Tibor Frank <tifrank@cisco.com> | 2019-02-11 15:08:48 +0100 |
| commit | 53310a9c512daecbe20a45eb48f5167ea5a6a8b2 (patch) | |
| tree | e1c9efd8d0016fa4d42c0d5dd597593cf11a40e3 /docs/report/vpp_performance_tests/throughput_speedup_multi_core/ipsec.rst | |
| parent | adab3cb4d5abc7f555f40b5f268fb611a77cace5 (diff) | |
Report: Remove index
Change-Id: I477711ef75e07db26e36b3567883f9a7feb45a09
Signed-off-by: Tibor Frank <tifrank@cisco.com>
Diffstat (limited to 'docs/report/vpp_performance_tests/throughput_speedup_multi_core/ipsec.rst')
| -rw-r--r-- | docs/report/vpp_performance_tests/throughput_speedup_multi_core/ipsec.rst | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/docs/report/vpp_performance_tests/throughput_speedup_multi_core/ipsec.rst b/docs/report/vpp_performance_tests/throughput_speedup_multi_core/ipsec.rst index 0965f0a58e..d612a8acce 100644 --- a/docs/report/vpp_performance_tests/throughput_speedup_multi_core/ipsec.rst +++ b/docs/report/vpp_performance_tests/throughput_speedup_multi_core/ipsec.rst @@ -17,7 +17,7 @@ VPP worker thread(s), a.k.a. VPP data plane thread(s), and their physical CPU core(s) placement. CSIT source code for the test cases used for plots can be found in -`CSIT git repository <https://git.fd.io/csit/tree/tests/vpp/perf/crypto?h=rls1810>`_. +`CSIT git repository <https://git.fd.io/csit/tree/tests/vpp/perf/crypto?h=rls1901>`_. .. toctree:: |