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| author |   Tibor Frank <tifrank@cisco.com> | 2021-01-05 14:12:40 +0100 |
|---|---|---|
| committer | Tibor Frank <tifrank@cisco.com> | 2021-01-11 08:46:06 +0100 |
| commit | fc3f7fa58880d2327c3364bbcf8338d2256fb8f0 (patch) | |
| tree | a6763fb7048caec1d03bd58e25bb0971213a6e4e /docs/report/vpp_performance_tests/throughput_speedup_multi_core/l2.rst | |
| parent | e42ba705ccac080dfa5fd4d1bd2f3c1bb897ecff (diff) | |
Report: Configure report
Change-Id: I1c64758f937c34a8f3956a5aa6512bb16a9dfe62
Signed-off-by: Tibor Frank <tifrank@cisco.com>
Diffstat (limited to 'docs/report/vpp_performance_tests/throughput_speedup_multi_core/l2.rst')
| -rw-r--r-- | docs/report/vpp_performance_tests/throughput_speedup_multi_core/l2.rst | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/docs/report/vpp_performance_tests/throughput_speedup_multi_core/l2.rst b/docs/report/vpp_performance_tests/throughput_speedup_multi_core/l2.rst index 5b88488824..23eeea357a 100644 --- a/docs/report/vpp_performance_tests/throughput_speedup_multi_core/l2.rst +++ b/docs/report/vpp_performance_tests/throughput_speedup_multi_core/l2.rst @@ -29,9 +29,6 @@ CSIT source code for the test cases used for plots can be found in l2-2n-zn2-xxv710 l2-2n-zn2-x710 l2-2n-zn2-cx556a - l2-2n-zn2-turbo-xxv710 - l2-2n-zn2-turbo-x710 - l2-2n-zn2-turbo-cx556a l2-3n-hsw-xl710 l2-3n-tsh-x520 l2-2n-dnv-x553 |