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-rw-r--r--docs/report/introduction/test_environment_intro.rst27
-rw-r--r--docs/report/introduction/test_environment_pre_test_server_calib.rst26
-rw-r--r--docs/report/introduction/test_environment_sut_calib_clx.rst16
-rw-r--r--docs/report/introduction/test_environment_sut_calib_dnv.rst16
-rw-r--r--docs/report/introduction/test_environment_sut_calib_hsw.rst16
-rw-r--r--docs/report/introduction/test_environment_sut_calib_skx.rst16
-rw-r--r--docs/report/introduction/test_environment_sut_calib_tsh.rst10
7 files changed, 63 insertions, 64 deletions
diff --git a/docs/report/introduction/test_environment_intro.rst b/docs/report/introduction/test_environment_intro.rst
index da817f269d..7c4d5dfc9f 100644
--- a/docs/report/introduction/test_environment_intro.rst
+++ b/docs/report/introduction/test_environment_intro.rst
@@ -28,30 +28,3 @@ physical testbeds are maintained in FD.io CSIT repository:
`FD.io CSIT testbeds - Xeon Cascade Lake`_,
`FD.io CSIT testbeds - Xeon Skylake, Arm, Atom`_ and
`FD.io CSIT Testbeds - Xeon Haswell`_.
-
-Pre-Test Server Calibration
----------------------------
-
-Number of SUT server sub-system runtime parameters have been identified
-as impacting data plane performance tests. Calibrating those parameters
-is part of FD.io CSIT pre-test activities, and includes measuring and
-reporting following:
-
-#. System level core jitter - measure duration of core interrupts by
- Linux in clock cycles and how often interrupts happen. Using
- `CPU core jitter tool <https://git.fd.io/pma_tools/tree/jitter>`_.
-
-#. Memory bandwidth - measure bandwidth with `Intel MLC tool
- <https://software.intel.com/en-us/articles/intelr-memory-latency-checker>`_.
-
-#. Memory latency - measure memory latency with Intel MLC tool.
-
-#. Cache latency at all levels (L1, L2, and Last Level Cache) - measure
- cache latency with Intel MLC tool.
-
-Measured values of listed parameters are especially important for
-repeatable zero packet loss throughput measurements across multiple
-system instances. Generally they come useful as a background data for
-comparing data plane performance results across disparate servers.
-
-Following sections include measured calibration data for testbeds.
diff --git a/docs/report/introduction/test_environment_pre_test_server_calib.rst b/docs/report/introduction/test_environment_pre_test_server_calib.rst
new file mode 100644
index 0000000000..325c61b212
--- /dev/null
+++ b/docs/report/introduction/test_environment_pre_test_server_calib.rst
@@ -0,0 +1,26 @@
+Pre-Test Server Calibration
+---------------------------
+
+Number of SUT server sub-system runtime parameters have been identified
+as impacting data plane performance tests. Calibrating those parameters
+is part of FD.io CSIT pre-test activities, and includes measuring and
+reporting following:
+
+#. System level core jitter - measure duration of core interrupts by
+ Linux in clock cycles and how often interrupts happen. Using
+ `CPU core jitter tool <https://git.fd.io/pma_tools/tree/jitter>`_.
+
+#. Memory bandwidth - measure bandwidth with `Intel MLC tool
+ <https://software.intel.com/en-us/articles/intelr-memory-latency-checker>`_.
+
+#. Memory latency - measure memory latency with Intel MLC tool.
+
+#. Cache latency at all levels (L1, L2, and Last Level Cache) - measure
+ cache latency with Intel MLC tool.
+
+Measured values of listed parameters are especially important for
+repeatable zero packet loss throughput measurements across multiple
+system instances. Generally they come useful as a background data for
+comparing data plane performance results across disparate servers.
+
+Following sections include measured calibration data for testbeds.
diff --git a/docs/report/introduction/test_environment_sut_calib_clx.rst b/docs/report/introduction/test_environment_sut_calib_clx.rst
index e12b0af693..ed44eb92d2 100644
--- a/docs/report/introduction/test_environment_sut_calib_clx.rst
+++ b/docs/report/introduction/test_environment_sut_calib_clx.rst
@@ -1,5 +1,5 @@
-Calibration Data - Cascade Lake
--------------------------------
+Cascade Lake
+~~~~~~~~~~~~
Following sections include sample calibration data measured on
s32-t27-sut1 server running in one of the Intel Xeon Skylake testbeds as
@@ -10,7 +10,7 @@ shows the same or similar values.
Linux cmdline
-~~~~~~~~~~~~~
+^^^^^^^^^^^^^
::
@@ -18,7 +18,7 @@ Linux cmdline
BOOT_IMAGE=/boot/vmlinuz-4.15.0-72-generic root=UUID=1d03969e-a2a0-41b2-a97e-1cc171b07e88 ro isolcpus=1-23,25-47,49-71,73-95 nohz_full=1-23,25-47,49-71,73-95 rcu_nocbs=1-23,25-47,49-71,73-95 numa_balancing=disable intel_pstate=disable intel_iommu=on iommu=pt nmi_watchdog=0 audit=0 nosoftlockup processor.max_cstate=1 intel_idle.max_cstate=1 hpet=disable tsc=reliable mce=off console=tty0 console=ttyS0,115200n8
Linux uname
-~~~~~~~~~~~
+^^^^^^^^^^^
::
@@ -27,7 +27,7 @@ Linux uname
System-level Core Jitter
-~~~~~~~~~~~~~~~~~~~~~~~~
+^^^^^^^^^^^^^^^^^^^^^^^^
::
@@ -82,7 +82,7 @@ System-level Core Jitter
Memory Bandwidth
-~~~~~~~~~~~~~~~~
+^^^^^^^^^^^^^^^^
::
@@ -139,7 +139,7 @@ Memory Bandwidth
Memory Latency
-~~~~~~~~~~~~~~
+^^^^^^^^^^^^^^
::
@@ -199,7 +199,7 @@ Memory Latency
L1/L2/LLC Latency
-~~~~~~~~~~~~~~~~~
+^^^^^^^^^^^^^^^^^
::
diff --git a/docs/report/introduction/test_environment_sut_calib_dnv.rst b/docs/report/introduction/test_environment_sut_calib_dnv.rst
index 3365552bb2..13f980656a 100644
--- a/docs/report/introduction/test_environment_sut_calib_dnv.rst
+++ b/docs/report/introduction/test_environment_sut_calib_dnv.rst
@@ -1,5 +1,5 @@
-Calibration Data - Denverton
-----------------------------
+Denverton
+~~~~~~~~~
Following sections include sample calibration data measured on
Denverton server at Intel SH labs.
@@ -9,7 +9,7 @@ adhering to FD.io CSIT best practices.
Linux cmdline
-~~~~~~~~~~~~~
+^^^^^^^^^^^^^
::
@@ -18,7 +18,7 @@ Linux cmdline
Linux uname
-~~~~~~~~~~~
+^^^^^^^^^^^
::
@@ -27,7 +27,7 @@ Linux uname
System-level Core Jitter
-~~~~~~~~~~~~~~~~~~~~~~~~
+^^^^^^^^^^^^^^^^^^^^^^^^
::
@@ -72,7 +72,7 @@ System-level Core Jitter
Memory Bandwidth
-~~~~~~~~~~~~~~~~
+^^^^^^^^^^^^^^^^
::
@@ -128,7 +128,7 @@ Memory Bandwidth
Memory Latency
-~~~~~~~~~~~~~~
+^^^^^^^^^^^^^^
::
@@ -188,7 +188,7 @@ Memory Latency
L1/L2/LLC Latency
-~~~~~~~~~~~~~~~~~
+^^^^^^^^^^^^^^^^^
::
diff --git a/docs/report/introduction/test_environment_sut_calib_hsw.rst b/docs/report/introduction/test_environment_sut_calib_hsw.rst
index fe89d99028..d2e8d3d33d 100644
--- a/docs/report/introduction/test_environment_sut_calib_hsw.rst
+++ b/docs/report/introduction/test_environment_sut_calib_hsw.rst
@@ -1,5 +1,5 @@
-Calibration Data - Haswell
---------------------------
+Haswell
+~~~~~~~
Following sections include sample calibration data measured on t1-sut1
server running in one of the Intel Xeon Haswell testbeds as specified in
@@ -9,7 +9,7 @@ Calibration data obtained from all other servers in Haswell testbeds
shows the same or similar values.
Linux cmdline
-~~~~~~~~~~~~~
+^^^^^^^^^^^^^
::
@@ -18,7 +18,7 @@ Linux cmdline
Linux uname
-~~~~~~~~~~~
+^^^^^^^^^^^
::
@@ -27,7 +27,7 @@ Linux uname
System-level Core Jitter
-~~~~~~~~~~~~~~~~~~~~~~~~
+^^^^^^^^^^^^^^^^^^^^^^^^
::
@@ -81,7 +81,7 @@ System-level Core Jitter
Memory Bandwidth
-~~~~~~~~~~~~~~~~
+^^^^^^^^^^^^^^^^
::
@@ -138,7 +138,7 @@ Memory Bandwidth
Memory Latency
-~~~~~~~~~~~~~~
+^^^^^^^^^^^^^^
::
@@ -198,7 +198,7 @@ Memory Latency
L1/L2/LLC Latency
-~~~~~~~~~~~~~~~~~
+^^^^^^^^^^^^^^^^^
::
diff --git a/docs/report/introduction/test_environment_sut_calib_skx.rst b/docs/report/introduction/test_environment_sut_calib_skx.rst
index 16f7ae0762..e3038a230a 100644
--- a/docs/report/introduction/test_environment_sut_calib_skx.rst
+++ b/docs/report/introduction/test_environment_sut_calib_skx.rst
@@ -1,5 +1,5 @@
-Calibration Data - Skylake
---------------------------
+Skylake
+~~~~~~~
Following sections include sample calibration data measured on
s11-t31-sut1 server running in one of the Intel Xeon Skylake testbeds as
@@ -10,7 +10,7 @@ shows the same or similar values.
Linux cmdline
-~~~~~~~~~~~~~
+^^^^^^^^^^^^^
::
@@ -19,7 +19,7 @@ Linux cmdline
Linux uname
-~~~~~~~~~~~
+^^^^^^^^^^^
::
@@ -28,7 +28,7 @@ Linux uname
System-level Core Jitter
-~~~~~~~~~~~~~~~~~~~~~~~~
+^^^^^^^^^^^^^^^^^^^^^^^^
::
@@ -72,7 +72,7 @@ System-level Core Jitter
Memory Bandwidth
-~~~~~~~~~~~~~~~~
+^^^^^^^^^^^^^^^^
::
@@ -129,7 +129,7 @@ Memory Bandwidth
Memory Latency
-~~~~~~~~~~~~~~
+^^^^^^^^^^^^^^
::
@@ -189,7 +189,7 @@ Memory Latency
L1/L2/LLC Latency
-~~~~~~~~~~~~~~~~~
+^^^^^^^^^^^^^^^^^
::
diff --git a/docs/report/introduction/test_environment_sut_calib_tsh.rst b/docs/report/introduction/test_environment_sut_calib_tsh.rst
index 00447b9fd9..a503a42404 100644
--- a/docs/report/introduction/test_environment_sut_calib_tsh.rst
+++ b/docs/report/introduction/test_environment_sut_calib_tsh.rst
@@ -1,5 +1,5 @@
-Calibration Data - TaiShan
---------------------------
+TaiShan
+~~~~~~~
Following sections include sample calibration data measured on
s17-t33-sut1 server running in one of the Cortex-A72 testbeds.
@@ -9,7 +9,7 @@ same or similar values.
Linux cmdline
-~~~~~~~~~~~~~
+^^^^^^^^^^^^^
::
@@ -17,7 +17,7 @@ Linux cmdline
BOOT_IMAGE=/boot/vmlinuz-4.15.0-54-generic root=/dev/mapper/huawei--1--vg-root ro isolcpus=1-15,17-31,33-47,49-63 nohz_full=1-15 17-31,33-47,49-63 rcu_nocbs=1-15 17-31,33-47,49-63 intel_iommu=on nmi_watchdog=0 audit=0 nosoftlockup processor.max_cstate=1 console=ttyAMA0,115200n8
Linux uname
-~~~~~~~~~~~
+^^^^^^^^^^^
::
@@ -26,7 +26,7 @@ Linux uname
System-level Core Jitter
-~~~~~~~~~~~~~~~~~~~~~~~~
+^^^^^^^^^^^^^^^^^^^^^^^^
::