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authormdr78 <mdr@ashroe.eu>2021-03-19 19:03:54 +0000
committerDamjan Marion <dmarion@me.com>2021-04-27 09:22:35 +0000
commit8e1384f7bf2e806e0d65d07af38da269ef1b8338 (patch)
tree4fd4720a58cfeec80550388d37c208b8befc02ac /src/plugins/perfmon/intel/core.h
parent3f923d2d465aadec8d70fa19e0559030751c2c6c (diff)
perfmon: top down level 1 support
Adding perfmon node TMAM support on ICX. Type: improvement Signed-off-by: Ray Kinsella <mdr@ashroe.eu> Change-Id: I48a9a9ff6a72efc28eaf0cb11ef39fb62cebb126
Diffstat (limited to 'src/plugins/perfmon/intel/core.h')
-rw-r--r--src/plugins/perfmon/intel/core.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/src/plugins/perfmon/intel/core.h b/src/plugins/perfmon/intel/core.h
index 01945d2c023..cd5c31ba260 100644
--- a/src/plugins/perfmon/intel/core.h
+++ b/src/plugins/perfmon/intel/core.h
@@ -27,6 +27,10 @@
"Core cycles when the thread is not in halt state") \
_ (0x00, 0x03, 0, 0, 0, 0x00, CPU_CLK_UNHALTED, REF_TSC, \
"Reference cycles when the core is not in halt state.") \
+ _ (0x00, 0x04, 0, 0, 0, 0x00, TOPDOWN, SLOTS, \
+ "TMA slots available for an unhalted logical processor.") \
+ _ (0x00, 0x80, 0, 0, 0, 0x00, TOPDOWN, L1_METRICS, \
+ "TMA slots metrics for an unhalted logical processor.") \
_ (0x03, 0x02, 0, 0, 0, 0x00, LD_BLOCKS, STORE_FORWARD, \
"Loads blocked due to overlapping with a preceding store that cannot be" \
" forwarded.") \