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| author |   Lijian.Zhang <Lijian.Zhang@arm.com> | 2019-07-09 17:54:32 +0800 |
|---|---|---|
| committer |   Damjan Marion <dmarion@me.com> | 2019-09-11 19:20:27 +0000 |
| commit | 840f64b4b2d6063adebb8c7b31c9357aaaf8dd5e (patch) | |
| tree | 34af2303319245845dd701953d51681850d9d84b /src/vlibapi | |
| parent | fe2523d1a42c66ee3ddd594fad1cf5ac91c66c54 (diff) | |
ip: apply dual loop unrolling in ip4_rewrite
Too many prefetches within loop unrollings induce bottleneck and
performance degradation on some CPUs which have less cache line fill
buffers, e.g, Arm Cortex-A72.
Apply dual loop unrolling and tune prefetches manually to remove
hot-spot with prefetch instructions, to get throughput improvement.
It brings about 7% throughput improvement and saves 28% clocks with
ip4_rewrite nodes on Cortex-A72 CPUs.
Type: feature
Change-Id: I0d35ef19faccbd7a5a4647f50bc369bfcb01a20d
Signed-off-by: Lijian Zhang <Lijian.Zhang@arm.com>
Diffstat (limited to 'src/vlibapi')
0 files changed, 0 insertions, 0 deletions