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authorJohn Lo <loj@cisco.com>2017-09-02 08:27:36 -0400
committerDave Barach <openvpp@barachs.net>2017-09-03 01:14:19 +0000
commitdbfa574a1d5ebb68a81fed20dcd4bb2f47c47066 (patch)
treed087c758c7eb19cb9c406dfaa8cdb25d127d79cc /src/vnet/lisp-gpe/lisp_gpe_fwd_entry.h
parentedfa2fddf84fe102e3c134c4df312638b3a00339 (diff)
Improve L2FIB PDR/NDR performance (VPP-963)
1. Limit MAC entry update per l2-learn call to reduce update burst when wall clock advance to the the next minute so all MAC time stamps are behind current time needing update. 2. Optimize l2-learn node fast path code sequence. 3. Invalidate cache_key when update MAC entry. 4. Change L2 learn hit counter to L2 learn hit-update counter. 5. Increase L2FIB table memory size to 512MB to fit 4M entries 6. Set MAC learn limit at 4M entries Change-Id: I3075ee8fb59645a56850126bac2e3e6d341cef4d Signed-off-by: John Lo <loj@cisco.com>
Diffstat (limited to 'src/vnet/lisp-gpe/lisp_gpe_fwd_entry.h')
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