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authorDamjan Marion <damarion@cisco.com>2021-10-31 19:04:33 +0100
committerDamjan Marion <dmarion@me.com>2021-11-02 19:35:17 +0000
commit6eb0f84e37d84caeb9db773976df5ab3a7e794d0 (patch)
tree9d42eccf54d3d01dd4c6479ac4ab55b185303ad4 /src/vppinfra/time.h
parent1e6d30bd444fa95df0f08cdef7e899def56c17a7 (diff)
vppinfra: initial RISC-V support
Type: feature Change-Id: I1314d60fc420366526efaddd1ed215cf5f8b75dd Signed-off-by: Damjan Marion <damarion@cisco.com>
Diffstat (limited to 'src/vppinfra/time.h')
-rw-r--r--src/vppinfra/time.h9
1 files changed, 9 insertions, 0 deletions
diff --git a/src/vppinfra/time.h b/src/vppinfra/time.h
index 4d8997f0a9e..761dbed3fe8 100644
--- a/src/vppinfra/time.h
+++ b/src/vppinfra/time.h
@@ -192,6 +192,15 @@ clib_cpu_time_now (void)
return result;
}
+#elif defined(__riscv)
+
+always_inline u64
+clib_cpu_time_now (void)
+{
+ u64 result;
+ asm volatile("rdcycle %0\n" : "=r"(result));
+ return result;
+}
#else
#error "don't know how to read CPU time stamp"