diff options
| author |   Damjan Marion <damarion@cisco.com> | 2021-12-02 11:39:07 +0100 |
|---|---|---|
| committer |   Ole Tr�an <otroan@employees.org> | 2021-12-02 13:45:43 +0000 |
| commit | 9ab2e5d8d711e678e914e4fb8d3d181f868acf3d (patch) | |
| tree | 0f6f7f65192991183a4f0975dc671453c1065aeb /src/vppinfra/vector_avx512.h | |
| parent | 4a0dd383cf363ba7df105b87838435ef1cfa4fd7 (diff) | |
vppinfra: add SIMD masked bitwise ops
Type: improvement
Change-Id: Id73b00a8cb3af799f9f97949bc1302f162a91a57
Signed-off-by: Damjan Marion <damarion@cisco.com>
Diffstat (limited to 'src/vppinfra/vector_avx512.h')
| -rw-r--r-- | src/vppinfra/vector_avx512.h | 28 |
1 files changed, 28 insertions, 0 deletions
diff --git a/src/vppinfra/vector_avx512.h b/src/vppinfra/vector_avx512.h index 1a5c2528bf7..8acac2a3a9f 100644 --- a/src/vppinfra/vector_avx512.h +++ b/src/vppinfra/vector_avx512.h @@ -246,14 +246,42 @@ _ (u64x4, u8, _mm256, __m256i, epi64) _ (u64x2, u8, _mm, __m128i, epi64) #undef _ +#define _(t, m, p, i, e) \ + static_always_inline t t##_mask_and (t a, t b, m mask) \ + { \ + return (t) p##_mask_and_##e ((i) a, mask, (i) a, (i) b); \ + } \ + static_always_inline t t##_mask_andnot (t a, t b, m mask) \ + { \ + return (t) p##_mask_andnot_##e ((i) a, mask, (i) a, (i) b); \ + } \ + static_always_inline t t##_mask_xor (t a, t b, m mask) \ + { \ + return (t) p##_mask_xor_##e ((i) a, mask, (i) a, (i) b); \ + } \ + static_always_inline t t##_mask_or (t a, t b, m mask) \ + { \ + return (t) p##_mask_or_##e ((i) a, mask, (i) a, (i) b); \ + } +_ (u32x16, u16, _mm512, __m512i, epi32) +_ (u32x8, u8, _mm256, __m256i, epi32) +_ (u32x4, u8, _mm, __m128i, epi32) +_ (u64x8, u8, _mm512, __m512i, epi64) +_ (u64x4, u8, _mm256, __m256i, epi64) +_ (u64x2, u8, _mm, __m128i, epi64) +#undef _ + #ifdef CLIB_HAVE_VEC512 #define CLIB_HAVE_VEC512_MASK_LOAD_STORE +#define CLIB_HAVE_VEC512_MASK_BITWISE_OPS #endif #ifdef CLIB_HAVE_VEC256 #define CLIB_HAVE_VEC256_MASK_LOAD_STORE +#define CLIB_HAVE_VEC256_MASK_BITWISE_OPS #endif #ifdef CLIB_HAVE_VEC128 #define CLIB_HAVE_VEC128_MASK_LOAD_STORE +#define CLIB_HAVE_VEC128_MASK_BITWISE_OPS #endif static_always_inline u8x64 |